test/MC/AArch64/SVE/ldnf1sh-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // Invalid operand (.h)
   5
   6 ldnf1sh z23.h, p0/z, [x13, #1, MUL VL]
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
   8 // CHECK-NEXT: ldnf1sh z23.h, p0/z, [x13, #1, MUL VL]
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 ldnf1sh z29.h, p0/z, [x3, #1, MUL VL]
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  13 // CHECK-NEXT: ldnf1sh z29.h, p0/z, [x3, #1, MUL VL]
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16
  17 // --------------------------------------------------------------------------//
  18 // Immediate out of lower bound [-8, 7].
  19
  20 ldnf1sh z30.s, p6/z, [x25, #-9, MUL VL]
  21 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
  22 // CHECK-NEXT: ldnf1sh z30.s, p6/z, [x25, #-9, MUL VL]
  23 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  24
  25 ldnf1sh z29.s, p5/z, [x15, #8, MUL VL]
  26 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
  27 // CHECK-NEXT: ldnf1sh z29.s, p5/z, [x15, #8, MUL VL]
  28 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  29
  30 ldnf1sh z28.d, p2/z, [x28, #-9, MUL VL]
  31 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
  32 // CHECK-NEXT: ldnf1sh z28.d, p2/z, [x28, #-9, MUL VL]
  33 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  34
  35 ldnf1sh z27.d, p1/z, [x26, #8, MUL VL]
  36 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
  37 // CHECK-NEXT: ldnf1sh z27.d, p1/z, [x26, #8, MUL VL]
  38 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  39
  40
  41 // --------------------------------------------------------------------------//
  42 // restricted predicate has range [0, 7].
  43
  44 ldnf1sh z12.s, p8/z, [x13, #1, MUL VL]
  45 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  46 // CHECK-NEXT: ldnf1sh z12.s, p8/z, [x13, #1, MUL VL]
  47 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  48
  49 ldnf1sh z4.d, p8/z, [x11, #1, MUL VL]
  50 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  51 // CHECK-NEXT: ldnf1sh z4.d, p8/z, [x11, #1, MUL VL]
  52 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  53
  54
  55 // --------------------------------------------------------------------------//
  56 // Invalid vector list.
  57
  58 ldnf1sh { }, p0/z, [x1, #1, MUL VL]
  59 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected
  60 // CHECK-NEXT: ldnf1sh { }, p0/z, [x1, #1, MUL VL]
  61 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  62
  63 ldnf1sh { z1.s, z2.s }, p0/z, [x1, #1, MUL VL]
  64 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
  65 // CHECK-NEXT: ldnf1sh { z1.s, z2.s }, p0/z, [x1, #1, MUL VL]
  66 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  67
  68 ldnf1sh { v0.2d }, p0/z, [x1, #1, MUL VL]
  69 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
  70 // CHECK-NEXT: ldnf1sh { v0.2d }, p0/z, [x1, #1, MUL VL]
  71 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  72
  73
  74 // --------------------------------------------------------------------------//
  75 // Negative tests for instructions that are incompatible with movprfx
  76
  77 movprfx z21.d, p5/z, z28.d
  78 ldnf1sh   { z21.d }, p5/z, [x10, #5, mul vl]
  79 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  80 // CHECK-NEXT: ldnf1sh   { z21.d }, p5/z, [x10, #5, mul vl]
  81 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  82
  83 movprfx z21, z28
  84 ldnf1sh   { z21.d }, p5/z, [x10, #5, mul vl]
  85 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  86 // CHECK-NEXT: ldnf1sh   { z21.d }, p5/z, [x10, #5, mul vl]
  87 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: