[llvm-readobj] - Simplify stack-sizes.test test case.
[llvm-complete.git] / test / MC / AArch64 / SVE / uaddv-diagnostics.s
blobfb501c3d9706abfb633e87e2c3db674b9874c89f
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
4 // ------------------------------------------------------------------------- //
5 // Invalid destination or source register.
7 uaddv s0, p7, z31.b
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
9 // CHECK-NEXT: uaddv s0, p7, z31.b
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
12 uaddv s0, p7, z31.h
13 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
14 // CHECK-NEXT: uaddv s0, p7, z31.h
15 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
17 uaddv s0, p7, z31.s
18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
19 // CHECK-NEXT: uaddv s0, p7, z31.s
20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
23 // ------------------------------------------------------------------------- //
24 // Invalid predicate
26 uaddv d0, p8, z31.b
27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
28 // CHECK-NEXT: uaddv d0, p8, z31.b
29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
31 uaddv d0, p7.b, z31.b
32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
33 // CHECK-NEXT: uaddv d0, p7.b, z31.b
34 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
36 uaddv d0, p7.q, z31.b
37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
38 // CHECK-NEXT: uaddv d0, p7.q, z31.b
39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
42 // --------------------------------------------------------------------------//
43 // Negative tests for instructions that are incompatible with movprfx
45 movprfx z31.d, p7/z, z6.d
46 uaddv d0, p7, z31.d
47 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
48 // CHECK-NEXT: uaddv d0, p7, z31.d
49 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
51 movprfx z31, z6
52 uaddv d0, p7, z31.d
53 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
54 // CHECK-NEXT: uaddv d0, p7, z31.d
55 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: