test/MC/AArch64/SVE/uqdech.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   4 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   6 // RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
   9
  10
  11 // ---------------------------------------------------------------------------//
  12 // Test 64-bit form (x0) and its aliases
  13 // ---------------------------------------------------------------------------//
  14 uqdech  x0
  15 // CHECK-INST: uqdech  x0
  16 // CHECK-ENCODING: [0xe0,0xff,0x70,0x04]
  17 // CHECK-ERROR: instruction requires: sve
  18 // CHECK-UNKNOWN: e0 ff 70 04 <unknown>
  19
  20 uqdech  x0, all
  21 // CHECK-INST: uqdech  x0
  22 // CHECK-ENCODING: [0xe0,0xff,0x70,0x04]
  23 // CHECK-ERROR: instruction requires: sve
  24 // CHECK-UNKNOWN: e0 ff 70 04 <unknown>
  25
  26 uqdech  x0, all, mul #1
  27 // CHECK-INST: uqdech  x0
  28 // CHECK-ENCODING: [0xe0,0xff,0x70,0x04]
  29 // CHECK-ERROR: instruction requires: sve
  30 // CHECK-UNKNOWN: e0 ff 70 04 <unknown>
  31
  32 uqdech  x0, all, mul #16
  33 // CHECK-INST: uqdech  x0, all, mul #16
  34 // CHECK-ENCODING: [0xe0,0xff,0x7f,0x04]
  35 // CHECK-ERROR: instruction requires: sve
  36 // CHECK-UNKNOWN: e0 ff 7f 04 <unknown>
  37
  38
  39 // ---------------------------------------------------------------------------//
  40 // Test 32-bit form (w0) and its aliases
  41 // ---------------------------------------------------------------------------//
  42
  43 uqdech  w0
  44 // CHECK-INST: uqdech  w0
  45 // CHECK-ENCODING: [0xe0,0xff,0x60,0x04]
  46 // CHECK-ERROR: instruction requires: sve
  47 // CHECK-UNKNOWN: e0 ff 60 04 <unknown>
  48
  49 uqdech  w0, all
  50 // CHECK-INST: uqdech  w0
  51 // CHECK-ENCODING: [0xe0,0xff,0x60,0x04]
  52 // CHECK-ERROR: instruction requires: sve
  53 // CHECK-UNKNOWN: e0 ff 60 04 <unknown>
  54
  55 uqdech  w0, all, mul #1
  56 // CHECK-INST: uqdech  w0
  57 // CHECK-ENCODING: [0xe0,0xff,0x60,0x04]
  58 // CHECK-ERROR: instruction requires: sve
  59 // CHECK-UNKNOWN: e0 ff 60 04 <unknown>
  60
  61 uqdech  w0, all, mul #16
  62 // CHECK-INST: uqdech  w0, all, mul #16
  63 // CHECK-ENCODING: [0xe0,0xff,0x6f,0x04]
  64 // CHECK-ERROR: instruction requires: sve
  65 // CHECK-UNKNOWN: e0 ff 6f 04 <unknown>
  66
  67 uqdech  w0, pow2
  68 // CHECK-INST: uqdech  w0, pow2
  69 // CHECK-ENCODING: [0x00,0xfc,0x60,0x04]
  70 // CHECK-ERROR: instruction requires: sve
  71 // CHECK-UNKNOWN: 00 fc 60 04 <unknown>
  72
  73 uqdech  w0, pow2, mul #16
  74 // CHECK-INST: uqdech  w0, pow2, mul #16
  75 // CHECK-ENCODING: [0x00,0xfc,0x6f,0x04]
  76 // CHECK-ERROR: instruction requires: sve
  77 // CHECK-UNKNOWN: 00 fc 6f 04 <unknown>
  78
  79
  80 // ---------------------------------------------------------------------------//
  81 // Test vector form and aliases.
  82 // ---------------------------------------------------------------------------//
  83 uqdech  z0.h
  84 // CHECK-INST: uqdech  z0.h
  85 // CHECK-ENCODING: [0xe0,0xcf,0x60,0x04]
  86 // CHECK-ERROR: instruction requires: sve
  87 // CHECK-UNKNOWN: e0 cf 60 04 <unknown>
  88
  89 uqdech  z0.h, all
  90 // CHECK-INST: uqdech  z0.h
  91 // CHECK-ENCODING: [0xe0,0xcf,0x60,0x04]
  92 // CHECK-ERROR: instruction requires: sve
  93 // CHECK-UNKNOWN: e0 cf 60 04 <unknown>
  94
  95 uqdech  z0.h, all, mul #1
  96 // CHECK-INST: uqdech  z0.h
  97 // CHECK-ENCODING: [0xe0,0xcf,0x60,0x04]
  98 // CHECK-ERROR: instruction requires: sve
  99 // CHECK-UNKNOWN: e0 cf 60 04 <unknown>
 100
 101 uqdech  z0.h, all, mul #16
 102 // CHECK-INST: uqdech  z0.h, all, mul #16
 103 // CHECK-ENCODING: [0xe0,0xcf,0x6f,0x04]
 104 // CHECK-ERROR: instruction requires: sve
 105 // CHECK-UNKNOWN: e0 cf 6f 04 <unknown>
 106
 107 uqdech  z0.h, pow2
 108 // CHECK-INST: uqdech  z0.h, pow2
 109 // CHECK-ENCODING: [0x00,0xcc,0x60,0x04]
 110 // CHECK-ERROR: instruction requires: sve
 111 // CHECK-UNKNOWN: 00 cc 60 04 <unknown>
 112
 113 uqdech  z0.h, pow2, mul #16
 114 // CHECK-INST: uqdech  z0.h, pow2, mul #16
 115 // CHECK-ENCODING: [0x00,0xcc,0x6f,0x04]
 116 // CHECK-ERROR: instruction requires: sve
 117 // CHECK-UNKNOWN: 00 cc 6f 04 <unknown>
 118
 119
 120 // ---------------------------------------------------------------------------//
 121 // Test all patterns for 64-bit form
 122 // ---------------------------------------------------------------------------//
 123
 124 uqdech  x0, pow2
 125 // CHECK-INST: uqdech  x0, pow2
 126 // CHECK-ENCODING: [0x00,0xfc,0x70,0x04]
 127 // CHECK-ERROR: instruction requires: sve
 128 // CHECK-UNKNOWN: 00 fc 70 04 <unknown>
 129
 130 uqdech  x0, vl1
 131 // CHECK-INST: uqdech  x0, vl1
 132 // CHECK-ENCODING: [0x20,0xfc,0x70,0x04]
 133 // CHECK-ERROR: instruction requires: sve
 134 // CHECK-UNKNOWN: 20 fc 70 04 <unknown>
 135
 136 uqdech  x0, vl2
 137 // CHECK-INST: uqdech  x0, vl2
 138 // CHECK-ENCODING: [0x40,0xfc,0x70,0x04]
 139 // CHECK-ERROR: instruction requires: sve
 140 // CHECK-UNKNOWN: 40 fc 70 04 <unknown>
 141
 142 uqdech  x0, vl3
 143 // CHECK-INST: uqdech  x0, vl3
 144 // CHECK-ENCODING: [0x60,0xfc,0x70,0x04]
 145 // CHECK-ERROR: instruction requires: sve
 146 // CHECK-UNKNOWN: 60 fc 70 04 <unknown>
 147
 148 uqdech  x0, vl4
 149 // CHECK-INST: uqdech  x0, vl4
 150 // CHECK-ENCODING: [0x80,0xfc,0x70,0x04]
 151 // CHECK-ERROR: instruction requires: sve
 152 // CHECK-UNKNOWN: 80 fc 70 04 <unknown>
 153
 154 uqdech  x0, vl5
 155 // CHECK-INST: uqdech  x0, vl5
 156 // CHECK-ENCODING: [0xa0,0xfc,0x70,0x04]
 157 // CHECK-ERROR: instruction requires: sve
 158 // CHECK-UNKNOWN: a0 fc 70 04 <unknown>
 159
 160 uqdech  x0, vl6
 161 // CHECK-INST: uqdech  x0, vl6
 162 // CHECK-ENCODING: [0xc0,0xfc,0x70,0x04]
 163 // CHECK-ERROR: instruction requires: sve
 164 // CHECK-UNKNOWN: c0 fc 70 04 <unknown>
 165
 166 uqdech  x0, vl7
 167 // CHECK-INST: uqdech  x0, vl7
 168 // CHECK-ENCODING: [0xe0,0xfc,0x70,0x04]
 169 // CHECK-ERROR: instruction requires: sve
 170 // CHECK-UNKNOWN: e0 fc 70 04 <unknown>
 171
 172 uqdech  x0, vl8
 173 // CHECK-INST: uqdech  x0, vl8
 174 // CHECK-ENCODING: [0x00,0xfd,0x70,0x04]
 175 // CHECK-ERROR: instruction requires: sve
 176 // CHECK-UNKNOWN: 00 fd 70 04 <unknown>
 177
 178 uqdech  x0, vl16
 179 // CHECK-INST: uqdech  x0, vl16
 180 // CHECK-ENCODING: [0x20,0xfd,0x70,0x04]
 181 // CHECK-ERROR: instruction requires: sve
 182 // CHECK-UNKNOWN: 20 fd 70 04 <unknown>
 183
 184 uqdech  x0, vl32
 185 // CHECK-INST: uqdech  x0, vl32
 186 // CHECK-ENCODING: [0x40,0xfd,0x70,0x04]
 187 // CHECK-ERROR: instruction requires: sve
 188 // CHECK-UNKNOWN: 40 fd 70 04 <unknown>
 189
 190 uqdech  x0, vl64
 191 // CHECK-INST: uqdech  x0, vl64
 192 // CHECK-ENCODING: [0x60,0xfd,0x70,0x04]
 193 // CHECK-ERROR: instruction requires: sve
 194 // CHECK-UNKNOWN: 60 fd 70 04 <unknown>
 195
 196 uqdech  x0, vl128
 197 // CHECK-INST: uqdech  x0, vl128
 198 // CHECK-ENCODING: [0x80,0xfd,0x70,0x04]
 199 // CHECK-ERROR: instruction requires: sve
 200 // CHECK-UNKNOWN: 80 fd 70 04 <unknown>
 201
 202 uqdech  x0, vl256
 203 // CHECK-INST: uqdech  x0, vl256
 204 // CHECK-ENCODING: [0xa0,0xfd,0x70,0x04]
 205 // CHECK-ERROR: instruction requires: sve
 206 // CHECK-UNKNOWN: a0 fd 70 04 <unknown>
 207
 208 uqdech  x0, #14
 209 // CHECK-INST: uqdech  x0, #14
 210 // CHECK-ENCODING: [0xc0,0xfd,0x70,0x04]
 211 // CHECK-ERROR: instruction requires: sve
 212 // CHECK-UNKNOWN: c0 fd 70 04 <unknown>
 213
 214 uqdech  x0, #15
 215 // CHECK-INST: uqdech  x0, #15
 216 // CHECK-ENCODING: [0xe0,0xfd,0x70,0x04]
 217 // CHECK-ERROR: instruction requires: sve
 218 // CHECK-UNKNOWN: e0 fd 70 04 <unknown>
 219
 220 uqdech  x0, #16
 221 // CHECK-INST: uqdech  x0, #16
 222 // CHECK-ENCODING: [0x00,0xfe,0x70,0x04]
 223 // CHECK-ERROR: instruction requires: sve
 224 // CHECK-UNKNOWN: 00 fe 70 04 <unknown>
 225
 226 uqdech  x0, #17
 227 // CHECK-INST: uqdech  x0, #17
 228 // CHECK-ENCODING: [0x20,0xfe,0x70,0x04]
 229 // CHECK-ERROR: instruction requires: sve
 230 // CHECK-UNKNOWN: 20 fe 70 04 <unknown>
 231
 232 uqdech  x0, #18
 233 // CHECK-INST: uqdech  x0, #18
 234 // CHECK-ENCODING: [0x40,0xfe,0x70,0x04]
 235 // CHECK-ERROR: instruction requires: sve
 236 // CHECK-UNKNOWN: 40 fe 70 04 <unknown>
 237
 238 uqdech  x0, #19
 239 // CHECK-INST: uqdech  x0, #19
 240 // CHECK-ENCODING: [0x60,0xfe,0x70,0x04]
 241 // CHECK-ERROR: instruction requires: sve
 242 // CHECK-UNKNOWN: 60 fe 70 04 <unknown>
 243
 244 uqdech  x0, #20
 245 // CHECK-INST: uqdech  x0, #20
 246 // CHECK-ENCODING: [0x80,0xfe,0x70,0x04]
 247 // CHECK-ERROR: instruction requires: sve
 248 // CHECK-UNKNOWN: 80 fe 70 04 <unknown>
 249
 250 uqdech  x0, #21
 251 // CHECK-INST: uqdech  x0, #21
 252 // CHECK-ENCODING: [0xa0,0xfe,0x70,0x04]
 253 // CHECK-ERROR: instruction requires: sve
 254 // CHECK-UNKNOWN: a0 fe 70 04 <unknown>
 255
 256 uqdech  x0, #22
 257 // CHECK-INST: uqdech  x0, #22
 258 // CHECK-ENCODING: [0xc0,0xfe,0x70,0x04]
 259 // CHECK-ERROR: instruction requires: sve
 260 // CHECK-UNKNOWN: c0 fe 70 04 <unknown>
 261
 262 uqdech  x0, #23
 263 // CHECK-INST: uqdech  x0, #23
 264 // CHECK-ENCODING: [0xe0,0xfe,0x70,0x04]
 265 // CHECK-ERROR: instruction requires: sve
 266 // CHECK-UNKNOWN: e0 fe 70 04 <unknown>
 267
 268 uqdech  x0, #24
 269 // CHECK-INST: uqdech  x0, #24
 270 // CHECK-ENCODING: [0x00,0xff,0x70,0x04]
 271 // CHECK-ERROR: instruction requires: sve
 272 // CHECK-UNKNOWN: 00 ff 70 04 <unknown>
 273
 274 uqdech  x0, #25
 275 // CHECK-INST: uqdech  x0, #25
 276 // CHECK-ENCODING: [0x20,0xff,0x70,0x04]
 277 // CHECK-ERROR: instruction requires: sve
 278 // CHECK-UNKNOWN: 20 ff 70 04 <unknown>
 279
 280 uqdech  x0, #26
 281 // CHECK-INST: uqdech  x0, #26
 282 // CHECK-ENCODING: [0x40,0xff,0x70,0x04]
 283 // CHECK-ERROR: instruction requires: sve
 284 // CHECK-UNKNOWN: 40 ff 70 04 <unknown>
 285
 286 uqdech  x0, #27
 287 // CHECK-INST: uqdech  x0, #27
 288 // CHECK-ENCODING: [0x60,0xff,0x70,0x04]
 289 // CHECK-ERROR: instruction requires: sve
 290 // CHECK-UNKNOWN: 60 ff 70 04 <unknown>
 291
 292 uqdech  x0, #28
 293 // CHECK-INST: uqdech  x0, #28
 294 // CHECK-ENCODING: [0x80,0xff,0x70,0x04]
 295 // CHECK-ERROR: instruction requires: sve
 296 // CHECK-UNKNOWN: 80 ff 70 04 <unknown>
 297
 298
 299 // --------------------------------------------------------------------------//
 300 // Test compatibility with MOVPRFX instruction.
 301
 302 movprfx z0, z7
 303 // CHECK-INST: movprfx  z0, z7
 304 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
 305 // CHECK-ERROR: instruction requires: sve
 306 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
 307
 308 uqdech  z0.h
 309 // CHECK-INST: uqdech   z0.h
 310 // CHECK-ENCODING: [0xe0,0xcf,0x60,0x04]
 311 // CHECK-ERROR: instruction requires: sve
 312 // CHECK-UNKNOWN: e0 cf 60 04 <unknown>
 313
 314 movprfx z0, z7
 315 // CHECK-INST: movprfx  z0, z7
 316 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
 317 // CHECK-ERROR: instruction requires: sve
 318 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
 319
 320 uqdech  z0.h, pow2, mul #16
 321 // CHECK-INST: uqdech   z0.h, pow2, mul #16
 322 // CHECK-ENCODING: [0x00,0xcc,0x6f,0x04]
 323 // CHECK-ERROR: instruction requires: sve
 324 // CHECK-UNKNOWN: 00 cc 6f 04 <unknown>
 325
 326 movprfx z0, z7
 327 // CHECK-INST: movprfx  z0, z7
 328 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
 329 // CHECK-ERROR: instruction requires: sve
 330 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
 331
 332 uqdech  z0.h, pow2
 333 // CHECK-INST: uqdech   z0.h, pow2
 334 // CHECK-ENCODING: [0x00,0xcc,0x60,0x04]
 335 // CHECK-ERROR: instruction requires: sve
 336 // CHECK-UNKNOWN: 00 cc 60 04 <unknown>