[llvm-readobj] - Simplify stack-sizes.test test case.
[llvm-complete.git] / test / MC / AArch64 / SVE / uqinch.s
blob03c7fb7fe9a857240a2c238684547d6b6e20b7d9
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
11 // ---------------------------------------------------------------------------//
12 // Test 64-bit form (x0) and its aliases
13 // ---------------------------------------------------------------------------//
15 uqinch x0
16 // CHECK-INST: uqinch x0
17 // CHECK-ENCODING: [0xe0,0xf7,0x70,0x04]
18 // CHECK-ERROR: instruction requires: sve
19 // CHECK-UNKNOWN: e0 f7 70 04 <unknown>
21 uqinch x0, all
22 // CHECK-INST: uqinch x0
23 // CHECK-ENCODING: [0xe0,0xf7,0x70,0x04]
24 // CHECK-ERROR: instruction requires: sve
25 // CHECK-UNKNOWN: e0 f7 70 04 <unknown>
27 uqinch x0, all, mul #1
28 // CHECK-INST: uqinch x0
29 // CHECK-ENCODING: [0xe0,0xf7,0x70,0x04]
30 // CHECK-ERROR: instruction requires: sve
31 // CHECK-UNKNOWN: e0 f7 70 04 <unknown>
33 uqinch x0, all, mul #16
34 // CHECK-INST: uqinch x0, all, mul #16
35 // CHECK-ENCODING: [0xe0,0xf7,0x7f,0x04]
36 // CHECK-ERROR: instruction requires: sve
37 // CHECK-UNKNOWN: e0 f7 7f 04 <unknown>
40 // ---------------------------------------------------------------------------//
41 // Test 32-bit form (w0) and its aliases
42 // ---------------------------------------------------------------------------//
44 uqinch w0
45 // CHECK-INST: uqinch w0
46 // CHECK-ENCODING: [0xe0,0xf7,0x60,0x04]
47 // CHECK-ERROR: instruction requires: sve
48 // CHECK-UNKNOWN: e0 f7 60 04 <unknown>
50 uqinch w0, all
51 // CHECK-INST: uqinch w0
52 // CHECK-ENCODING: [0xe0,0xf7,0x60,0x04]
53 // CHECK-ERROR: instruction requires: sve
54 // CHECK-UNKNOWN: e0 f7 60 04 <unknown>
56 uqinch w0, all, mul #1
57 // CHECK-INST: uqinch w0
58 // CHECK-ENCODING: [0xe0,0xf7,0x60,0x04]
59 // CHECK-ERROR: instruction requires: sve
60 // CHECK-UNKNOWN: e0 f7 60 04 <unknown>
62 uqinch w0, all, mul #16
63 // CHECK-INST: uqinch w0, all, mul #16
64 // CHECK-ENCODING: [0xe0,0xf7,0x6f,0x04]
65 // CHECK-ERROR: instruction requires: sve
66 // CHECK-UNKNOWN: e0 f7 6f 04 <unknown>
68 uqinch w0, pow2
69 // CHECK-INST: uqinch w0, pow2
70 // CHECK-ENCODING: [0x00,0xf4,0x60,0x04]
71 // CHECK-ERROR: instruction requires: sve
72 // CHECK-UNKNOWN: 00 f4 60 04 <unknown>
74 uqinch w0, pow2, mul #16
75 // CHECK-INST: uqinch w0, pow2, mul #16
76 // CHECK-ENCODING: [0x00,0xf4,0x6f,0x04]
77 // CHECK-ERROR: instruction requires: sve
78 // CHECK-UNKNOWN: 00 f4 6f 04 <unknown>
81 // ---------------------------------------------------------------------------//
82 // Test vector form and aliases.
83 // ---------------------------------------------------------------------------//
85 uqinch z0.h
86 // CHECK-INST: uqinch z0.h
87 // CHECK-ENCODING: [0xe0,0xc7,0x60,0x04]
88 // CHECK-ERROR: instruction requires: sve
89 // CHECK-UNKNOWN: e0 c7 60 04 <unknown>
91 uqinch z0.h, all
92 // CHECK-INST: uqinch z0.h
93 // CHECK-ENCODING: [0xe0,0xc7,0x60,0x04]
94 // CHECK-ERROR: instruction requires: sve
95 // CHECK-UNKNOWN: e0 c7 60 04 <unknown>
97 uqinch z0.h, all, mul #1
98 // CHECK-INST: uqinch z0.h
99 // CHECK-ENCODING: [0xe0,0xc7,0x60,0x04]
100 // CHECK-ERROR: instruction requires: sve
101 // CHECK-UNKNOWN: e0 c7 60 04 <unknown>
103 uqinch z0.h, all, mul #16
104 // CHECK-INST: uqinch z0.h, all, mul #16
105 // CHECK-ENCODING: [0xe0,0xc7,0x6f,0x04]
106 // CHECK-ERROR: instruction requires: sve
107 // CHECK-UNKNOWN: e0 c7 6f 04 <unknown>
109 uqinch z0.h, pow2
110 // CHECK-INST: uqinch z0.h, pow2
111 // CHECK-ENCODING: [0x00,0xc4,0x60,0x04]
112 // CHECK-ERROR: instruction requires: sve
113 // CHECK-UNKNOWN: 00 c4 60 04 <unknown>
115 uqinch z0.h, pow2, mul #16
116 // CHECK-INST: uqinch z0.h, pow2, mul #16
117 // CHECK-ENCODING: [0x00,0xc4,0x6f,0x04]
118 // CHECK-ERROR: instruction requires: sve
119 // CHECK-UNKNOWN: 00 c4 6f 04 <unknown>
122 // ---------------------------------------------------------------------------//
123 // Test all patterns for 64-bit form
124 // ---------------------------------------------------------------------------//
126 uqinch x0, pow2
127 // CHECK-INST: uqinch x0, pow2
128 // CHECK-ENCODING: [0x00,0xf4,0x70,0x04]
129 // CHECK-ERROR: instruction requires: sve
130 // CHECK-UNKNOWN: 00 f4 70 04 <unknown>
132 uqinch x0, vl1
133 // CHECK-INST: uqinch x0, vl1
134 // CHECK-ENCODING: [0x20,0xf4,0x70,0x04]
135 // CHECK-ERROR: instruction requires: sve
136 // CHECK-UNKNOWN: 20 f4 70 04 <unknown>
138 uqinch x0, vl2
139 // CHECK-INST: uqinch x0, vl2
140 // CHECK-ENCODING: [0x40,0xf4,0x70,0x04]
141 // CHECK-ERROR: instruction requires: sve
142 // CHECK-UNKNOWN: 40 f4 70 04 <unknown>
144 uqinch x0, vl3
145 // CHECK-INST: uqinch x0, vl3
146 // CHECK-ENCODING: [0x60,0xf4,0x70,0x04]
147 // CHECK-ERROR: instruction requires: sve
148 // CHECK-UNKNOWN: 60 f4 70 04 <unknown>
150 uqinch x0, vl4
151 // CHECK-INST: uqinch x0, vl4
152 // CHECK-ENCODING: [0x80,0xf4,0x70,0x04]
153 // CHECK-ERROR: instruction requires: sve
154 // CHECK-UNKNOWN: 80 f4 70 04 <unknown>
156 uqinch x0, vl5
157 // CHECK-INST: uqinch x0, vl5
158 // CHECK-ENCODING: [0xa0,0xf4,0x70,0x04]
159 // CHECK-ERROR: instruction requires: sve
160 // CHECK-UNKNOWN: a0 f4 70 04 <unknown>
162 uqinch x0, vl6
163 // CHECK-INST: uqinch x0, vl6
164 // CHECK-ENCODING: [0xc0,0xf4,0x70,0x04]
165 // CHECK-ERROR: instruction requires: sve
166 // CHECK-UNKNOWN: c0 f4 70 04 <unknown>
168 uqinch x0, vl7
169 // CHECK-INST: uqinch x0, vl7
170 // CHECK-ENCODING: [0xe0,0xf4,0x70,0x04]
171 // CHECK-ERROR: instruction requires: sve
172 // CHECK-UNKNOWN: e0 f4 70 04 <unknown>
174 uqinch x0, vl8
175 // CHECK-INST: uqinch x0, vl8
176 // CHECK-ENCODING: [0x00,0xf5,0x70,0x04]
177 // CHECK-ERROR: instruction requires: sve
178 // CHECK-UNKNOWN: 00 f5 70 04 <unknown>
180 uqinch x0, vl16
181 // CHECK-INST: uqinch x0, vl16
182 // CHECK-ENCODING: [0x20,0xf5,0x70,0x04]
183 // CHECK-ERROR: instruction requires: sve
184 // CHECK-UNKNOWN: 20 f5 70 04 <unknown>
186 uqinch x0, vl32
187 // CHECK-INST: uqinch x0, vl32
188 // CHECK-ENCODING: [0x40,0xf5,0x70,0x04]
189 // CHECK-ERROR: instruction requires: sve
190 // CHECK-UNKNOWN: 40 f5 70 04 <unknown>
192 uqinch x0, vl64
193 // CHECK-INST: uqinch x0, vl64
194 // CHECK-ENCODING: [0x60,0xf5,0x70,0x04]
195 // CHECK-ERROR: instruction requires: sve
196 // CHECK-UNKNOWN: 60 f5 70 04 <unknown>
198 uqinch x0, vl128
199 // CHECK-INST: uqinch x0, vl128
200 // CHECK-ENCODING: [0x80,0xf5,0x70,0x04]
201 // CHECK-ERROR: instruction requires: sve
202 // CHECK-UNKNOWN: 80 f5 70 04 <unknown>
204 uqinch x0, vl256
205 // CHECK-INST: uqinch x0, vl256
206 // CHECK-ENCODING: [0xa0,0xf5,0x70,0x04]
207 // CHECK-ERROR: instruction requires: sve
208 // CHECK-UNKNOWN: a0 f5 70 04 <unknown>
210 uqinch x0, #14
211 // CHECK-INST: uqinch x0, #14
212 // CHECK-ENCODING: [0xc0,0xf5,0x70,0x04]
213 // CHECK-ERROR: instruction requires: sve
214 // CHECK-UNKNOWN: c0 f5 70 04 <unknown>
216 uqinch x0, #15
217 // CHECK-INST: uqinch x0, #15
218 // CHECK-ENCODING: [0xe0,0xf5,0x70,0x04]
219 // CHECK-ERROR: instruction requires: sve
220 // CHECK-UNKNOWN: e0 f5 70 04 <unknown>
222 uqinch x0, #16
223 // CHECK-INST: uqinch x0, #16
224 // CHECK-ENCODING: [0x00,0xf6,0x70,0x04]
225 // CHECK-ERROR: instruction requires: sve
226 // CHECK-UNKNOWN: 00 f6 70 04 <unknown>
228 uqinch x0, #17
229 // CHECK-INST: uqinch x0, #17
230 // CHECK-ENCODING: [0x20,0xf6,0x70,0x04]
231 // CHECK-ERROR: instruction requires: sve
232 // CHECK-UNKNOWN: 20 f6 70 04 <unknown>
234 uqinch x0, #18
235 // CHECK-INST: uqinch x0, #18
236 // CHECK-ENCODING: [0x40,0xf6,0x70,0x04]
237 // CHECK-ERROR: instruction requires: sve
238 // CHECK-UNKNOWN: 40 f6 70 04 <unknown>
240 uqinch x0, #19
241 // CHECK-INST: uqinch x0, #19
242 // CHECK-ENCODING: [0x60,0xf6,0x70,0x04]
243 // CHECK-ERROR: instruction requires: sve
244 // CHECK-UNKNOWN: 60 f6 70 04 <unknown>
246 uqinch x0, #20
247 // CHECK-INST: uqinch x0, #20
248 // CHECK-ENCODING: [0x80,0xf6,0x70,0x04]
249 // CHECK-ERROR: instruction requires: sve
250 // CHECK-UNKNOWN: 80 f6 70 04 <unknown>
252 uqinch x0, #21
253 // CHECK-INST: uqinch x0, #21
254 // CHECK-ENCODING: [0xa0,0xf6,0x70,0x04]
255 // CHECK-ERROR: instruction requires: sve
256 // CHECK-UNKNOWN: a0 f6 70 04 <unknown>
258 uqinch x0, #22
259 // CHECK-INST: uqinch x0, #22
260 // CHECK-ENCODING: [0xc0,0xf6,0x70,0x04]
261 // CHECK-ERROR: instruction requires: sve
262 // CHECK-UNKNOWN: c0 f6 70 04 <unknown>
264 uqinch x0, #23
265 // CHECK-INST: uqinch x0, #23
266 // CHECK-ENCODING: [0xe0,0xf6,0x70,0x04]
267 // CHECK-ERROR: instruction requires: sve
268 // CHECK-UNKNOWN: e0 f6 70 04 <unknown>
270 uqinch x0, #24
271 // CHECK-INST: uqinch x0, #24
272 // CHECK-ENCODING: [0x00,0xf7,0x70,0x04]
273 // CHECK-ERROR: instruction requires: sve
274 // CHECK-UNKNOWN: 00 f7 70 04 <unknown>
276 uqinch x0, #25
277 // CHECK-INST: uqinch x0, #25
278 // CHECK-ENCODING: [0x20,0xf7,0x70,0x04]
279 // CHECK-ERROR: instruction requires: sve
280 // CHECK-UNKNOWN: 20 f7 70 04 <unknown>
282 uqinch x0, #26
283 // CHECK-INST: uqinch x0, #26
284 // CHECK-ENCODING: [0x40,0xf7,0x70,0x04]
285 // CHECK-ERROR: instruction requires: sve
286 // CHECK-UNKNOWN: 40 f7 70 04 <unknown>
288 uqinch x0, #27
289 // CHECK-INST: uqinch x0, #27
290 // CHECK-ENCODING: [0x60,0xf7,0x70,0x04]
291 // CHECK-ERROR: instruction requires: sve
292 // CHECK-UNKNOWN: 60 f7 70 04 <unknown>
294 uqinch x0, #28
295 // CHECK-INST: uqinch x0, #28
296 // CHECK-ENCODING: [0x80,0xf7,0x70,0x04]
297 // CHECK-ERROR: instruction requires: sve
298 // CHECK-UNKNOWN: 80 f7 70 04 <unknown>
301 // --------------------------------------------------------------------------//
302 // Test compatibility with MOVPRFX instruction.
304 movprfx z0, z7
305 // CHECK-INST: movprfx z0, z7
306 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
307 // CHECK-ERROR: instruction requires: sve
308 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
310 uqinch z0.h
311 // CHECK-INST: uqinch z0.h
312 // CHECK-ENCODING: [0xe0,0xc7,0x60,0x04]
313 // CHECK-ERROR: instruction requires: sve
314 // CHECK-UNKNOWN: e0 c7 60 04 <unknown>
316 movprfx z0, z7
317 // CHECK-INST: movprfx z0, z7
318 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
319 // CHECK-ERROR: instruction requires: sve
320 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
322 uqinch z0.h, pow2, mul #16
323 // CHECK-INST: uqinch z0.h, pow2, mul #16
324 // CHECK-ENCODING: [0x00,0xc4,0x6f,0x04]
325 // CHECK-ERROR: instruction requires: sve
326 // CHECK-UNKNOWN: 00 c4 6f 04 <unknown>
328 movprfx z0, z7
329 // CHECK-INST: movprfx z0, z7
330 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
331 // CHECK-ERROR: instruction requires: sve
332 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
334 uqinch z0.h, pow2
335 // CHECK-INST: uqinch z0.h, pow2
336 // CHECK-ENCODING: [0x00,0xc4,0x60,0x04]
337 // CHECK-ERROR: instruction requires: sve
338 // CHECK-UNKNOWN: 00 c4 60 04 <unknown>