1 // RUN
: llvm-mc
-triple
=arm64
-mattr
=+neon
-mattr
=+crypto
-show-encoding
< %s | FileCheck
%s
2 // RUN
: not llvm-mc
-triple
=arm64
-mattr
=+neon
-show-encoding
< %s
2>&1 | FileCheck
-check-prefix
=CHECK-NO-CRYPTO-ARM64
%s
4 // Check that the assembler can handle the documented syntax for AArch64
6 //------------------------------------------------------------------------------
7 // Instructions for crypto
8 //------------------------------------------------------------------------------
15 // CHECK-NO-CRYPTO
: error
: instruction requires
a CPU feature
not currently enabled
16 // CHECK-NO-CRYPTO-ARM64
: error
: instruction requires
: aes
17 // CHECK
: aese v0.16
b, v1.16
b // encoding
: [0x20,0x48,0x28,0x4e]
18 // CHECK
: aesd v0.16
b, v1.16
b // encoding
: [0x20,0x58,0x28,0x4e]
19 // CHECK
: aesmc v0.16
b, v1.16
b // encoding
: [0x20,0x68,0x28,0x4e]
20 // CHECK
: aesimc v0.16
b, v1.16
b // encoding
: [0x20,0x78,0x28,0x4e]
24 sha256su0 v0.4s
, v1.4s
26 // CHECK
: sha1h s0
, s1
// encoding
: [0x20,0x08,0x28,0x5e]
27 // CHECK
: sha1su1 v0.4s
, v1.4s
// encoding
: [0x20,0x18,0x28,0x5e]
28 // CHECK
: sha256su0 v0.4s
, v1.4s
// encoding
: [0x20,0x28,0x28,0x5e]
33 sha1su0 v0.4s
, v1.4s
, v2.4s
35 sha256h2 q0
, q1
, v2.4s
36 sha256su1 v0.4s
, v1.4s
, v2.4s
38 // CHECK
: sha1c q0
, s1
, v2.4s
// encoding
: [0x20,0x00,0x02,0x5e]
39 // CHECK
: sha1p q0
, s1
, v2.4s
// encoding
: [0x20,0x10,0x02,0x5e]
40 // CHECK
: sha1m q0
, s1
, v2.4s
// encoding
: [0x20,0x20,0x02,0x5e]
41 // CHECK
: sha1su0 v0.4s
, v1.4s
, v2.4s
// encoding
: [0x20,0x30,0x02,0x5e]
42 // CHECK
: sha256h q0
, q1
, v2.4s
// encoding
: [0x20,0x40,0x02,0x5e]
43 // CHECK
: sha256h2 q0
, q1
, v2.4s
// encoding
: [0x20,0x50,0x02,0x5e]
44 // CHECK
: sha256su1 v0.4s
, v1.4s
, v2.4s
// encoding
: [0x20,0x60,0x02,0x5e]