1 // RUN
: not llvm-mc
-arch
=amdgcn
-mcpu
=gfx1010
-mattr
=+wavefrontsize32
,-wavefrontsize64
-show-encoding
%s | FileCheck
-check-prefix
=GFX1032
%s
2 // RUN
: not llvm-mc
-arch
=amdgcn
-mcpu
=gfx1010
-mattr
=-wavefrontsize32
,+wavefrontsize64
-show-encoding
%s | FileCheck
-check-prefix
=GFX1064
%s
3 // RUN
: not llvm-mc
-arch
=amdgcn
-mcpu
=gfx1010
-mattr
=+wavefrontsize32
,-wavefrontsize64
-show-encoding
%s
2>&1 | FileCheck
-check-prefix
=GFX1032-ERR
%s
4 // RUN
: not llvm-mc
-arch
=amdgcn
-mcpu
=gfx1010
-mattr
=-wavefrontsize32
,+wavefrontsize64
-show-encoding
%s
2>&1 | FileCheck
-check-prefix
=GFX1064-ERR
%s
6 v_cmp_ge_i32_e32 s0
, v0
7 // GFX1032
: v_cmp_ge_i32_e32 vcc_lo
, s0
, v0 ; encoding
: [0x00,0x00,0x0c,0x7d]
8 // GFX1064
: v_cmp_ge_i32_e32 vcc
, s0
, v0 ; encoding
: [0x00,0x00,0x0c,0x7d]
10 v_cmp_ge_i32_e32 vcc_lo
, s0
, v1
11 // GFX1032
: v_cmp_ge_i32_e32 vcc_lo
, s0
, v1 ; encoding
: [0x00,0x02,0x0c,0x7d]
12 // GFX1064-ERR
: error
: instruction
not supported on this GPU
14 v_cmp_ge_i32_e32 vcc
, s0
, v2
15 // GFX1032-ERR
: error
: instruction
not supported on this GPU
16 // GFX1064
: v_cmp_ge_i32_e32 vcc
, s0
, v2 ; encoding
: [0x00,0x04,0x0c,0x7d]
18 v_cmp_le_f16_sdwa s0
, v3
, v4 src0_sel
:WORD_1 src1_sel
:DWORD
19 // GFX1032
: v_cmp_le_f16_sdwa s0
, v3
, v4 src0_sel
:WORD_1 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x96,0x7d,0x03,0x80,0x05,0x06]
20 // GFX1064-ERR
: error
: invalid operand for instruction
22 v_cmp_le_f16_sdwa s
[0:1], v3
, v4 src0_sel
:WORD_1 src1_sel
:DWORD
23 // GFX1032-ERR
: error
: invalid operand for instruction
24 // GFX1064
: v_cmp_le_f16_sdwa s
[0:1], v3
, v4 src0_sel
:WORD_1 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x96,0x7d,0x03,0x80,0x05,0x06]
26 v_cmp_class_f32_e32 vcc_lo
, s0
, v0
27 // GFX1032
: v_cmp_class_f32_e32 vcc_lo
, s0
, v0 ; encoding
: [0x00,0x00,0x10,0x7d]
28 // GFX1064-ERR
: error
: instruction
not supported on this GPU
30 v_cmp_class_f32_e32 vcc
, s0
, v0
31 // GFX1032-ERR
: error
: instruction
not supported on this GPU
32 // GFX1064
: v_cmp_class_f32_e32 vcc
, s0
, v0 ; encoding
: [0x00,0x00,0x10,0x7d]
34 // TODO-GFX10
: The following encoding does
not match SP3
's encoding, which is:
35 // [0xf9,0x04,0x1e,0x7d,0x01,0x06,0x06,0x06]
36 v_cmp_class_f16_sdwa vcc_lo, v1, v2 src0_sel:DWORD src1_sel:DWORD
37 // GFX1032: v_cmp_class_f16_sdwa vcc_lo, v1, v2 src0_sel:DWORD src1_sel:DWORD ; encoding: [0xf9,0x04,0x1e,0x7d,0x01,0x00,0x06,0x06]
38 // GFX1064-ERR: error: invalid operand for instruction
40 // TODO-GFX10: The following encoding does not match SP3's encoding
, which is
:
41 // [0xf9,0x04,0x1e,0x7d,0x01,0x06,0x06,0x06]
42 v_cmp_class_f16_sdwa vcc
, v1
, v2 src0_sel
:DWORD src1_sel
:DWORD
43 // GFX1032-ERR
: error
: instruction
not supported on this GPU
44 // GFX1064
: v_cmp_class_f16_sdwa vcc
, v1
, v2 src0_sel
:DWORD src1_sel
:DWORD ; encoding
: [0xf9,0x04,0x1e,0x7d,0x01,0x00,0x06,0x06]
46 v_cmp_class_f16_sdwa s0
, v1
, v2 src0_sel
:DWORD src1_sel
:DWORD
47 // GFX1032
: v_cmp_class_f16_sdwa s0
, v1
, v2 src0_sel
:DWORD src1_sel
:DWORD ; encoding
: [0xf9,0x04,0x1e,0x7d,0x01,0x80,0x06,0x06]
48 // GFX1064-ERR
: error
: invalid operand for instruction
50 v_cmp_class_f16_sdwa s
[0:1], v1
, v2 src0_sel
:DWORD src1_sel
:DWORD
51 // GFX1032-ERR
: error
: invalid operand for instruction
52 // GFX1064
: v_cmp_class_f16_sdwa s
[0:1], v1
, v2 src0_sel
:DWORD src1_sel
:DWORD ; encoding
: [0xf9,0x04,0x1e,0x7d,0x01,0x80,0x06,0x06]
54 v_cndmask_b32_e32 v1
, v2
, v3
,
55 // GFX1032
: v_cndmask_b32_e32 v1
, v2
, v3
, vcc_lo ; encoding
: [0x02,0x07,0x02,0x02]
56 // GFX1064
: v_cndmask_b32_e32 v1
, v2
, v3
, vcc ; encoding
: [0x02,0x07,0x02,0x02]
58 v_cndmask_b32_e32 v1
, v2
, v3
, vcc_lo
59 // GFX1032
: v_cndmask_b32_e32 v1
, v2
, v3
, vcc_lo ; encoding
: [0x02,0x07,0x02,0x02]
60 // GFX1064-ERR
: error
: instruction
not supported on this GPU
62 v_cndmask_b32_e32 v1
, v2
, v3
, vcc
63 // GFX1032-ERR
: error
: instruction
not supported on this GPU
64 // GFX1064
: v_cndmask_b32_e32 v1
, v2
, v3
, vcc ; encoding
: [0x02,0x07,0x02,0x02]
66 v_add_co_u32_e32 v2
, vcc_lo
, s0
, v2
67 // GFX1032-ERR
: error
: instruction
not supported on this GPU
68 // GFX1064-ERR
: error
: instruction
not supported on this GPU
70 v_add_co_u32_e32 v2
, vcc
, s0
, v2
71 // GFX1032-ERR
: error
: instruction
not supported on this GPU
72 // GFX1064-ERR
: error
: instruction
not supported on this GPU
74 v_add_co_ci_u32_e32 v3
, vcc_lo
, v3
, v4
, vcc_lo
75 // GFX1032
: v_add_co_ci_u32_e32 v3
, vcc_lo
, v3
, v4
, vcc_lo ; encoding
: [0x03,0x09,0x06,0x50]
76 // GFX1064-ERR
: error
: instruction
not supported on this GPU
78 v_add_co_ci_u32_e32 v3
, vcc
, v3
, v4
, vcc
79 // GFX1032-ERR
: error
: instruction
not supported on this GPU
80 // GFX1064
: v_add_co_ci_u32_e32 v3
, vcc
, v3
, v4
, vcc ; encoding
: [0x03,0x09,0x06,0x50]
82 v_add_co_ci_u32_e32 v3
, v3
, v4
83 // GFX1032
: v_add_co_ci_u32_e32 v3
, vcc_lo
, v3
, v4
, vcc_lo ; encoding
: [0x03,0x09,0x06,0x50]
84 // GFX1064
: v_add_co_ci_u32_e32 v3
, vcc
, v3
, v4
, vcc ; encoding
: [0x03,0x09,0x06,0x50]
86 v_sub_co_u32_e32 v2
, vcc_lo
, s0
, v2
87 // GFX1032-ERR
: error
: instruction
not supported on this GPU
88 // GFX1064-ERR
: error
: instruction
not supported on this GPU
90 v_sub_co_u32_e32 v2
, vcc
, s0
, v2
91 // GFX1032-ERR
: error
: instruction
not supported on this GPU
92 // GFX1064-ERR
: error
: instruction
not supported on this GPU
94 v_subrev_co_u32_e32 v2
, vcc_lo
, s0
, v2
95 // GFX1032-ERR
: error
: instruction
not supported on this GPU
96 // GFX1064-ERR
: error
: instruction
not supported on this GPU
98 v_subrev_co_u32_e32 v2
, vcc
, s0
, v2
99 // GFX1032-ERR
: error
: instruction
not supported on this GPU
100 // GFX1064-ERR
: error
: instruction
not supported on this GPU
102 v_sub_co_ci_u32_e32 v3
, vcc_lo
, v3
, v4
, vcc_lo
103 // GFX1032
: v_sub_co_ci_u32_e32 v3
, vcc_lo
, v3
, v4
, vcc_lo ; encoding
: [0x03,0x09,0x06,0x52]
104 // GFX1064-ERR
: error
: instruction
not supported on this GPU
106 v_sub_co_ci_u32_e32 v3
, vcc
, v3
, v4
, vcc
107 // GFX1032-ERR
: error
: instruction
not supported on this GPU
108 // GFX1064
: v_sub_co_ci_u32_e32 v3
, vcc
, v3
, v4
, vcc ; encoding
: [0x03,0x09,0x06,0x52]
110 v_sub_co_ci_u32_e32 v3
, v3
, v4
111 // GFX1032
: v_sub_co_ci_u32_e32 v3
, vcc_lo
, v3
, v4
, vcc_lo ; encoding
: [0x03,0x09,0x06,0x52]
112 // GFX1064
: v_sub_co_ci_u32_e32 v3
, vcc
, v3
, v4
, vcc ; encoding
: [0x03,0x09,0x06,0x52]
114 v_subrev_co_ci_u32_e32 v1
, vcc_lo
, 0, v1
, vcc_lo
115 // GFX1032
: v_subrev_co_ci_u32_e32 v1
, vcc_lo
, 0, v1
, vcc_lo ; encoding
: [0x80,0x02,0x02,0x54]
116 // GFX1064-ERR
: error
: instruction
not supported on this GPU
118 v_subrev_co_ci_u32_e32 v1
, vcc
, 0, v1
, vcc
119 // GFX1032-ERR
: error
: instruction
not supported on this GPU
120 // GFX1064
: v_subrev_co_ci_u32_e32 v1
, vcc
, 0, v1
, vcc ; encoding
: [0x80,0x02,0x02,0x54]
122 v_subrev_co_ci_u32_e32 v1
, 0, v1
123 // GFX1032
: v_subrev_co_ci_u32_e32 v1
, vcc_lo
, 0, v1
, vcc_lo ; encoding
: [0x80,0x02,0x02,0x54]
124 // GFX1064
: v_subrev_co_ci_u32_e32 v1
, vcc
, 0, v1
, vcc ; encoding
: [0x80,0x02,0x02,0x54]
126 v_add_co_u32_sdwa v0
, vcc_lo
, v0
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:DWORD src1_sel
:BYTE_0
127 // GFX1032-ERR
: error
: invalid operand
128 // GFX1064-ERR
: error
: invalid operand
130 v_add_co_u32_sdwa v0
, vcc
, v0
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:DWORD src1_sel
:BYTE_0
131 // GFX1032-ERR
: error
: instruction
not supported
132 // GFX1064-ERR
: error
: instruction
not supported
134 v_add_co_u32_sdwa v0
, v0
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:DWORD src1_sel
:BYTE_0
135 // GFX1032-ERR
: error
: not a valid operand
136 // GFX1064-ERR
: error
: not a valid operand
138 v_add_co_ci_u32_sdwa v1
, vcc_lo
, v1
, v4
, vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
139 // GFX1032
: v_add_co_ci_u32_sdwa v1
, vcc_lo
, v1
, v4
, vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x50,0x01,0x06,0x00,0x06]
140 // GFX1064-ERR
: error
: instruction
not supported on this GPU
142 v_add_co_ci_u32_sdwa v1
, vcc
, v1
, v4
, vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
143 // GFX1032-ERR
: error
: instruction
not supported on this GPU
144 // GFX1064
: v_add_co_ci_u32_sdwa v1
, vcc
, v1
, v4
, vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x50,0x01,0x06,0x00,0x06]
146 v_add_co_ci_u32_sdwa v1
, v1
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
147 // GFX1032
: v_add_co_ci_u32_sdwa v1
, vcc_lo
, v1
, v4
, vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x50,0x01,0x06,0x00,0x06]
148 // GFX1064
: v_add_co_ci_u32_sdwa v1
, vcc
, v1
, v4
, vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x50,0x01,0x06,0x00,0x06]
150 v_sub_co_u32_sdwa v0
, vcc_lo
, v0
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:DWORD src1_sel
:BYTE_0
151 // GFX1032-ERR
: error
: invalid operand
152 // GFX1064-ERR
: error
: invalid operand
154 v_sub_co_u32_sdwa v0
, vcc
, v0
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:DWORD src1_sel
:BYTE_0
155 // GFX1032-ERR
: error
: instruction
not supported
156 // GFX1064-ERR
: error
: instruction
not supported
158 v_sub_co_u32_sdwa v0
, v0
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:DWORD src1_sel
:BYTE_0
159 // GFX1032-ERR
: error
: not a valid operand
160 // GFX1064-ERR
: error
: not a valid operand
162 v_subrev_co_u32_sdwa v0
, vcc_lo
, v0
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:DWORD src1_sel
:BYTE_0
163 // GFX1032-ERR
: error
: invalid operand
164 // GFX1064-ERR
: error
: invalid operand
166 v_subrev_co_u32_sdwa v0
, vcc
, v0
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:DWORD src1_sel
:BYTE_0
167 // GFX1032-ERR
: error
: instruction
not supported
168 // GFX1064-ERR
: error
: instruction
not supported
170 v_subrev_co_u32_sdwa v0
, v0
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:DWORD src1_sel
:BYTE_0
171 // GFX1032-ERR
: error
: not a valid operand
172 // GFX1064-ERR
: error
: not a valid operand
174 v_sub_co_ci_u32_sdwa v1
, vcc_lo
, v1
, v4
, vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
175 // GFX1032
: v_sub_co_ci_u32_sdwa v1
, vcc_lo
, v1
, v4
, vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x52,0x01,0x06,0x00,0x06]
176 // GFX1064-ERR
: error
: instruction
not supported on this GPU
178 v_sub_co_ci_u32_sdwa v1
, vcc
, v1
, v4
, vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
179 // GFX1032-ERR
: error
: instruction
not supported on this GPU
180 // GFX1064
: v_sub_co_ci_u32_sdwa v1
, vcc
, v1
, v4
, vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x52,0x01,0x06,0x00,0x06]
182 v_sub_co_ci_u32_sdwa v1
, v1
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
183 // GFX1032
: v_sub_co_ci_u32_sdwa v1
, vcc_lo
, v1
, v4
, vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x52,0x01,0x06,0x00,0x06]
184 // GFX1064
: v_sub_co_ci_u32_sdwa v1
, vcc
, v1
, v4
, vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x52,0x01,0x06,0x00,0x06]
186 v_subrev_co_ci_u32_sdwa v1
, vcc_lo
, v1
, v4
, vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
187 // GFX1032
: v_subrev_co_ci_u32_sdwa v1
, vcc_lo
, v1
, v4
, vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x54,0x01,0x06,0x00,0x06]
188 // GFX1064-ERR
: error
: instruction
not supported on this GPU
190 v_subrev_co_ci_u32_sdwa v1
, vcc
, v1
, v4
, vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
191 // GFX1032-ERR
: error
: instruction
not supported on this GPU
192 // GFX1064
: v_subrev_co_ci_u32_sdwa v1
, vcc
, v1
, v4
, vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x54,0x01,0x06,0x00,0x06]
194 v_subrev_co_ci_u32_sdwa v1
, v1
, v4 dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
195 // GFX1032
: v_subrev_co_ci_u32_sdwa v1
, vcc_lo
, v1
, v4
, vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x54,0x01,0x06,0x00,0x06]
196 // GFX1064
: v_subrev_co_ci_u32_sdwa v1
, vcc
, v1
, v4
, vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x54,0x01,0x06,0x00,0x06]
198 v_add_co_ci_u32 v1
, sext
(v1
), sext
(v4
) dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
199 // GFX1032
: v_add_co_ci_u32_sdwa v1
, vcc_lo
, sext
(v1
), sext
(v4
), vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x50,0x01,0x06,0x08,0x0e]
200 // GFX1064
: v_add_co_ci_u32_sdwa v1
, vcc
, sext
(v1
), sext
(v4
), vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x50,0x01,0x06,0x08,0x0e]
202 v_add_co_ci_u32_sdwa v1
, vcc_lo
, sext
(v1
), sext
(v4
), vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
203 // GFX1032
: v_add_co_ci_u32_sdwa v1
, vcc_lo
, sext
(v1
), sext
(v4
), vcc_lo dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x50,0x01,0x06,0x08,0x0e]
204 // GFX1064-ERR
: error
: instruction
not supported on this GPU
206 v_add_co_ci_u32_sdwa v1
, vcc
, sext
(v1
), sext
(v4
), vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD
207 // GFX1032-ERR
: error
: instruction
not supported on this GPU
208 // GFX1064
: v_add_co_ci_u32_sdwa v1
, vcc
, sext
(v1
), sext
(v4
), vcc dst_sel
:DWORD dst_unused
:UNUSED_PAD src0_sel
:BYTE_0 src1_sel
:DWORD ; encoding
: [0xf9,0x08,0x02,0x50,0x01,0x06,0x08,0x0e]
210 v_add_co_u32_dpp v5
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
211 // GFX1032-ERR
: error
: not a valid operand
212 // GFX1064-ERR
: error
: not a valid operand
214 v_add_co_u32_dpp v5
, vcc_lo
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
215 // GFX1032-ERR
: error
: not a valid operand
216 // GFX1064-ERR
: error
: not a valid operand
218 v_add_co_u32_dpp v5
, vcc
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
219 // GFX1032-ERR
: error
: not a valid operand
220 // GFX1064-ERR
: error
: not a valid operand
222 v_add_co_ci_u32_dpp v5
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
223 // GFX1032
: v_add_co_ci_u32_dpp v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 ; encoding
: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00]
224 // GFX1064
: v_add_co_ci_u32_dpp v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 ; encoding
: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00]
226 v_add_co_ci_u32_dpp v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
227 // GFX1032
: v_add_co_ci_u32_dpp v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 ; encoding
: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00]
228 // GFX1064-ERR
: error
: instruction
not supported on this GPU
230 v_add_co_ci_u32_dpp v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
231 // GFX1032-ERR
: error
: instruction
not supported on this GPU
232 // GFX1064
: v_add_co_ci_u32_dpp v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 ; encoding
: [0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x00]
234 v_sub_co_u32_dpp v5
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
235 // GFX1032-ERR
: error
: not a valid operand
236 // GFX1064-ERR
: error
: not a valid operand
238 v_sub_co_u32_dpp v5
, vcc_lo
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
239 // GFX1032-ERR
: error
: not a valid operand
240 // GFX1064-ERR
: error
: not a valid operand
242 v_sub_co_u32_dpp v5
, vcc
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
243 // GFX1032-ERR
: error
: not a valid operand
244 // GFX1064-ERR
: error
: not a valid operand
246 v_sub_co_ci_u32_dpp v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
247 // GFX1032
: v_sub_co_ci_u32_dpp v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 ; encoding
: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00]
248 // GFX1064-ERR
: error
: instruction
not supported on this GPU
250 v_sub_co_ci_u32_dpp v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
251 // GFX1032-ERR
: error
: instruction
not supported on this GPU
252 // GFX1064
: v_sub_co_ci_u32_dpp v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 ; encoding
: [0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00]
254 v_subrev_co_u32_dpp v5
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
255 // GFX1032-ERR
: error
: not a valid operand
256 // GFX1064-ERR
: error
: not a valid operand
258 v_subrev_co_u32_dpp v5
, vcc_lo
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
259 // GFX1032-ERR
: error
: not a valid operand
260 // GFX1064-ERR
: error
: not a valid operand
262 v_subrev_co_u32_dpp v5
, vcc
, v1
, v2 quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
263 // GFX1032-ERR
: error
: not a valid operand
264 // GFX1064-ERR
: error
: not a valid operand
266 v_subrev_co_ci_u32_dpp v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
267 // GFX1032
: v_subrev_co_ci_u32_dpp v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 ; encoding
: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00]
268 // GFX1064-ERR
: error
: instruction
not supported on this GPU
270 v_subrev_co_ci_u32_dpp v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0
271 // GFX1032-ERR
: error
: instruction
not supported on this GPU
272 // GFX1064
: v_subrev_co_ci_u32_dpp v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 ; encoding
: [0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00]
274 v_add_co_u32 v0
, s0
, v0
, v2
275 // GFX1032
: v_add_co_u32_e64 v0
, s0
, v0
, v2 ; encoding
: [0x00,0x00,0x0f,0xd7,0x00,0x05,0x02,0x00]
276 // GFX1064-ERR
: error
: invalid operand for instruction
278 v_add_co_u32_e64 v0
, s0
, v0
, v2
279 // GFX1032
: v_add_co_u32_e64 v0
, s0
, v0
, v2 ; encoding
: [0x00,0x00,0x0f,0xd7,0x00,0x05,0x02,0x00]
280 // GFX1064-ERR
: error
: invalid operand for instruction
282 v_add_co_ci_u32_e64 v4
, s0
, v1
, v5
, s2
283 // GFX1032
: v_add_co_ci_u32_e64 v4
, s0
, v1
, v5
, s2 ; encoding
: [0x04,0x00,0x28,0xd5,0x01,0x0b,0x0a,0x00]
284 // GFX1064-ERR
: error
: invalid operand for instruction
286 v_sub_co_u32 v0
, s0
, v0
, v2
287 // GFX1032
: v_sub_co_u32_e64 v0
, s0
, v0
, v2 ; encoding
: [0x00,0x00,0x10,0xd7,0x00,0x05,0x02,0x00]
288 // GFX1064-ERR
: error
: invalid operand for instruction
290 v_sub_co_u32_e64 v0
, s0
, v0
, v2
291 // GFX1032
: v_sub_co_u32_e64 v0
, s0
, v0
, v2 ; encoding
: [0x00,0x00,0x10,0xd7,0x00,0x05,0x02,0x00]
292 // GFX1064-ERR
: error
: invalid operand for instruction
294 v_sub_co_ci_u32_e64 v4
, s0
, v1
, v5
, s2
295 // GFX1032
: v_sub_co_ci_u32_e64 v4
, s0
, v1
, v5
, s2 ; encoding
: [0x04,0x00,0x29,0xd5,0x01,0x0b,0x0a,0x00]
296 // GFX1064-ERR
: error
: invalid operand for instruction
298 v_subrev_co_u32 v0
, s0
, v0
, v2
299 // GFX1032
: v_subrev_co_u32_e64 v0
, s0
, v0
, v2 ; encoding
: [0x00,0x00,0x19,0xd7,0x00,0x05,0x02,0x00]
300 // GFX1064-ERR
: error
: invalid operand for instruction
302 v_subrev_co_u32_e64 v0
, s0
, v0
, v2
303 // GFX1032
: v_subrev_co_u32_e64 v0
, s0
, v0
, v2 ; encoding
: [0x00,0x00,0x19,0xd7,0x00,0x05,0x02,0x00]
304 // GFX1064-ERR
: error
: invalid operand for instruction
306 v_subrev_co_ci_u32_e64 v4
, s0
, v1
, v5
, s2
307 // GFX1032
: v_subrev_co_ci_u32_e64 v4
, s0
, v1
, v5
, s2 ; encoding
: [0x04,0x00,0x2a,0xd5,0x01,0x0b,0x0a,0x00]
308 // GFX1064-ERR
: error
: invalid operand for instruction
310 v_add_co_u32 v0
, s
[0:1], v0
, v2
311 // GFX1032-ERR
: error
: invalid operand for instruction
312 // GFX1064
: v_add_co_u32_e64 v0
, s
[0:1], v0
, v2 ; encoding
: [0x00,0x00,0x0f,0xd7,0x00,0x05,0x02,0x00]
314 v_add_co_u32_e64 v0
, s
[0:1], v0
, v2
315 // GFX1032-ERR
: error
: invalid operand for instruction
316 // GFX1064
: v_add_co_u32_e64 v0
, s
[0:1], v0
, v2 ; encoding
: [0x00,0x00,0x0f,0xd7,0x00,0x05,0x02,0x00]
318 v_add_co_ci_u32_e64 v4
, s
[0:1], v1
, v5
, s
[2:3]
319 // GFX1032-ERR
: error
: invalid operand for instruction
320 // GFX1064
: v_add_co_ci_u32_e64 v4
, s
[0:1], v1
, v5
, s
[2:3] ; encoding
: [0x04,0x00,0x28,0xd5,0x01,0x0b,0x0a,0x00]
322 v_sub_co_u32 v0
, s
[0:1], v0
, v2
323 // GFX1032-ERR
: error
: invalid operand for instruction
324 // GFX1064
: v_sub_co_u32_e64 v0
, s
[0:1], v0
, v2 ; encoding
: [0x00,0x00,0x10,0xd7,0x00,0x05,0x02,0x00]
326 v_sub_co_u32_e64 v0
, s
[0:1], v0
, v2
327 // GFX1032-ERR
: error
: invalid operand for instruction
328 // GFX1064
: v_sub_co_u32_e64 v0
, s
[0:1], v0
, v2 ; encoding
: [0x00,0x00,0x10,0xd7,0x00,0x05,0x02,0x00]
330 v_sub_co_ci_u32_e64 v4
, s
[0:1], v1
, v5
, s
[2:3]
331 // GFX1032-ERR
: error
: invalid operand for instruction
332 // GFX1064
: v_sub_co_ci_u32_e64 v4
, s
[0:1], v1
, v5
, s
[2:3] ; encoding
: [0x04,0x00,0x29,0xd5,0x01,0x0b,0x0a,0x00]
334 v_subrev_co_u32 v0
, s
[0:1], v0
, v2
335 // GFX1032-ERR
: error
: invalid operand for instruction
336 // GFX1064
: v_subrev_co_u32_e64 v0
, s
[0:1], v0
, v2 ; encoding
: [0x00,0x00,0x19,0xd7,0x00,0x05,0x02,0x00]
338 v_subrev_co_u32_e64 v0
, s
[0:1], v0
, v2
339 // GFX1032-ERR
: error
: invalid operand for instruction
340 // GFX1064
: v_subrev_co_u32_e64 v0
, s
[0:1], v0
, v2 ; encoding
: [0x00,0x00,0x19,0xd7,0x00,0x05,0x02,0x00]
342 v_subrev_co_ci_u32_e64 v4
, s
[0:1], v1
, v5
, s
[2:3]
343 // GFX1032-ERR
: error
: invalid operand for instruction
344 // GFX1064
: v_subrev_co_ci_u32_e64 v4
, s
[0:1], v1
, v5
, s
[2:3] ; encoding
: [0x04,0x00,0x2a,0xd5,0x01,0x0b,0x0a,0x00]
346 v_add_co_ci_u32_e64 v4
, vcc_lo
, v1
, v5
, s2
347 // GFX1032
: v_add_co_ci_u32_e64 v4
, vcc_lo
, v1
, v5
, s2 ; encoding
: [0x04,0x6a,0x28,0xd5,0x01,0x0b,0x0a,0x00]
348 // GFX1064-ERR
: error
: invalid operand for instruction
350 v_add_co_ci_u32_e64 v4
, vcc
, v1
, v5
, s
[2:3]
351 // GFX1032-ERR
: error
: invalid operand for instruction
352 // GFX1064
: v_add_co_ci_u32_e64 v4
, vcc
, v1
, v5
, s
[2:3] ; encoding
: [0x04,0x6a,0x28,0xd5,0x01,0x0b,0x0a,0x00]
354 v_add_co_ci_u32_e64 v4
, s0
, v1
, v5
, vcc_lo
355 // GFX1032
: v_add_co_ci_u32_e64 v4
, s0
, v1
, v5
, vcc_lo ; encoding
: [0x04,0x00,0x28,0xd5,0x01,0x0b,0xaa,0x01]
356 // GFX1064-ERR
: error
: invalid operand for instruction
358 v_add_co_ci_u32_e64 v4
, s
[0:1], v1
, v5
, vcc
359 // GFX1032-ERR
: error
: invalid operand for instruction
360 // GFX1064
: v_add_co_ci_u32_e64 v4
, s
[0:1], v1
, v5
, vcc ; encoding
: [0x04,0x00,0x28,0xd5,0x01,0x0b,0xaa,0x01]
362 v_div_scale_f32 v2
, s2
, v0
, v0
, v2
363 // GFX1032
: v_div_scale_f32 v2
, s2
, v0
, v0
, v2 ; encoding
: [0x02,0x02,0x6d,0xd5,0x00,0x01,0x0a,0x04]
364 // GFX1064-ERR
: error
: invalid operand for instruction
366 v_div_scale_f32 v2
, s
[2:3], v0
, v0
, v2
367 // GFX1032-ERR
: error
: invalid operand for instruction
368 // GFX1064
: v_div_scale_f32 v2
, s
[2:3], v0
, v0
, v2 ; encoding
: [0x02,0x02,0x6d,0xd5,0x00,0x01,0x0a,0x04]
370 v_div_scale_f64 v
[2:3], s2
, v
[0:1], v
[0:1], v
[2:3]
371 // GFX1032
: v_div_scale_f64 v
[2:3], s2
, v
[0:1], v
[0:1], v
[2:3] ; encoding
: [0x02,0x02,0x6e,0xd5,0x00,0x01,0x0a,0x04]
372 // GFX1064-ERR
: error
: invalid operand for instruction
374 v_div_scale_f64 v
[2:3], s
[2:3], v
[0:1], v
[0:1], v
[2:3]
375 // GFX1032-ERR
: error
: invalid operand for instruction
376 // GFX1064
: v_div_scale_f64 v
[2:3], s
[2:3], v
[0:1], v
[0:1], v
[2:3] ; encoding
: [0x02,0x02,0x6e,0xd5,0x00,0x01,0x0a,0x04]
378 v_mad_i64_i32 v
[0:1], s6
, v0
, v1
, v
[2:3]
379 // GFX1032
: v_mad_i64_i32 v
[0:1], s6
, v0
, v1
, v
[2:3] ; encoding
: [0x00,0x06,0x77,0xd5,0x00,0x03,0x0a,0x04]
380 // GFX1064-ERR
: error
: invalid operand for instruction
382 v_mad_i64_i32 v
[0:1], s
[6:7], v0
, v1
, v
[2:3]
383 // GFX1032-ERR
: error
: invalid operand for instruction
384 // GFX1064
: v_mad_i64_i32 v
[0:1], s
[6:7], v0
, v1
, v
[2:3] ; encoding
: [0x00,0x06,0x77,0xd5,0x00,0x03,0x0a,0x04]
386 v_mad_u64_u32 v
[0:1], s6
, v0
, v1
, v
[2:3]
387 // GFX1032
: v_mad_u64_u32 v
[0:1], s6
, v0
, v1
, v
[2:3] ; encoding
: [0x00,0x06,0x76,0xd5,0x00,0x03,0x0a,0x04]
388 // GFX1064-ERR
: error
: invalid operand for instruction
390 v_mad_u64_u32 v
[0:1], s
[6:7], v0
, v1
, v
[2:3]
391 // GFX1032-ERR
: error
: invalid operand for instruction
392 // GFX1064
: v_mad_u64_u32 v
[0:1], s
[6:7], v0
, v1
, v
[2:3] ; encoding
: [0x00,0x06,0x76,0xd5,0x00,0x03,0x0a,0x04]
394 v_cmpx_neq_f32_e32 v0
, v1
395 // GFX1032
: v_cmpx_neq_f32_e32 v0
, v1 ; encoding
: [0x00,0x03,0x3a,0x7c]
396 // GFX1064
: v_cmpx_neq_f32_e32 v0
, v1 ; encoding
: [0x00,0x03,0x3a,0x7c]
398 v_cmpx_neq_f32_sdwa v0
, v1 src0_sel
:WORD_1 src1_sel
:DWORD
399 // GFX1032
: v_cmpx_neq_f32_sdwa v0
, v1 src0_sel
:WORD_1 src1_sel
:DWORD ; encoding
: [0xf9,0x02,0x3a,0x7c,0x00,0x00,0x05,0x06]
400 // GFX1064
: v_cmpx_neq_f32_sdwa v0
, v1 src0_sel
:WORD_1 src1_sel
:DWORD ; encoding
: [0xf9,0x02,0x3a,0x7c,0x00,0x00,0x05,0x06]
402 v_cmpx_eq_u32_sdwa v0
, 1 src0_sel
:WORD_1 src1_sel
:DWORD
403 // GFX1032
: v_cmpx_eq_u32_sdwa v0
, 1 src0_sel
:WORD_1 src1_sel
:DWORD ; encoding
: [0xf9,0x02,0xa5,0x7d,0x00,0x00,0x05,0x86]
404 // GFX1064
: v_cmpx_eq_u32_sdwa v0
, 1 src0_sel
:WORD_1 src1_sel
:DWORD ; encoding
: [0xf9,0x02,0xa5,0x7d,0x00,0x00,0x05,0x86]
406 v_cmpx_class_f32_e64 v0
, 1
407 // GFX1032
: v_cmpx_class_f32_e64 v0
, 1 ; encoding
: [0x00,0x00,0x98,0xd4,0x00,0x03,0x01,0x00]
408 // GFX1064
: v_cmpx_class_f32_e64 v0
, 1 ; encoding
: [0x00,0x00,0x98,0xd4,0x00,0x03,0x01,0x00]
410 v_cmpx_class_f32_sdwa v0
, 1 src0_sel
:WORD_1 src1_sel
:DWORD
411 // GFX1032
: v_cmpx_class_f32_sdwa v0
, 1 src0_sel
:WORD_1 src1_sel
:DWORD ; encoding
: [0xf9,0x02,0x31,0x7d,0x00,0x00,0x05,0x86]
412 // GFX1064
: v_cmpx_class_f32_sdwa v0
, 1 src0_sel
:WORD_1 src1_sel
:DWORD ; encoding
: [0xf9,0x02,0x31,0x7d,0x00,0x00,0x05,0x86]