test/MC/ARM/arm-reg-addr-errors.s

   1 @ RUN: not llvm-mc -triple=armv7a-eabi < %s 2>&1 | FileCheck %s
   2
   3 ldr r4, [s1, #12]
   4 @ CHECK: [[@LINE-1]]{{.*}}error: invalid operand for instruction
   5
   6 ldr r4, [d2, #12]
   7 @ CHECK: [[@LINE-1]]{{.*}}error: invalid operand for instruction
   8
   9 ldr r4, [q3, #12]
  10 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  11 ldr r4, [cpsr, #12]
  12 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  13 ldr r4, [r1, s12]
  14 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  15 ldr r4, [r1, d12]
  16 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  17 ldr r4, [r1, q12]
  18 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  19 ldr r4, [r1, cpsr]
  20 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  21 ldr r4, [r3], s12
  22 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  23 ldr r4, [r3], d12
  24 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  25 ldr r4, [r3], q12
  26 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  27 ldr r4, [r3], cpsr
  28 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  29 add r3, r0, s1, lsl #2
  30 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  31 add r3, r0, d1, lsl #2
  32 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  33 add r3, r0, q1, lsl #2
  34 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  35 add r3, r0, cpsr, lsl #2
  36 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  37 add r3, r0, r1, lsl s6
  38 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  39 add r3, r0, r1, lsl d6
  40 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  41 add r3, r0, r1, lsl q6
  42 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  43 add r3, r0, r1, lsl cpsr
  44 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  45 ldrd r2, r3, [s4]
  46 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  47 ldrd r2, r3, [r4, s5]
  48 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction
  49 ldrd r2, r3, [r4], s5
  50 @ CHECK: [[@LINE-1]]{{.*}} invalid operand for instruction