[llvm-readobj] - Simplify stack-sizes.test test case.
[llvm-complete.git] / test / MC / ARM / big-endian-arm-fixup.s
blob5fb9cef5028d1eb0b18fba6d5f9dce44254b6aad
1 // RUN: llvm-mc -triple=armeb-eabi -mattr v7,vfp2 -filetype=obj < %s | llvm-objdump -s - | FileCheck %s
3 .syntax unified
4 .text
5 .align 2
6 .code 32
8 @ARM::fixup_arm_condbl
9 .section s_condbl,"ax",%progbits
10 // CHECK-LABEL: Contents of section s_condbl
11 // CHECK: 0000 0b000002
12 bleq condbl_label+16
13 condbl_label:
15 @ARM::fixup_arm_uncondbl
16 .section s_uncondbl,"ax",%progbits
17 // CHECK-LABEL: Contents of section s_uncondbl
18 // CHECK: 0000 eb000002
19 bl uncond_label+16
20 uncond_label:
22 @ARM::fixup_arm_blx
23 .section s_blx,"ax",%progbits
24 // CHECK-LABEL: Contents of section s_blx
25 // CHECK: 0000 fa000002
26 blx blx_label+16
27 blx_label:
29 @ARM::fixup_arm_uncondbranch
30 .section s_uncondbranch,"ax",%progbits
31 // CHECK-LABEL: Contents of section s_uncondbranch
32 // CHECK: 0000 ea000003
33 b uncondbranch_label+16
34 uncondbranch_label:
36 @ARM::fixup_arm_condbranch
37 .section s_condbranch,"ax",%progbits
38 // CHECK-LABEL: Contents of section s_condbranch
39 // CHECK: 0000 0a000003
40 beq condbranch_label+16
41 condbranch_label:
43 @ARM::fixup_arm_pcrel_10
44 .section s_arm_pcrel_10,"ax",%progbits
45 // CHECK-LABEL: Contents of section s_arm_pcrel_10
46 // CHECK: 0000 ed9f0b03
47 vldr d0, arm_pcrel_10_label+16
48 arm_pcrel_10_label:
50 @ARM::fixup_arm_ldst_pcrel_12
51 .section s_arm_ldst_pcrel_12,"ax",%progbits
52 // CHECK-LABEL: Contents of section s_arm_ldst_pcrel_12
53 // CHECK: 0000 e59f000c
54 ldr r0, arm_ldst_pcrel_12_label+16
55 arm_ldst_pcrel_12_label:
57 @ARM::fixup_arm_adr_pcrel_12
58 .section s_arm_adr_pcrel_12,"ax",%progbits
59 // CHECK-LABEL: Contents of section s_arm_adr_pcrel_12
60 // CHECK: 0000 e28f0010
61 adr r0, arm_adr_pcrel_12_label+20
62 arm_adr_pcrel_12_label:
64 @ARM::fixup_arm_adr_pcrel_10_unscaled
65 .section s_arm_adr_pcrel_10_unscaled,"ax",%progbits
66 // CHECK-LABEL: Contents of section s_arm_adr_pcrel_10_unscaled
67 // CHECK: 0000 e1cf01d4
68 ldrd r0, r1, arm_adr_pcrel_10_unscaled_label+24
69 arm_adr_pcrel_10_unscaled_label:
71 @ARM::fixup_arm_movw_lo16
72 .section s_movw,"ax",%progbits
73 // CHECK-LABEL: Contents of section s_movw
74 // CHECK: 0000 e3000008
75 movw r0, :lower16:(some_label+8)
77 @ARM::fixup_arm_movt_hi16
78 .section s_movt,"ax",%progbits
79 // CHECK-LABEL: Contents of section s_movt
80 // CHECK: 0000 e34f0ffc
81 movt r0, :upper16:GOT-(movt_label)
82 movt_label:
84 @FK_Data_1
85 .section s_fk_data_1
86 // CHECK-LABEL: Contents of section s_fk_data_1
87 // CHECK: 0000 01
88 fk_data1_l_label:
89 .byte fk_data1_h_label-fk_data1_l_label
90 fk_data1_h_label:
92 @FK_Data_2
93 .section s_fk_data_2
94 // CHECK-LABEL: Contents of section s_fk_data_2
95 // CHECK: 0000 0002
96 fk_data2_l_label:
97 .short fk_data2_h_label-fk_data2_l_label
98 fk_data2_h_label:
100 @FK_Data_4
101 .section s_fk_data_4
102 // CHECK-LABEL: Contents of section s_fk_data_4
103 // CHECK: 0000 00000004
104 fk_data4_l_label:
105 .long fk_data4_h_label-fk_data4_l_label
106 fk_data4_h_label: