[llvm-readobj] - Simplify stack-sizes.test test case.
[llvm-complete.git] / test / MC / ARM / ldrd-strd-gnu-sp.s
blob3d6db3bf422ef8eb529a50920911bc1d9d2dce35
1 // PR19320
2 // RUN: not llvm-mc -triple=armv7a-linux-gnueabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=V7
3 // RUN: llvm-mc -triple=armv8a-linux-gnueabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=V8
4 .text
6 // This tries to use the GNU ldrd/strd alias to create an ldrd/strd instruction
7 // using the sp register. This is valid for V8, but not earlier architectures.
9 .arm
11 // V7: error: invalid instruction
12 // V8: ldrd r12, sp, [r0, #32] @ encoding: [0xd0,0xc2,0xc0,0xe1]
13 ldrd r12, [r0, #32]
15 // V7: error: invalid instruction
16 // V8: strd r12, sp, [r0, #32] @ encoding: [0xf0,0xc2,0xc0,0xe1]
17 strd r12, [r0, #32]
19 .thumb
21 // V7: error: invalid instruction
22 // V8: ldrd r12, sp, [r0, #32] @ encoding: [0xd0,0xe9,0x08,0xcd]
23 ldrd r12, [r0, #32]
25 // V7: error: invalid instruction
26 // V8: strd r12, sp, [r0, #32] @ encoding: [0xc0,0xe9,0x08,0xcd]
27 strd r12, [r0, #32]