test/MC/ARM/lsl-zero-errors.s

   1 // RUN: not llvm-mc -triple=thumbv7 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV7 %s
   2 // RUN: not llvm-mc -triple=thumbv8 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV8 %s
   3 // RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-ARM %s
   4
   5         // lsl #0 is actually mov, so here we check that it behaves the same as
   6         // mov with regards to the permitted registers
   7
   8         // Using PC is invalid in thumb
   9         lsl pc, r0, #0
  10         lsl r0, pc, #0
  11         lsl pc, pc, #0
  12         lsls pc, r0, #0
  13         lsls r0, pc, #0
  14         lsls pc, pc, #0
  15
  16 // CHECK-NONARM: error: invalid instruction, any one of the following would fix this:
  17 // CHECK-NONARM-NEXT: lsl pc, r0, #0
  18 // CHECK-NONARM: note: instruction requires: arm-mode
  19 // CHECK-NONARM: note: operand must be a register in range [r0, r14]
  20
  21 // CHECK-NONARM: error: invalid instruction, any one of the following would fix this:
  22 // CHECK-NONARM-NEXT: lsl r0, pc, #0
  23 // CHECK-NONARM: note: instruction requires: arm-mode
  24 // CHECK-NONARM: note: operand must be a register in range [r0, r14]
  25
  26 // CHECK-NONARM: error: instruction requires: arm-mode
  27 // CHECK-NONARM-NEXT: lsl pc, pc, #0
  28
  29 // CHECK-NONARM: error: invalid instruction, any one of the following would fix this:
  30 // CHECK-NONARM-NEXT: lsls pc, r0, #0
  31 // CHECK-NONARM: note: instruction requires: arm-mode
  32 // CHECK-NONARM: note: operand must be a register in range [r0, r14]
  33
  34 // CHECK-NONARM: error: invalid instruction, any one of the following would fix this:
  35 // CHECK-NONARM-NEXT: lsls r0, pc, #0
  36 // CHECK-NONARM: note: instruction requires: arm-mode
  37 // CHECK-NONARM: note: operand must be a register in range [r0, r14]
  38
  39 // CHECK-NONARM: error: instruction requires: arm-mode
  40 // CHECK-NONARM-NEXT: lsls pc, pc, #0
  41
  42 // CHECK-ARM: mov pc, r0                @ encoding: [0x00,0xf0,0xa0,0xe1]
  43 // CHECK-ARM: mov r0, pc                @ encoding: [0x0f,0x00,0xa0,0xe1]
  44 // CHECK-ARM: mov pc, pc                @ encoding: [0x0f,0xf0,0xa0,0xe1]
  45 // CHECK-ARM: movs pc, r0               @ encoding: [0x00,0xf0,0xb0,0xe1]
  46 // CHECK-ARM: movs r0, pc               @ encoding: [0x0f,0x00,0xb0,0xe1]
  47 // CHECK-ARM: movs pc, pc               @ encoding: [0x0f,0xf0,0xb0,0xe1]
  48
  49         mov pc, r0, lsl #0
  50         mov r0, pc, lsl #0
  51         mov pc, pc, lsl #0
  52         movs pc, r0, lsl #0
  53         movs r0, pc, lsl #0
  54         movs pc, pc, lsl #0
  55
  56 // CHECK-NONARM: error: invalid instruction, any one of the following would fix this:
  57 // CHECK-NONARM-NEXT: mov pc, r0, lsl #0
  58 // CHECK-NONARM: note: operand must be a register in range [r0, r15]
  59 // CHECK-THUMBV7: note: operand must be a register in range [r0, r12] or r14
  60 // CHECK-THUMBV8: note: operand must be a register in range [r0, r14]
  61
  62 // CHECK-NONARM: error: invalid instruction, any one of the following would fix this:
  63 // CHECK-NONARM-NEXT: mov r0, pc, lsl #0
  64 // CHECK-NONARM: note: operand must be a register in range [r0, r15]
  65 // CHECK-NONARM: note: invalid operand for instruction
  66 // CHECK-NONARM: note: invalid operand for instruction
  67 // CHECK-NONARM: note: operand must be an immediate in the range [256,65535]
  68
  69 // CHECK-NONARM: error: invalid instruction, any one of the following would fix this:
  70 // CHECK-NONARM-NEXT: mov pc, pc, lsl #0
  71 // CHECK-NONARM: note: operand must be a register in range [r0, r15]
  72 // CHECK-THUMBV7: note: operand must be a register in range [r0, r12] or r14
  73 // CHECK-THUMBV8: note: operand must be a register in range [r0, r14]
  74
  75 // CHECK-THUMBV7: error: operand must be a register in range [r0, r12] or r14
  76 // CHECK-THUMBV8: error: operand must be a register in range [r0, r14]
  77 // CHECK-NONARM-NEXT: movs pc, r0, lsl #0
  78
  79 // CHECK-NONARM: error: invalid instruction, any one of the following would fix this:
  80 // CHECK-NONARM-NEXT: movs r0, pc, lsl #0
  81 // CHECK-NONARM: note: operand must be a register in range [r0, r14]
  82 // CHECK-NONARM: note: invalid operand for instruction
  83 // CHECK-NONARM: note: invalid operand for instruction
  84
  85 // CHECK-THUMBV7: error: operand must be a register in range [r0, r12] or r14
  86 // CHECK-THUMBV8: error: operand must be a register in range [r0, r14]
  87 // CHECK-NONARM-NEXT: movs pc, pc, lsl #0
  88
  89 // CHECK-ARM: mov pc, r0                @ encoding: [0x00,0xf0,0xa0,0xe1]
  90 // CHECK-ARM: mov r0, pc                @ encoding: [0x0f,0x00,0xa0,0xe1]
  91 // CHECK-ARM: mov pc, pc                @ encoding: [0x0f,0xf0,0xa0,0xe1]
  92 // CHECK-ARM: movs pc, r0               @ encoding: [0x00,0xf0,0xb0,0xe1]
  93 // CHECK-ARM: movs r0, pc               @ encoding: [0x0f,0x00,0xb0,0xe1]
  94 // CHECK-ARM: movs pc, pc               @ encoding: [0x0f,0xf0,0xb0,0xe1]
  95
  96         // Using SP is invalid before ARMv8 in thumb unless non-flags-setting
  97         // and one of the source and destination is not SP
  98         lsl sp, sp, #0
  99         lsls sp, sp, #0
 100         lsls r0, sp, #0
 101         lsls sp, r0, #0
 102
 103 // CHECK-THUMBV7: error: invalid instruction, any one of the following would fix this:
 104 // CHECK-THUMBV7-NEXT: lsl sp, sp, #0
 105 // CHECK-THUMBV7: instruction requires: arm-mode
 106 // CHECK-THUMBV7: instruction variant requires ARMv8 or later
 107 // CHECK-THUMBV7: error: invalid instruction, any one of the following would fix this:
 108 // CHECK-THUMBV7-NEXT: lsls sp, sp, #0
 109 // CHECK-THUMBV7: instruction requires: arm-mode
 110 // CHECK-THUMBV7: instruction variant requires ARMv8 or later
 111 // CHECK-THUMBV7: error: invalid instruction, any one of the following would fix this:
 112 // CHECK-THUMBV7-NEXT: lsls r0, sp, #0
 113 // CHECK-THUMBV7: instruction requires: arm-mode
 114 // CHECK-THUMBV7: instruction variant requires ARMv8 or later
 115 // CHECK-THUMBV7: error: invalid instruction, any one of the following would fix this:
 116 // CHECK-THUMBV7-NEXT: lsls sp, r0, #0
 117 // CHECK-THUMBV7: instruction requires: arm-mode
 118 // CHECK-THUMBV7: instruction variant requires ARMv8 or later
 119
 120 // CHECK-ARM: mov sp, sp                @ encoding: [0x0d,0xd0,0xa0,0xe1]
 121 // CHECK-ARM: movs sp, sp               @ encoding: [0x0d,0xd0,0xb0,0xe1]
 122 // CHECK-ARM: movs r0, sp               @ encoding: [0x0d,0x00,0xb0,0xe1]
 123 // CHECK-ARM: movs sp, r0               @ encoding: [0x00,0xd0,0xb0,0xe1]
 124
 125         mov sp, sp, lsl #0
 126         movs sp, sp, lsl #0
 127         movs r0, sp, lsl #0
 128         movs sp, r0, lsl #0
 129
 130 // FIXME: We should consistently have the "requires ARMv8" error here
 131 // CHECK-THUMBV7: error: invalid instruction, any one of the following would fix this:
 132 // CHECK-THUMBV7-NEXT: mov sp, sp, lsl #0
 133 // CHECK-THUMBV7: note: operand must be a register in range [r0, r15]
 134 // CHECK-THUMBV7: note: operand must be a register in range [r0, r12] or r14
 135
 136 // CHECK-THUMBV7: error: invalid instruction, any one of the following would fix this:
 137 // CHECK-THUMBV7-NEXT: movs sp, sp, lsl #0
 138 // CHECK-THUMBV7: note: operand must be a register in range [r0, r14]
 139 // CHECK-THUMBV7: note: operand must be a register in range [r0, r12] or r14
 140
 141 // CHECK-THUMBV7: error: invalid instruction, any one of the following would fix this:
 142 // CHECK-THUMBV7-NEXT: movs r0, sp, lsl #0
 143 // CHECK-THUMBV7: note: operand must be a register in range [r0, r14]
 144 // CHECK-THUMBV7: note: invalid operand for instruction
 145 // CHECK-THUMBV7: note: instruction variant requires ARMv8 or later
 146
 147 // CHECK-THUMBV7: error: invalid instruction, any one of the following would fix this:
 148 // CHECK-THUMBV7-NEXT: movs sp, r0, lsl #0
 149 // CHECK-THUMBV7: note: operand must be a register in range [r0, r14]
 150 // CHECK-THUMBV7: note: operand must be a register in range [r0, r12] or r14
 151
 152 // CHECK-ARM: mov sp, sp                @ encoding: [0x0d,0xd0,0xa0,0xe1]
 153 // CHECK-ARM: movs sp, sp               @ encoding: [0x0d,0xd0,0xb0,0xe1]
 154 // CHECK-ARM: movs r0, sp               @ encoding: [0x0d,0x00,0xb0,0xe1]
 155 // CHECK-ARM: movs sp, r0               @ encoding: [0x00,0xd0,0xb0,0xe1]