test/MC/ARM/lsl-zero.s

   1 // RUN: llvm-mc -triple=thumbv7 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV7 %s
   2 // RUN: llvm-mc -triple=thumbv8 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-NONARM --check-prefix=CHECK-THUMBV8 %s
   3 // RUN: llvm-mc -triple=armv7 -show-encoding < %s 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-ARM %s
   4
   5         // lsl #0 is actually mov, so here we check that it behaves the same as
   6         // mov with regards to the permitted registers and how it behaves in an
   7         // IT block.
   8
   9         // Non-flags-setting with only one of source and destination SP should
  10         // be OK
  11         lsl sp, r0, #0
  12         lsl r0, sp, #0
  13
  14 // CHECK-NONARM: mov.w sp, r0           @ encoding: [0x4f,0xea,0x00,0x0d]
  15 // CHECK-NONARM: mov.w r0, sp           @ encoding: [0x4f,0xea,0x0d,0x00]
  16
  17 // CHECK-ARM: mov sp, r0                @ encoding: [0x00,0xd0,0xa0,0xe1]
  18 // CHECK-ARM: mov r0, sp                @ encoding: [0x0d,0x00,0xa0,0xe1]
  19
  20         //FIXME: pre-ARMv8 we give an error for these instructions
  21         //mov sp, r0, lsl #0
  22         //mov r0, sp, lsl #0
  23
  24         // LSL #0 in IT block should select the 32-bit encoding
  25         itt eq
  26         lsleq  r0, r1, #0
  27         lslseq r0, r1, #0
  28         itt gt
  29         lslgt  r0, r1, #0
  30         lslsgt r0, r1, #0
  31
  32 // CHECK-NONARM: moveq.w r0, r1         @ encoding: [0x4f,0xea,0x01,0x00]
  33 // CHECK-NONARM: movseq.w r0, r1        @ encoding: [0x5f,0xea,0x01,0x00]
  34 // CHECK-NONARM: movgt.w r0, r1         @ encoding: [0x4f,0xea,0x01,0x00]
  35 // CHECK-NONARM: movsgt.w r0, r1        @ encoding: [0x5f,0xea,0x01,0x00]
  36
  37 // CHECK-ARM: moveq r0, r1              @ encoding: [0x01,0x00,0xa0,0x01]
  38 // CHECK-ARM: movseq r0, r1             @ encoding: [0x01,0x00,0xb0,0x01]
  39 // CHECK-ARM: movgt r0, r1              @ encoding: [0x01,0x00,0xa0,0xc1]
  40 // CHECK-ARM: movsgt r0, r1             @ encoding: [0x01,0x00,0xb0,0xc1]
  41
  42         itt eq
  43         moveq  r0, r1, lsl #0
  44         movseq r0, r1, lsl #0
  45         itt gt
  46         movgt  r0, r1, lsl #0
  47         movsgt r0, r1, lsl #0
  48
  49 // CHECK-NONARM: moveq.w r0, r1         @ encoding: [0x4f,0xea,0x01,0x00]
  50 // CHECK-NONARM: movseq.w r0, r1        @ encoding: [0x5f,0xea,0x01,0x00]
  51 // CHECK-NONARM: movgt.w r0, r1         @ encoding: [0x4f,0xea,0x01,0x00]
  52 // CHECK-NONARM: movsgt.w r0, r1        @ encoding: [0x5f,0xea,0x01,0x00]
  53
  54 // CHECK-ARM: moveq r0, r1              @ encoding: [0x01,0x00,0xa0,0x01]
  55 // CHECK-ARM: movseq r0, r1             @ encoding: [0x01,0x00,0xb0,0x01]
  56 // CHECK-ARM: movgt r0, r1              @ encoding: [0x01,0x00,0xa0,0xc1]
  57 // CHECK-ARM: movsgt r0, r1             @ encoding: [0x01,0x00,0xb0,0xc1]