test/MC/ARM/thumb-load-store-multiple.s

   1 @ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o - %s 2>&1 \
   2 @ RUN:     | FileCheck %s
   3 @ RUN: not llvm-mc -triple thumbv7a-eabi -filetype asm -o - %s 2>&1 \
   4 @ RUN: | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7A %s
   5 @ RUN: not llvm-mc -triple thumbv7m-eabi -filetype asm -o - %s 2>&1 \
   6 @ RUN: | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7M %s
   7
   8         .syntax unified
   9         .thumb
  10
  11         .global ldm
  12         .type ldm,%function
  13 ldm:
  14         ldm r0!, {r1, sp}
  15 @ CHECK: error: SP may not be in the register list
  16 @ CHECK: ldm r0!, {r1, sp}
  17 @ CHECK:          ^
  18         ldm r0!, {lr, pc}
  19 @ CHECK: error: PC and LR may not be in the register list simultaneously
  20 @ CHECK: ldm r0!, {lr, pc}
  21 @ CHECK:          ^
  22         itt eq
  23         ldmeq r0!, {r1, pc}
  24         ldmeq r0!, {r2, lr}
  25 @ CHECK: error: instruction must be outside of IT block or the last instruction in an IT block
  26 @ CHECK: ldmeq r0!, {r1, pc}
  27 @ CHECK:            ^
  28
  29         .global ldmdb
  30         .type ldmdb,%function
  31 ldmdb:
  32         ldmdb r0!, {r1, sp}
  33 @ CHECK: error: SP may not be in the register list
  34         ldmdb r0!, {lr, pc}
  35 @ error: PC and LR may not be in the register list simultaneously
  36         itt eq
  37         ldmeq r0!, {r1, pc}
  38         ldmeq r0!, {r2, lr}
  39 @ CHECK: error: instruction must be outside of IT block or the last instruction in an IT block
  40 @ CHECK: ldmeq r0!, {r1, pc}
  41 @ CHECK:            ^
  42
  43         .global stm
  44         .type stm,%function
  45 stm:
  46         stm r0!, {r1, sp}
  47 @ CHECK: error: SP may not be in the register list
  48         stm r0!, {r2, pc}
  49 @ CHECK: error: PC may not be in the register list
  50         stm r0!, {sp, pc}
  51 @ CHECK: error: SP and PC may not be in the register list
  52
  53         .global stmdb
  54         .type stmdb,%function
  55 stmdb:
  56         stmdb r0!, {r1, sp}
  57 @ CHECK: error: SP may not be in the register list
  58         stmdb r0!, {r2, pc}
  59 @ CHECK: error: PC may not be in the register list
  60         stmdb r0!, {sp, pc}
  61 @ CHECK: error: SP and PC may not be in the register list
  62
  63         .global push
  64         .type push,%function
  65 push:
  66         push {sp}
  67 @ CHECK: error: SP may not be in the register list
  68         push {pc}
  69 @ CHECK: error: PC may not be in the register list
  70         push {sp, pc}
  71 @ CHECK: error: SP and PC may not be in the register list
  72
  73         .global pop
  74         .type pop,%function
  75 pop:
  76         pop {sp}
  77 @ CHECK-V7M: error: SP may not be in the register list
  78         pop {lr, pc}
  79 @ CHECK: error: PC and LR may not be in the register list simultaneously
  80 @ CHECK: pop {lr, pc}
  81 @ CHECK:     ^
  82         itt eq
  83         popeq {r1, pc}
  84         popeq {r2, lr}
  85 @ CHECK: error: instruction must be outside of IT block or the last instruction in an IT block
  86 @ CHECK: popeq {r1, pc}
  87 @ CHECK:     ^
  88
  89         .global valid
  90         .type valid,%function
  91 valid:
  92         pop {sp}
  93 @ CHECK-V7A: ldr sp, [sp], #4
  94         pop {sp, pc}
  95 @ CHECK-V7A: pop.w {sp, pc}
  96         push.w {r0}
  97 @ CHECK: str r0, [sp, #-4]
  98         pop.w {r0}
  99 @ CHECK: ldr r0, [sp], #4
 100