test/MC/ARM/thumb2-mclass.s

   1 @ RUN: llvm-mc -triple=thumbv6m -show-encoding < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V6M %s
   2 @ RUN: llvm-mc -triple=thumbv7m -show-encoding < %s | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7M %s
   3
   4   .syntax unified
   5
   6 @ Check that the assembler can handle the documented syntax from the ARM ARM.
   7 @ These tests test instruction encodings specific to v6m & v7m (FeatureMClass).
   8
   9 @------------------------------------------------------------------------------
  10 @ MRS
  11 @------------------------------------------------------------------------------
  12
  13         mrs  r0, apsr
  14         mrs  r0, iapsr
  15         mrs  r0, eapsr
  16         mrs  r0, xpsr
  17         mrs  r0, ipsr
  18         mrs  r0, epsr
  19         mrs  r0, iepsr
  20         mrs  r0, msp
  21         mrs  r0, psp
  22         mrs  r0, primask
  23         mrs  r0, control
  24
  25 @ CHECK: mrs    r0, apsr                @ encoding: [0xef,0xf3,0x00,0x80]
  26 @ CHECK: mrs    r0, iapsr               @ encoding: [0xef,0xf3,0x01,0x80]
  27 @ CHECK: mrs    r0, eapsr               @ encoding: [0xef,0xf3,0x02,0x80]
  28 @ CHECK: mrs    r0, xpsr                @ encoding: [0xef,0xf3,0x03,0x80]
  29 @ CHECK: mrs    r0, ipsr                @ encoding: [0xef,0xf3,0x05,0x80]
  30 @ CHECK: mrs    r0, epsr                @ encoding: [0xef,0xf3,0x06,0x80]
  31 @ CHECK: mrs    r0, iepsr               @ encoding: [0xef,0xf3,0x07,0x80]
  32 @ CHECK: mrs    r0, msp                 @ encoding: [0xef,0xf3,0x08,0x80]
  33 @ CHECK: mrs    r0, psp                 @ encoding: [0xef,0xf3,0x09,0x80]
  34 @ CHECK: mrs    r0, primask             @ encoding: [0xef,0xf3,0x10,0x80]
  35 @ CHECK: mrs    r0, control             @ encoding: [0xef,0xf3,0x14,0x80]
  36
  37 @------------------------------------------------------------------------------
  38 @ MSR
  39 @------------------------------------------------------------------------------
  40
  41         msr  apsr, r0
  42         msr  apsr_nzcvq, r0
  43         msr  iapsr, r0
  44         msr  iapsr_nzcvq, r0
  45         msr  eapsr, r0
  46         msr  eapsr_nzcvq, r0
  47         msr  xpsr, r0
  48         msr  xpsr_nzcvq, r0
  49         msr  ipsr, r0
  50         msr  epsr, r0
  51         msr  iepsr, r0
  52         msr  msp, r0
  53         msr  psp, r0
  54         msr  primask, r0
  55         msr  control, r0
  56
  57 @ CHECK-V6M: msr        apsr, r0                @ encoding: [0x80,0xf3,0x00,0x88]
  58 @ CHECK-V6M: msr        apsr, r0                @ encoding: [0x80,0xf3,0x00,0x88]
  59 @ CHECK-V6M: msr        iapsr, r0               @ encoding: [0x80,0xf3,0x01,0x88]
  60 @ CHECK-V6M: msr        iapsr, r0               @ encoding: [0x80,0xf3,0x01,0x88]
  61 @ CHECK-V6M: msr        eapsr, r0               @ encoding: [0x80,0xf3,0x02,0x88]
  62 @ CHECK-V6M: msr        eapsr, r0               @ encoding: [0x80,0xf3,0x02,0x88]
  63 @ CHECK-V6M: msr        xpsr, r0                @ encoding: [0x80,0xf3,0x03,0x88]
  64 @ CHECK-V6M: msr        xpsr, r0                @ encoding: [0x80,0xf3,0x03,0x88]
  65 @ CHECK-V7M: msr        apsr_nzcvq, r0          @ encoding: [0x80,0xf3,0x00,0x88]
  66 @ CHECK-V7M: msr        apsr_nzcvq, r0          @ encoding: [0x80,0xf3,0x00,0x88]
  67 @ CHECK-V7M: msr        iapsr_nzcvq, r0         @ encoding: [0x80,0xf3,0x01,0x88]
  68 @ CHECK-V7M: msr        iapsr_nzcvq, r0         @ encoding: [0x80,0xf3,0x01,0x88]
  69 @ CHECK-V7M: msr        eapsr_nzcvq, r0         @ encoding: [0x80,0xf3,0x02,0x88]
  70 @ CHECK-V7M: msr        eapsr_nzcvq, r0         @ encoding: [0x80,0xf3,0x02,0x88]
  71 @ CHECK-V7M: msr        xpsr_nzcvq, r0          @ encoding: [0x80,0xf3,0x03,0x88]
  72 @ CHECK-V7M: msr        xpsr_nzcvq, r0          @ encoding: [0x80,0xf3,0x03,0x88]
  73 @ CHECK: msr    ipsr, r0                @ encoding: [0x80,0xf3,0x05,0x88]
  74 @ CHECK: msr    epsr, r0                @ encoding: [0x80,0xf3,0x06,0x88]
  75 @ CHECK: msr    iepsr, r0               @ encoding: [0x80,0xf3,0x07,0x88]
  76 @ CHECK: msr    msp, r0                 @ encoding: [0x80,0xf3,0x08,0x88]
  77 @ CHECK: msr    psp, r0                 @ encoding: [0x80,0xf3,0x09,0x88]
  78 @ CHECK: msr    primask, r0             @ encoding: [0x80,0xf3,0x10,0x88]
  79 @ CHECK: msr    control, r0             @ encoding: [0x80,0xf3,0x14,0x88]