test/MC/ARM/vmovhr.s

   1 // RUN: not llvm-mc -triple=thumbv8.2a-none-eabi -mattr=+fp-armv8,+fullfp16 -show-encoding < %s 2>%t \
   2 // RUN:   | FileCheck %s
   3 // RUN:     FileCheck --check-prefix=ERROR < %t %s
   4
   5 # CHECK: vmov.f16 r0, s13 @ encoding: [0x16,0xee,0x90,0x09]
   6 vmov.f16 r0, s13
   7
   8 # CHECK: vmov.f16 s21, r1 @ encoding: [0x0a,0xee,0x90,0x19]
   9 vmov.f16 s21, r1
  10
  11 # CHECK: vmov.f16 s2, sp @ encoding: [0x01,0xee,0x10,0xd9]
  12 vmov.f16 s2, sp
  13
  14 # ERROR: :[[@LINE+2]]:{{[0-9]+}}: error: invalid instruction
  15 # ERROR: operand must be a register in range [r0, r14]
  16 vmov.f16 s3, pc
  17
  18 # CHECK: vmov.f16 sp, s5 @ encoding: [0x12,0xee,0x90,0xd9]
  19 vmov.f16 sp, s5
  20
  21 # ERROR: :[[@LINE+2]]:{{[0-9]+}}: error: invalid instruction
  22 # ERROR: operand must be a register in range [r0, r14]
  23 vmov.f16 pc, s8
  24