1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes='require<domtree>,mergeicmps,verify<domtree>' -mtriple=x86_64-unknown-unknown -S | FileCheck %s --check-prefix=X86
3 ; RUN: opt < %s -mergeicmps -verify-dom-info -mtriple=x86_64-unknown-unknown -S -disable-simplify-libcalls | FileCheck %s --check-prefix=X86-NOBUILTIN
7 define zeroext i1 @opeq1(
9 ; X86-NEXT: "entry+land.rhs.i":
10 ; X86-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[S:%.*]], %S* [[A:%.*]], i64 0, i32 0
11 ; X86-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[S]], %S* [[B:%.*]], i64 0, i32 0
12 ; X86-NEXT: [[CSTR:%.*]] = bitcast i32* [[TMP0]] to i8*
13 ; X86-NEXT: [[CSTR1:%.*]] = bitcast i32* [[TMP1]] to i8*
14 ; X86-NEXT: [[MEMCMP:%.*]] = call i32 @memcmp(i8* [[CSTR]], i8* [[CSTR1]], i64 8)
15 ; X86-NEXT: [[TMP2:%.*]] = icmp eq i32 [[MEMCMP]], 0
16 ; X86-NEXT: br label [[OPEQ1_EXIT:%.*]]
18 ; X86-NEXT: ret i1 [[TMP2]]
20 ; X86-NOBUILTIN-LABEL: @opeq1(
21 ; X86-NOBUILTIN-NEXT: entry:
22 ; X86-NOBUILTIN-NEXT: [[FIRST_I:%.*]] = getelementptr inbounds [[S:%.*]], %S* [[A:%.*]], i64 0, i32 0
23 ; X86-NOBUILTIN-NEXT: [[TMP0:%.*]] = load i32, i32* [[FIRST_I]], align 4
24 ; X86-NOBUILTIN-NEXT: [[FIRST1_I:%.*]] = getelementptr inbounds [[S]], %S* [[B:%.*]], i64 0, i32 0
25 ; X86-NOBUILTIN-NEXT: [[TMP1:%.*]] = load i32, i32* [[FIRST1_I]], align 4
26 ; X86-NOBUILTIN-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
27 ; X86-NOBUILTIN-NEXT: br i1 [[CMP_I]], label [[LAND_RHS_I:%.*]], label [[OPEQ1_EXIT:%.*]]
28 ; X86-NOBUILTIN: land.rhs.i:
29 ; X86-NOBUILTIN-NEXT: [[SECOND_I:%.*]] = getelementptr inbounds [[S]], %S* [[A]], i64 0, i32 1
30 ; X86-NOBUILTIN-NEXT: [[TMP2:%.*]] = load i32, i32* [[SECOND_I]], align 4
31 ; X86-NOBUILTIN-NEXT: [[SECOND2_I:%.*]] = getelementptr inbounds [[S]], %S* [[B]], i64 0, i32 1
32 ; X86-NOBUILTIN-NEXT: [[TMP3:%.*]] = load i32, i32* [[SECOND2_I]], align 4
33 ; X86-NOBUILTIN-NEXT: [[CMP3_I:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]
34 ; X86-NOBUILTIN-NEXT: br label [[OPEQ1_EXIT]]
35 ; X86-NOBUILTIN: opeq1.exit:
36 ; X86-NOBUILTIN-NEXT: [[TMP4:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP3_I]], [[LAND_RHS_I]] ]
37 ; X86-NOBUILTIN-NEXT: ret i1 [[TMP4]]
39 %S* nocapture readonly dereferenceable(8) %a,
40 %S* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {
42 %first.i = getelementptr inbounds %S, %S* %a, i64 0, i32 0
43 %0 = load i32, i32* %first.i, align 4
44 %first1.i = getelementptr inbounds %S, %S* %b, i64 0, i32 0
45 %1 = load i32, i32* %first1.i, align 4
46 %cmp.i = icmp eq i32 %0, %1
47 br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit
50 %second.i = getelementptr inbounds %S, %S* %a, i64 0, i32 1
51 %2 = load i32, i32* %second.i, align 4
52 %second2.i = getelementptr inbounds %S, %S* %b, i64 0, i32 1
53 %3 = load i32, i32* %second2.i, align 4
54 %cmp3.i = icmp eq i32 %2, %3
58 %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]
60 ; The entry block with zero-offset GEPs is kept, loads are removed.
61 ; The two 4 byte loads and compares are replaced with a single 8-byte memcmp.
62 ; The branch is now a direct branch; the other block has been removed.
66 ; Same as above, but the two blocks are in inverse order.
67 define zeroext i1 @opeq1_inverse(
68 ; X86-LABEL: @opeq1_inverse(
69 ; X86-NEXT: "land.rhs.i+entry":
70 ; X86-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[S:%.*]], %S* [[A:%.*]], i64 0, i32 0
71 ; X86-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[S]], %S* [[B:%.*]], i64 0, i32 0
72 ; X86-NEXT: [[CSTR:%.*]] = bitcast i32* [[TMP0]] to i8*
73 ; X86-NEXT: [[CSTR1:%.*]] = bitcast i32* [[TMP1]] to i8*
74 ; X86-NEXT: [[MEMCMP:%.*]] = call i32 @memcmp(i8* [[CSTR]], i8* [[CSTR1]], i64 8)
75 ; X86-NEXT: [[TMP2:%.*]] = icmp eq i32 [[MEMCMP]], 0
76 ; X86-NEXT: br label [[OPEQ1_EXIT:%.*]]
78 ; X86-NEXT: ret i1 [[TMP2]]
80 ; X86-NOBUILTIN-LABEL: @opeq1_inverse(
81 ; X86-NOBUILTIN-NEXT: entry:
82 ; X86-NOBUILTIN-NEXT: [[FIRST_I:%.*]] = getelementptr inbounds [[S:%.*]], %S* [[A:%.*]], i64 0, i32 1
83 ; X86-NOBUILTIN-NEXT: [[TMP0:%.*]] = load i32, i32* [[FIRST_I]], align 4
84 ; X86-NOBUILTIN-NEXT: [[FIRST1_I:%.*]] = getelementptr inbounds [[S]], %S* [[B:%.*]], i64 0, i32 1
85 ; X86-NOBUILTIN-NEXT: [[TMP1:%.*]] = load i32, i32* [[FIRST1_I]], align 4
86 ; X86-NOBUILTIN-NEXT: [[CMP_I:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
87 ; X86-NOBUILTIN-NEXT: br i1 [[CMP_I]], label [[LAND_RHS_I:%.*]], label [[OPEQ1_EXIT:%.*]]
88 ; X86-NOBUILTIN: land.rhs.i:
89 ; X86-NOBUILTIN-NEXT: [[SECOND_I:%.*]] = getelementptr inbounds [[S]], %S* [[A]], i64 0, i32 0
90 ; X86-NOBUILTIN-NEXT: [[TMP2:%.*]] = load i32, i32* [[SECOND_I]], align 4
91 ; X86-NOBUILTIN-NEXT: [[SECOND2_I:%.*]] = getelementptr inbounds [[S]], %S* [[B]], i64 0, i32 0
92 ; X86-NOBUILTIN-NEXT: [[TMP3:%.*]] = load i32, i32* [[SECOND2_I]], align 4
93 ; X86-NOBUILTIN-NEXT: [[CMP3_I:%.*]] = icmp eq i32 [[TMP2]], [[TMP3]]
94 ; X86-NOBUILTIN-NEXT: br label [[OPEQ1_EXIT]]
95 ; X86-NOBUILTIN: opeq1.exit:
96 ; X86-NOBUILTIN-NEXT: [[TMP4:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[CMP3_I]], [[LAND_RHS_I]] ]
97 ; X86-NOBUILTIN-NEXT: ret i1 [[TMP4]]
99 %S* nocapture readonly dereferenceable(8) %a,
100 %S* nocapture readonly dereferenceable(8) %b) local_unnamed_addr #0 {
102 %first.i = getelementptr inbounds %S, %S* %a, i64 0, i32 1
103 %0 = load i32, i32* %first.i, align 4
104 %first1.i = getelementptr inbounds %S, %S* %b, i64 0, i32 1
105 %1 = load i32, i32* %first1.i, align 4
106 %cmp.i = icmp eq i32 %0, %1
107 br i1 %cmp.i, label %land.rhs.i, label %opeq1.exit
110 %second.i = getelementptr inbounds %S, %S* %a, i64 0, i32 0
111 %2 = load i32, i32* %second.i, align 4
112 %second2.i = getelementptr inbounds %S, %S* %b, i64 0, i32 0
113 %3 = load i32, i32* %second2.i, align 4
114 %cmp3.i = icmp eq i32 %2, %3
118 %4 = phi i1 [ false, %entry ], [ %cmp3.i, %land.rhs.i ]
120 ; The second block with zero-offset GEPs is kept, loads are removed.
122 ; The two 4 byte loads and compares are replaced with a single 8-byte memcmp.
123 ; The branch is now a direct branch; the other block has been removed.
124 ; The phi is updated.