lib/CodeGen/RegAllocSimple.cpp

   1 //===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the LLVM research group and is distributed under
   6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file implements a simple register allocator. *Very* simple: It immediate
  11 // spills every value right after it is computed, and it reloads all used
  12 // operands from the spill area to temporary registers before each instruction.
  13 // It does not keep values in registers across instructions.
  14 //
  15 //===----------------------------------------------------------------------===//
  16
  17 #define DEBUG_TYPE "regalloc"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/CodeGen/MachineFunctionPass.h"
  20 #include "llvm/CodeGen/MachineInstr.h"
  21 #include "llvm/CodeGen/SSARegMap.h"
  22 #include "llvm/CodeGen/MachineFrameInfo.h"
  23 #include "llvm/CodeGen/RegAllocRegistry.h"
  24 #include "llvm/Target/TargetInstrInfo.h"
  25 #include "llvm/Target/TargetMachine.h"
  26 #include "llvm/Support/Debug.h"
  27 #include "llvm/Support/Compiler.h"
  28 #include "llvm/ADT/Statistic.h"
  29 #include "llvm/ADT/STLExtras.h"
  30 using namespace llvm;
  31
  32 STATISTIC(NumStores, "Number of stores added");
  33 STATISTIC(NumLoads , "Number of loads added");
  34
  35 namespace {
  36   static RegisterRegAlloc
  37     simpleRegAlloc("simple", "  simple register allocator",
  38                    createSimpleRegisterAllocator);
  39
  40   class VISIBILITY_HIDDEN RegAllocSimple : public MachineFunctionPass {
  41   public:
  42     static char ID;
  43     RegAllocSimple() : MachineFunctionPass((intptr_t)&ID) {}
  44   private:
  45     MachineFunction *MF;
  46     const TargetMachine *TM;
  47     const MRegisterInfo *RegInfo;
  48
  49     // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
  50     // these values are spilled
  51     std::map<unsigned, int> StackSlotForVirtReg;
  52
  53     // RegsUsed - Keep track of what registers are currently in use.  This is a
  54     // bitset.
  55     std::vector<bool> RegsUsed;
  56
  57     // RegClassIdx - Maps RegClass => which index we can take a register
  58     // from. Since this is a simple register allocator, when we need a register
  59     // of a certain class, we just take the next available one.
  60     std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
  61
  62   public:
  63     virtual const char *getPassName() const {
  64       return "Simple Register Allocator";
  65     }
  66
  67     /// runOnMachineFunction - Register allocate the whole function
  68     bool runOnMachineFunction(MachineFunction &Fn);
  69
  70     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
  71       AU.addRequiredID(PHIEliminationID);           // Eliminate PHI nodes
  72       MachineFunctionPass::getAnalysisUsage(AU);
  73     }
  74   private:
  75     /// AllocateBasicBlock - Register allocate the specified basic block.
  76     void AllocateBasicBlock(MachineBasicBlock &MBB);
  77
  78     /// getStackSpaceFor - This returns the offset of the specified virtual
  79     /// register on the stack, allocating space if necessary.
  80     int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
  81
  82     /// Given a virtual register, return a compatible physical register that is
  83     /// currently unused.
  84     ///
  85     /// Side effect: marks that register as being used until manually cleared
  86     ///
  87     unsigned getFreeReg(unsigned virtualReg);
  88
  89     /// Moves value from memory into that register
  90     unsigned reloadVirtReg(MachineBasicBlock &MBB,
  91                            MachineBasicBlock::iterator I, unsigned VirtReg);
  92
  93     /// Saves reg value on the stack (maps virtual register to stack value)
  94     void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
  95                       unsigned VirtReg, unsigned PhysReg);
  96   };
  97   char RegAllocSimple::ID = 0;
  98 }
  99
 100 /// getStackSpaceFor - This allocates space for the specified virtual
 101 /// register to be held on the stack.
 102 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
 103                                      const TargetRegisterClass *RC) {
 104   // Find the location VirtReg would belong...
 105   std::map<unsigned, int>::iterator I =
 106     StackSlotForVirtReg.lower_bound(VirtReg);
 107
 108   if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
 109     return I->second;          // Already has space allocated?
 110
 111   // Allocate a new stack object for this spill location...
 112   int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
 113                                                        RC->getAlignment());
 114
 115   // Assign the slot...
 116   StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
 117
 118   return FrameIdx;
 119 }
 120
 121 unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
 122   const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(virtualReg);
 123   TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
 124   TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
 125
 126   while (1) {
 127     unsigned regIdx = RegClassIdx[RC]++;
 128     assert(RI+regIdx != RE && "Not enough registers!");
 129     unsigned PhysReg = *(RI+regIdx);
 130
 131     if (!RegsUsed[PhysReg]) {
 132       MF->setPhysRegUsed(PhysReg);
 133       return PhysReg;
 134     }
 135   }
 136 }
 137
 138 unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
 139                                        MachineBasicBlock::iterator I,
 140                                        unsigned VirtReg) {
 141   const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
 142   int FrameIdx = getStackSpaceFor(VirtReg, RC);
 143   unsigned PhysReg = getFreeReg(VirtReg);
 144
 145   // Add move instruction(s)
 146   ++NumLoads;
 147   RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
 148   return PhysReg;
 149 }
 150
 151 void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
 152                                   MachineBasicBlock::iterator I,
 153                                   unsigned VirtReg, unsigned PhysReg) {
 154   const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
 155   int FrameIdx = getStackSpaceFor(VirtReg, RC);
 156
 157   // Add move instruction(s)
 158   ++NumStores;
 159   RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx, RC);
 160 }
 161
 162
 163 void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
 164   // loop over each instruction
 165   for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
 166     // Made to combat the incorrect allocation of r2 = add r1, r1
 167     std::map<unsigned, unsigned> Virt2PhysRegMap;
 168
 169     RegsUsed.resize(RegInfo->getNumRegs());
 170
 171     // This is a preliminary pass that will invalidate any registers that are
 172     // used by the instruction (including implicit uses).
 173     unsigned Opcode = MI->getOpcode();
 174     const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode);
 175     const unsigned *Regs;
 176     if (Desc.ImplicitUses) {
 177       for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
 178         RegsUsed[*Regs] = true;
 179     }
 180
 181     if (Desc.ImplicitDefs) {
 182       for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
 183         RegsUsed[*Regs] = true;
 184         MF->setPhysRegUsed(*Regs);
 185       }
 186     }
 187
 188     // Loop over uses, move from memory into registers.
 189     for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
 190       MachineOperand &op = MI->getOperand(i);
 191
 192       if (op.isRegister() && op.getReg() &&
 193           MRegisterInfo::isVirtualRegister(op.getReg())) {
 194         unsigned virtualReg = (unsigned) op.getReg();
 195         DOUT << "op: " << op << "\n";
 196         DOUT << "\t inst[" << i << "]: ";
 197         DEBUG(MI->print(*cerr.stream(), TM));
 198
 199         // make sure the same virtual register maps to the same physical
 200         // register in any given instruction
 201         unsigned physReg = Virt2PhysRegMap[virtualReg];
 202         if (physReg == 0) {
 203           if (op.isDef()) {
 204             int TiedOp = MI->getInstrDescriptor()->findTiedToSrcOperand(i);
 205             if (TiedOp == -1) {
 206               physReg = getFreeReg(virtualReg);
 207             } else {
 208               // must be same register number as the source operand that is
 209               // tied to. This maps a = b + c into b = b + c, and saves b into
 210               // a's spot.
 211               assert(MI->getOperand(TiedOp).isRegister()  &&
 212                      MI->getOperand(TiedOp).getReg() &&
 213                      MI->getOperand(TiedOp).isUse() &&
 214                      "Two address instruction invalid!");
 215
 216               physReg = MI->getOperand(TiedOp).getReg();
 217             }
 218             spillVirtReg(MBB, next(MI), virtualReg, physReg);
 219           } else {
 220             physReg = reloadVirtReg(MBB, MI, virtualReg);
 221             Virt2PhysRegMap[virtualReg] = physReg;
 222           }
 223         }
 224         MI->getOperand(i).setReg(physReg);
 225         DOUT << "virt: " << virtualReg << ", phys: " << op.getReg() << "\n";
 226       }
 227     }
 228     RegClassIdx.clear();
 229     RegsUsed.clear();
 230   }
 231 }
 232
 233
 234 /// runOnMachineFunction - Register allocate the whole function
 235 ///
 236 bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
 237   DOUT << "Machine Function\n";
 238   MF = &Fn;
 239   TM = &MF->getTarget();
 240   RegInfo = TM->getRegisterInfo();
 241
 242   // Loop over all of the basic blocks, eliminating virtual register references
 243   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
 244        MBB != MBBe; ++MBB)
 245     AllocateBasicBlock(*MBB);
 246
 247   StackSlotForVirtReg.clear();
 248   return true;
 249 }
 250
 251 FunctionPass *llvm::createSimpleRegisterAllocator() {
 252   return new RegAllocSimple();
 253 }