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UnXFAIL this test.
[llvm-complete.git] / utils / TableGen / CodeGenTarget.cpp
blobcf33fe6b1a6f57a148b576a998b3b6237e411713
1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "Record.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/Streams.h"
23 #include <algorithm>
24 using namespace llvm;
25
26 static cl::opt<unsigned>
27 AsmWriterNum("asmwriternum", cl::init(0),
28 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
29
30 /// getValueType - Return the MCV::ValueType that the specified TableGen record
31 /// corresponds to.
32 MVT::ValueType llvm::getValueType(Record *Rec) {
33 return (MVT::ValueType)Rec->getValueAsInt("Value");
34 }
35
36 std::string llvm::getName(MVT::ValueType T) {
37 switch (T) {
38 case MVT::Other: return "UNKNOWN";
39 case MVT::i1: return "MVT::i1";
40 case MVT::i8: return "MVT::i8";
41 case MVT::i16: return "MVT::i16";
42 case MVT::i32: return "MVT::i32";
43 case MVT::i64: return "MVT::i64";
44 case MVT::i128: return "MVT::i128";
45 case MVT::iAny: return "MVT::iAny";
46 case MVT::fAny: return "MVT::fAny";
47 case MVT::f32: return "MVT::f32";
48 case MVT::f64: return "MVT::f64";
49 case MVT::f80: return "MVT::f80";
50 case MVT::f128: return "MVT::f128";
51 case MVT::ppcf128: return "MVT::ppcf128";
52 case MVT::Flag: return "MVT::Flag";
53 case MVT::isVoid:return "MVT::void";
54 case MVT::v8i8: return "MVT::v8i8";
55 case MVT::v4i16: return "MVT::v4i16";
56 case MVT::v2i32: return "MVT::v2i32";
57 case MVT::v1i64: return "MVT::v1i64";
58 case MVT::v16i8: return "MVT::v16i8";
59 case MVT::v8i16: return "MVT::v8i16";
60 case MVT::v4i32: return "MVT::v4i32";
61 case MVT::v2i64: return "MVT::v2i64";
62 case MVT::v2f32: return "MVT::v2f32";
63 case MVT::v4f32: return "MVT::v4f32";
64 case MVT::v2f64: return "MVT::v2f64";
65 case MVT::v3i32: return "MVT::v3i32";
66 case MVT::v3f32: return "MVT::v3f32";
67 case MVT::iPTR: return "TLI.getPointerTy()";
68 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
69 }
70 }
71
72 std::string llvm::getEnumName(MVT::ValueType T) {
73 switch (T) {
74 case MVT::Other: return "MVT::Other";
75 case MVT::i1: return "MVT::i1";
76 case MVT::i8: return "MVT::i8";
77 case MVT::i16: return "MVT::i16";
78 case MVT::i32: return "MVT::i32";
79 case MVT::i64: return "MVT::i64";
80 case MVT::i128: return "MVT::i128";
81 case MVT::iAny: return "MVT::iAny";
82 case MVT::fAny: return "MVT::fAny";
83 case MVT::f32: return "MVT::f32";
84 case MVT::f64: return "MVT::f64";
85 case MVT::f80: return "MVT::f80";
86 case MVT::f128: return "MVT::f128";
87 case MVT::ppcf128: return "MVT::ppcf128";
88 case MVT::Flag: return "MVT::Flag";
89 case MVT::isVoid:return "MVT::isVoid";
90 case MVT::v8i8: return "MVT::v8i8";
91 case MVT::v4i16: return "MVT::v4i16";
92 case MVT::v2i32: return "MVT::v2i32";
93 case MVT::v1i64: return "MVT::v1i64";
94 case MVT::v16i8: return "MVT::v16i8";
95 case MVT::v8i16: return "MVT::v8i16";
96 case MVT::v4i32: return "MVT::v4i32";
97 case MVT::v2i64: return "MVT::v2i64";
98 case MVT::v2f32: return "MVT::v2f32";
99 case MVT::v4f32: return "MVT::v4f32";
100 case MVT::v2f64: return "MVT::v2f64";
101 case MVT::v3i32: return "MVT::v3i32";
102 case MVT::v3f32: return "MVT::v3f32";
103 case MVT::iPTR: return "MVT::iPTR";
104 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
105 }
106 }
107
108 /// getQualifiedName - Return the name of the specified record, with a
109 /// namespace qualifier if the record contains one.
110 ///
111 std::string llvm::getQualifiedName(const Record *R) {
112 std::string Namespace = R->getValueAsString("Namespace");
113 if (Namespace.empty()) return R->getName();
114 return Namespace + "::" + R->getName();
115 }
116
117
118
119
120 /// getTarget - Return the current instance of the Target class.
121 ///
122 CodeGenTarget::CodeGenTarget() {
123 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
124 if (Targets.size() == 0)
125 throw std::string("ERROR: No 'Target' subclasses defined!");
126 if (Targets.size() != 1)
127 throw std::string("ERROR: Multiple subclasses of Target defined!");
128 TargetRec = Targets[0];
129 }
130
131
132 const std::string &CodeGenTarget::getName() const {
133 return TargetRec->getName();
134 }
135
136 Record *CodeGenTarget::getInstructionSet() const {
137 return TargetRec->getValueAsDef("InstructionSet");
138 }
139
140 /// getAsmWriter - Return the AssemblyWriter definition for this target.
141 ///
142 Record *CodeGenTarget::getAsmWriter() const {
143 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
144 if (AsmWriterNum >= LI.size())
145 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
146 return LI[AsmWriterNum];
147 }
148
149 void CodeGenTarget::ReadRegisters() const {
150 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
151 if (Regs.empty())
152 throw std::string("No 'Register' subclasses defined!");
153
154 Registers.reserve(Regs.size());
155 Registers.assign(Regs.begin(), Regs.end());
156 }
157
158 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
159 DeclaredSpillSize = R->getValueAsInt("SpillSize");
160 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
161 }
162
163 const std::string &CodeGenRegister::getName() const {
164 return TheDef->getName();
165 }
166
167 void CodeGenTarget::ReadRegisterClasses() const {
168 std::vector<Record*> RegClasses =
169 Records.getAllDerivedDefinitions("RegisterClass");
170 if (RegClasses.empty())
171 throw std::string("No 'RegisterClass' subclasses defined!");
172
173 RegisterClasses.reserve(RegClasses.size());
174 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
175 }
176
177 std::vector<unsigned char> CodeGenTarget::getRegisterVTs(Record *R) const {
178 std::vector<unsigned char> Result;
179 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
180 for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
181 const CodeGenRegisterClass &RC = RegisterClasses[i];
182 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
183 if (R == RC.Elements[ei]) {
184 const std::vector<MVT::ValueType> &InVTs = RC.getValueTypes();
185 for (unsigned i = 0, e = InVTs.size(); i != e; ++i)
186 Result.push_back(InVTs[i]);
187 }
188 }
189 }
190 return Result;
191 }
192
193
194 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
195 // Rename anonymous register classes.
196 if (R->getName().size() > 9 && R->getName()[9] == '.') {
197 static unsigned AnonCounter = 0;
198 R->setName("AnonRegClass_"+utostr(AnonCounter++));
199 }
200
201 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
202 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
203 Record *Type = TypeList[i];
204 if (!Type->isSubClassOf("ValueType"))
205 throw "RegTypes list member '" + Type->getName() +
206 "' does not derive from the ValueType class!";
207 VTs.push_back(getValueType(Type));
208 }
209 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
210
211 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
212 for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
213 Record *Reg = RegList[i];
214 if (!Reg->isSubClassOf("Register"))
215 throw "Register Class member '" + Reg->getName() +
216 "' does not derive from the Register class!";
217 Elements.push_back(Reg);
218 }
219
220 std::vector<Record*> SubRegClassList =
221 R->getValueAsListOfDefs("SubRegClassList");
222 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) {
223 Record *SubRegClass = SubRegClassList[i];
224 if (!SubRegClass->isSubClassOf("RegisterClass"))
225 throw "Register Class member '" + SubRegClass->getName() +
226 "' does not derive from the RegisterClass class!";
227 SubRegClasses.push_back(SubRegClass);
228 }
229
230 // Allow targets to override the size in bits of the RegisterClass.
231 unsigned Size = R->getValueAsInt("Size");
232
233 Namespace = R->getValueAsString("Namespace");
234 SpillSize = Size ? Size : MVT::getSizeInBits(VTs[0]);
235 SpillAlignment = R->getValueAsInt("Alignment");
236 CopyCost = R->getValueAsInt("CopyCost");
237 MethodBodies = R->getValueAsCode("MethodBodies");
238 MethodProtos = R->getValueAsCode("MethodProtos");
239 }
240
241 const std::string &CodeGenRegisterClass::getName() const {
242 return TheDef->getName();
243 }
244
245 void CodeGenTarget::ReadLegalValueTypes() const {
246 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
247 for (unsigned i = 0, e = RCs.size(); i != e; ++i)
248 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
249 LegalValueTypes.push_back(RCs[i].VTs[ri]);
250
251 // Remove duplicates.
252 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
253 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
254 LegalValueTypes.end()),
255 LegalValueTypes.end());
256 }
257
258
259 void CodeGenTarget::ReadInstructions() const {
260 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
261 if (Insts.size() <= 2)
262 throw std::string("No 'Instruction' subclasses defined!");
263
264 // Parse the instructions defined in the .td file.
265 std::string InstFormatName =
266 getAsmWriter()->getValueAsString("InstFormatName");
267
268 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
269 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
270 Instructions.insert(std::make_pair(Insts[i]->getName(),
271 CodeGenInstruction(Insts[i], AsmStr)));
272 }
273 }
274
275 /// getInstructionsByEnumValue - Return all of the instructions defined by the
276 /// target, ordered by their enum value.
277 void CodeGenTarget::
278 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
279 &NumberedInstructions) {
280 std::map<std::string, CodeGenInstruction>::const_iterator I;
281 I = getInstructions().find("PHI");
282 if (I == Instructions.end()) throw "Could not find 'PHI' instruction!";
283 const CodeGenInstruction *PHI = &I->second;
284
285 I = getInstructions().find("INLINEASM");
286 if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!";
287 const CodeGenInstruction *INLINEASM = &I->second;
288
289 I = getInstructions().find("LABEL");
290 if (I == Instructions.end()) throw "Could not find 'LABEL' instruction!";
291 const CodeGenInstruction *LABEL = &I->second;
292
293 I = getInstructions().find("EXTRACT_SUBREG");
294 if (I == Instructions.end())
295 throw "Could not find 'EXTRACT_SUBREG' instruction!";
296 const CodeGenInstruction *EXTRACT_SUBREG = &I->second;
297
298 I = getInstructions().find("INSERT_SUBREG");
299 if (I == Instructions.end())
300 throw "Could not find 'INSERT_SUBREG' instruction!";
301 const CodeGenInstruction *INSERT_SUBREG = &I->second;
302
303 // Print out the rest of the instructions now.
304 NumberedInstructions.push_back(PHI);
305 NumberedInstructions.push_back(INLINEASM);
306 NumberedInstructions.push_back(LABEL);
307 NumberedInstructions.push_back(EXTRACT_SUBREG);
308 NumberedInstructions.push_back(INSERT_SUBREG);
309 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
310 if (&II->second != PHI &&
311 &II->second != INLINEASM &&
312 &II->second != LABEL &&
313 &II->second != EXTRACT_SUBREG &&
314 &II->second != INSERT_SUBREG)
315 NumberedInstructions.push_back(&II->second);
316 }
317
318
319 /// isLittleEndianEncoding - Return whether this target encodes its instruction
320 /// in little-endian format, i.e. bits laid out in the order [0..n]
321 ///
322 bool CodeGenTarget::isLittleEndianEncoding() const {
323 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
324 }
325
326 //===----------------------------------------------------------------------===//
327 // ComplexPattern implementation
328 //
329 ComplexPattern::ComplexPattern(Record *R) {
330 Ty = ::getValueType(R->getValueAsDef("Ty"));
331 NumOperands = R->getValueAsInt("NumOperands");
332 SelectFunc = R->getValueAsString("SelectFunc");
333 RootNodes = R->getValueAsListOfDefs("RootNodes");
334
335 // Parse the properties.
336 Properties = 0;
337 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
338 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
339 if (PropList[i]->getName() == "SDNPHasChain") {
340 Properties |= 1 << SDNPHasChain;
341 } else if (PropList[i]->getName() == "SDNPOptInFlag") {
342 Properties |= 1 << SDNPOptInFlag;
343 } else if (PropList[i]->getName() == "SDNPMayStore") {
344 Properties |= 1 << SDNPMayStore;
345 } else if (PropList[i]->getName() == "SDNPMayLoad") {
346 Properties |= 1 << SDNPMayLoad;
347 } else if (PropList[i]->getName() == "SDNPSideEffect") {
348 Properties |= 1 << SDNPSideEffect;
349 } else {
350 cerr << "Unsupported SD Node property '" << PropList[i]->getName()
351 << "' on ComplexPattern '" << R->getName() << "'!\n";
352 exit(1);
353 }
354 }
355
356 //===----------------------------------------------------------------------===//
357 // CodeGenIntrinsic Implementation
358 //===----------------------------------------------------------------------===//
359
360 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC) {
361 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
362
363 std::vector<CodeGenIntrinsic> Result;
364
365 // If we are in the context of a target .td file, get the target info so that
366 // we can decode the current intptr_t.
367 CodeGenTarget *CGT = 0;
368 if (Records.getClass("Target") &&
369 Records.getAllDerivedDefinitions("Target").size() == 1)
370 CGT = new CodeGenTarget();
371
372 for (unsigned i = 0, e = I.size(); i != e; ++i)
373 Result.push_back(CodeGenIntrinsic(I[i], CGT));
374 delete CGT;
375 return Result;
376 }
377
378 CodeGenIntrinsic::CodeGenIntrinsic(Record *R, CodeGenTarget *CGT) {
379 TheDef = R;
380 std::string DefName = R->getName();
381 ModRef = WriteMem;
382 isOverloaded = false;
383
384 if (DefName.size() <= 4 ||
385 std::string(DefName.begin(), DefName.begin()+4) != "int_")
386 throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
387 EnumName = std::string(DefName.begin()+4, DefName.end());
388 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
389 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
390 TargetPrefix = R->getValueAsString("TargetPrefix");
391 Name = R->getValueAsString("LLVMName");
392 if (Name == "") {
393 // If an explicit name isn't specified, derive one from the DefName.
394 Name = "llvm.";
395 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
396 if (EnumName[i] == '_')
397 Name += '.';
398 else
399 Name += EnumName[i];
400 } else {
401 // Verify it starts with "llvm.".
402 if (Name.size() <= 5 ||
403 std::string(Name.begin(), Name.begin()+5) != "llvm.")
404 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
405 }
406
407 // If TargetPrefix is specified, make sure that Name starts with
408 // "llvm.<targetprefix>.".
409 if (!TargetPrefix.empty()) {
410 if (Name.size() < 6+TargetPrefix.size() ||
411 std::string(Name.begin()+5, Name.begin()+6+TargetPrefix.size())
412 != (TargetPrefix+"."))
413 throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
414 TargetPrefix + ".'!";
415 }
416
417 // Parse the list of argument types.
418 ListInit *TypeList = R->getValueAsListInit("Types");
419 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
420 Record *TyEl = TypeList->getElementAsRecord(i);
421 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
422 MVT::ValueType VT = getValueType(TyEl->getValueAsDef("VT"));
423 isOverloaded |= VT == MVT::iAny || VT == MVT::fAny;
424 ArgVTs.push_back(VT);
425 ArgTypeDefs.push_back(TyEl);
426 }
427 if (ArgVTs.size() == 0)
428 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!";
429
430
431 // Parse the intrinsic properties.
432 ListInit *PropList = R->getValueAsListInit("Properties");
433 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
434 Record *Property = PropList->getElementAsRecord(i);
435 assert(Property->isSubClassOf("IntrinsicProperty") &&
436 "Expected a property!");
437
438 if (Property->getName() == "IntrNoMem")
439 ModRef = NoMem;
440 else if (Property->getName() == "IntrReadArgMem")
441 ModRef = ReadArgMem;
442 else if (Property->getName() == "IntrReadMem")
443 ModRef = ReadMem;
444 else if (Property->getName() == "IntrWriteArgMem")
445 ModRef = WriteArgMem;
446 else if (Property->getName() == "IntrWriteMem")
447 ModRef = WriteMem;
448 else
449 assert(0 && "Unknown property!");
450 }
451 }
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