lib/CodeGen/PHIElimination.cpp

   1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the LLVM research group and is distributed under
   6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This pass eliminates machine instruction PHI nodes by inserting copy
  11 // instructions.  This destroys SSA information, but is the desired input for
  12 // some register allocators.
  13 //
  14 //===----------------------------------------------------------------------===//
  15
  16 #include "llvm/CodeGen/LiveVariables.h"
  17 #include "llvm/CodeGen/Passes.h"
  18 #include "llvm/CodeGen/MachineFunctionPass.h"
  19 #include "llvm/CodeGen/MachineInstr.h"
  20 #include "llvm/CodeGen/SSARegMap.h"
  21 #include "llvm/Target/TargetInstrInfo.h"
  22 #include "llvm/Target/TargetMachine.h"
  23 #include "llvm/ADT/DenseMap.h"
  24 #include "llvm/ADT/STLExtras.h"
  25 #include "llvm/ADT/Statistic.h"
  26 #include "llvm/Support/Visibility.h"
  27 #include <set>
  28 #include <algorithm>
  29 using namespace llvm;
  30
  31 namespace {
  32   static Statistic<> NumAtomic("phielim", "Number of atomic phis lowered");
  33   static Statistic<> NumSimple("phielim", "Number of simple phis lowered");
  34
  35   struct VISIBILITY_HIDDEN PNE : public MachineFunctionPass {
  36     bool runOnMachineFunction(MachineFunction &Fn) {
  37       bool Changed = false;
  38
  39       // Eliminate PHI instructions by inserting copies into predecessor blocks.
  40       for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
  41         Changed |= EliminatePHINodes(Fn, *I);
  42
  43       return Changed;
  44     }
  45
  46     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
  47       AU.addPreserved<LiveVariables>();
  48       MachineFunctionPass::getAnalysisUsage(AU);
  49     }
  50
  51   private:
  52     /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
  53     /// in predecessor basic blocks.
  54     ///
  55     bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB);
  56     void LowerAtomicPHINode(MachineBasicBlock &MBB,
  57                             MachineBasicBlock::iterator AfterPHIsIt,
  58                             DenseMap<unsigned, VirtReg2IndexFunctor> &VUC);
  59   };
  60
  61   RegisterPass<PNE> X("phi-node-elimination",
  62                       "Eliminate PHI nodes for register allocation");
  63 }
  64
  65
  66 const PassInfo *llvm::PHIEliminationID = X.getPassInfo();
  67
  68 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
  69 /// predecessor basic blocks.
  70 ///
  71 bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
  72   if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
  73     return false;   // Quick exit for basic blocks without PHIs.
  74
  75   // VRegPHIUseCount - Keep track of the number of times each virtual register
  76   // is used by PHI nodes in successors of this block.
  77   DenseMap<unsigned, VirtReg2IndexFunctor> VRegPHIUseCount;
  78   VRegPHIUseCount.grow(MF.getSSARegMap()->getLastVirtReg());
  79
  80   for (MachineBasicBlock::pred_iterator PI = MBB.pred_begin(),
  81          E = MBB.pred_end(); PI != E; ++PI)
  82     for (MachineBasicBlock::succ_iterator SI = (*PI)->succ_begin(),
  83            E = (*PI)->succ_end(); SI != E; ++SI)
  84       for (MachineBasicBlock::iterator BBI = (*SI)->begin(), E = (*SI)->end();
  85            BBI != E && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
  86         for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
  87           VRegPHIUseCount[BBI->getOperand(i).getReg()]++;
  88
  89   // Get an iterator to the first instruction after the last PHI node (this may
  90   // also be the end of the basic block).
  91   MachineBasicBlock::iterator AfterPHIsIt = MBB.begin();
  92   while (AfterPHIsIt != MBB.end() &&
  93          AfterPHIsIt->getOpcode() == TargetInstrInfo::PHI)
  94     ++AfterPHIsIt;    // Skip over all of the PHI nodes...
  95
  96   while (MBB.front().getOpcode() == TargetInstrInfo::PHI) {
  97     LowerAtomicPHINode(MBB, AfterPHIsIt, VRegPHIUseCount);
  98   }
  99   return true;
 100 }
 101
 102 /// InstructionUsesRegister - Return true if the specified machine instr has a
 103 /// use of the specified register.
 104 static bool InstructionUsesRegister(MachineInstr *MI, unsigned SrcReg) {
 105   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
 106     if (MI->getOperand(0).isRegister() &&
 107         MI->getOperand(0).getReg() == SrcReg &&
 108         MI->getOperand(0).isUse())
 109       return true;
 110   return false;
 111 }
 112
 113 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
 114 /// under the assuption that it needs to be lowered in a way that supports
 115 /// atomic execution of PHIs.  This lowering method is always correct all of the
 116 /// time.
 117 void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
 118                              MachineBasicBlock::iterator AfterPHIsIt,
 119                    DenseMap<unsigned, VirtReg2IndexFunctor> &VRegPHIUseCount) {
 120   // Unlink the PHI node from the basic block, but don't delete the PHI yet.
 121   MachineInstr *MPhi = MBB.remove(MBB.begin());
 122
 123   unsigned DestReg = MPhi->getOperand(0).getReg();
 124
 125   // Create a new register for the incoming PHI arguments/
 126   MachineFunction &MF = *MBB.getParent();
 127   const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg);
 128   unsigned IncomingReg = MF.getSSARegMap()->createVirtualRegister(RC);
 129
 130   // Insert a register to register copy in the top of the current block (but
 131   // after any remaining phi nodes) which copies the new incoming register
 132   // into the phi node destination.
 133   //
 134   const MRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
 135   RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC);
 136
 137   // Update live variable information if there is any...
 138   LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
 139   if (LV) {
 140     MachineInstr *PHICopy = prior(AfterPHIsIt);
 141
 142     // Add information to LiveVariables to know that the incoming value is
 143     // killed.  Note that because the value is defined in several places (once
 144     // each for each incoming block), the "def" block and instruction fields
 145     // for the VarInfo is not filled in.
 146     //
 147     LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
 148
 149     // Since we are going to be deleting the PHI node, if it is the last use
 150     // of any registers, or if the value itself is dead, we need to move this
 151     // information over to the new copy we just inserted.
 152     //
 153     LV->removeVirtualRegistersKilled(MPhi);
 154
 155     // If the result is dead, update LV.
 156     if (LV->RegisterDefIsDead(MPhi, DestReg)) {
 157       LV->addVirtualRegisterDead(DestReg, PHICopy);
 158       LV->removeVirtualRegistersDead(MPhi);
 159     }
 160
 161     // Realize that the destination register is defined by the PHI copy now, not
 162     // the PHI itself.
 163     LV->getVarInfo(DestReg).DefInst = PHICopy;
 164   }
 165
 166   // Adjust the VRegPHIUseCount map to account for the removal of this PHI
 167   // node.
 168   unsigned NumPreds = (MPhi->getNumOperands()-1)/2;
 169   for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
 170     VRegPHIUseCount[MPhi->getOperand(i).getReg()] -= NumPreds;
 171
 172   // Now loop over all of the incoming arguments, changing them to copy into
 173   // the IncomingReg register in the corresponding predecessor basic block.
 174   //
 175   std::set<MachineBasicBlock*> MBBsInsertedInto;
 176   for (int i = MPhi->getNumOperands() - 1; i >= 2; i-=2) {
 177     unsigned SrcReg = MPhi->getOperand(i-1).getReg();
 178     assert(MRegisterInfo::isVirtualRegister(SrcReg) &&
 179            "Machine PHI Operands must all be virtual registers!");
 180
 181     // Get the MachineBasicBlock equivalent of the BasicBlock that is the
 182     // source path the PHI.
 183     MachineBasicBlock &opBlock = *MPhi->getOperand(i).getMachineBasicBlock();
 184
 185     // Check to make sure we haven't already emitted the copy for this block.
 186     // This can happen because PHI nodes may have multiple entries for the
 187     // same basic block.
 188     if (!MBBsInsertedInto.insert(&opBlock).second)
 189       continue;  // If the copy has already been emitted, we're done.
 190
 191     // Get an iterator pointing to the first terminator in the block (or end()).
 192     // This is the point where we can insert a copy if we'd like to.
 193     MachineBasicBlock::iterator I = opBlock.getFirstTerminator();
 194
 195     // Insert the copy.
 196     RegInfo->copyRegToReg(opBlock, I, IncomingReg, SrcReg, RC);
 197
 198     // Now update live variable information if we have it.  Otherwise we're done
 199     if (!LV) continue;
 200
 201     // We want to be able to insert a kill of the register if this PHI
 202     // (aka, the copy we just inserted) is the last use of the source
 203     // value.  Live variable analysis conservatively handles this by
 204     // saying that the value is live until the end of the block the PHI
 205     // entry lives in.  If the value really is dead at the PHI copy, there
 206     // will be no successor blocks which have the value live-in.
 207     //
 208     // Check to see if the copy is the last use, and if so, update the
 209     // live variables information so that it knows the copy source
 210     // instruction kills the incoming value.
 211     //
 212     LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg);
 213
 214     // Loop over all of the successors of the basic block, checking to see
 215     // if the value is either live in the block, or if it is killed in the
 216     // block.  Also check to see if this register is in use by another PHI
 217     // node which has not yet been eliminated.  If so, it will be killed
 218     // at an appropriate point later.
 219     //
 220
 221     // Is it used by any PHI instructions in this block?
 222     bool ValueIsLive = VRegPHIUseCount[SrcReg] != 0;
 223
 224     std::vector<MachineBasicBlock*> OpSuccBlocks;
 225
 226     // Otherwise, scan successors, including the BB the PHI node lives in.
 227     for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(),
 228            E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) {
 229       MachineBasicBlock *SuccMBB = *SI;
 230
 231       // Is it alive in this successor?
 232       unsigned SuccIdx = SuccMBB->getNumber();
 233       if (SuccIdx < InRegVI.AliveBlocks.size() &&
 234           InRegVI.AliveBlocks[SuccIdx]) {
 235         ValueIsLive = true;
 236         break;
 237       }
 238
 239       OpSuccBlocks.push_back(SuccMBB);
 240     }
 241
 242     // Check to see if this value is live because there is a use in a successor
 243     // that kills it.
 244     if (!ValueIsLive) {
 245       switch (OpSuccBlocks.size()) {
 246       case 1: {
 247         MachineBasicBlock *MBB = OpSuccBlocks[0];
 248         for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
 249           if (InRegVI.Kills[i]->getParent() == MBB) {
 250             ValueIsLive = true;
 251             break;
 252           }
 253         break;
 254       }
 255       case 2: {
 256         MachineBasicBlock *MBB1 = OpSuccBlocks[0], *MBB2 = OpSuccBlocks[1];
 257         for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
 258           if (InRegVI.Kills[i]->getParent() == MBB1 ||
 259               InRegVI.Kills[i]->getParent() == MBB2) {
 260             ValueIsLive = true;
 261             break;
 262           }
 263         break;
 264       }
 265       default:
 266         std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end());
 267         for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
 268           if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(),
 269                                  InRegVI.Kills[i]->getParent())) {
 270             ValueIsLive = true;
 271             break;
 272           }
 273       }
 274     }
 275
 276     // Okay, if we now know that the value is not live out of the block,
 277     // we can add a kill marker in this block saying that it kills the incoming
 278     // value!
 279     if (!ValueIsLive) {
 280       // In our final twist, we have to decide which instruction kills the
 281       // register.  In most cases this is the copy, however, the first
 282       // terminator instruction at the end of the block may also use the value.
 283       // In this case, we should mark *it* as being the killing block, not the
 284       // copy.
 285       bool FirstTerminatorUsesValue = false;
 286       if (I != opBlock.end()) {
 287         FirstTerminatorUsesValue = InstructionUsesRegister(I, SrcReg);
 288
 289         // Check that no other terminators use values.
 290 #ifndef NDEBUG
 291         for (MachineBasicBlock::iterator TI = next(I); TI != opBlock.end();
 292              ++TI) {
 293           assert(!InstructionUsesRegister(TI, SrcReg) &&
 294                  "Terminator instructions cannot use virtual registers unless"
 295                  "they are the first terminator in a block!");
 296         }
 297 #endif
 298       }
 299
 300       MachineBasicBlock::iterator KillInst;
 301       if (!FirstTerminatorUsesValue)
 302         KillInst = prior(I);
 303       else
 304         KillInst = I;
 305
 306       // Finally, mark it killed.
 307       LV->addVirtualRegisterKilled(SrcReg, KillInst);
 308
 309       // This vreg no longer lives all of the way through opBlock.
 310       unsigned opBlockNum = opBlock.getNumber();
 311       if (opBlockNum < InRegVI.AliveBlocks.size())
 312         InRegVI.AliveBlocks[opBlockNum] = false;
 313     }
 314   }
 315
 316   // Really delete the PHI instruction now!
 317   delete MPhi;
 318   ++NumAtomic;
 319 }