lib/CodeGen/DeadMachineInstructionElim.cpp

   1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This is an extremely simple MachineInstr-level dead-code-elimination pass.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "llvm/ADT/Statistic.h"
  14 #include "llvm/CodeGen/MachineFunctionPass.h"
  15 #include "llvm/CodeGen/MachineRegisterInfo.h"
  16 #include "llvm/CodeGen/Passes.h"
  17 #include "llvm/CodeGen/TargetSubtargetInfo.h"
  18 #include "llvm/Pass.h"
  19 #include "llvm/Support/Debug.h"
  20 #include "llvm/Support/raw_ostream.h"
  21
  22 using namespace llvm;
  23
  24 #define DEBUG_TYPE "dead-mi-elimination"
  25
  26 STATISTIC(NumDeletes,          "Number of dead instructions deleted");
  27
  28 namespace {
  29   class DeadMachineInstructionElim : public MachineFunctionPass {
  30     bool runOnMachineFunction(MachineFunction &MF) override;
  31
  32     const TargetRegisterInfo *TRI;
  33     const MachineRegisterInfo *MRI;
  34     const TargetInstrInfo *TII;
  35     BitVector LivePhysRegs;
  36
  37   public:
  38     static char ID; // Pass identification, replacement for typeid
  39     DeadMachineInstructionElim() : MachineFunctionPass(ID) {
  40      initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry());
  41     }
  42
  43     void getAnalysisUsage(AnalysisUsage &AU) const override {
  44       AU.setPreservesCFG();
  45       MachineFunctionPass::getAnalysisUsage(AU);
  46     }
  47
  48   private:
  49     bool isDead(const MachineInstr *MI) const;
  50   };
  51 }
  52 char DeadMachineInstructionElim::ID = 0;
  53 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID;
  54
  55 INITIALIZE_PASS(DeadMachineInstructionElim, DEBUG_TYPE,
  56                 "Remove dead machine instructions", false, false)
  57
  58 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
  59   // Technically speaking inline asm without side effects and no defs can still
  60   // be deleted. But there is so much bad inline asm code out there, we should
  61   // let them be.
  62   if (MI->isInlineAsm())
  63     return false;
  64
  65   // Don't delete frame allocation labels.
  66   if (MI->getOpcode() == TargetOpcode::LOCAL_ESCAPE)
  67     return false;
  68
  69   // Don't delete instructions with side effects.
  70   bool SawStore = false;
  71   if (!MI->isSafeToMove(nullptr, SawStore) && !MI->isPHI())
  72     return false;
  73
  74   // Examine each operand.
  75   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
  76     const MachineOperand &MO = MI->getOperand(i);
  77     if (MO.isReg() && MO.isDef()) {
  78       unsigned Reg = MO.getReg();
  79       if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
  80         // Don't delete live physreg defs, or any reserved register defs.
  81         if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
  82           return false;
  83       } else {
  84         if (!MRI->use_nodbg_empty(Reg))
  85           // This def has a non-debug use. Don't delete the instruction!
  86           return false;
  87       }
  88     }
  89   }
  90
  91   // If there are no defs with uses, the instruction is dead.
  92   return true;
  93 }
  94
  95 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
  96   if (skipFunction(MF.getFunction()))
  97     return false;
  98
  99   bool AnyChanges = false;
 100   MRI = &MF.getRegInfo();
 101   TRI = MF.getSubtarget().getRegisterInfo();
 102   TII = MF.getSubtarget().getInstrInfo();
 103
 104   // Loop over all instructions in all blocks, from bottom to top, so that it's
 105   // more likely that chains of dependent but ultimately dead instructions will
 106   // be cleaned up.
 107   for (MachineBasicBlock &MBB : make_range(MF.rbegin(), MF.rend())) {
 108     // Start out assuming that reserved registers are live out of this block.
 109     LivePhysRegs = MRI->getReservedRegs();
 110
 111     // Add live-ins from successors to LivePhysRegs. Normally, physregs are not
 112     // live across blocks, but some targets (x86) can have flags live out of a
 113     // block.
 114     for (MachineBasicBlock::succ_iterator S = MBB.succ_begin(),
 115            E = MBB.succ_end(); S != E; S++)
 116       for (const auto &LI : (*S)->liveins())
 117         LivePhysRegs.set(LI.PhysReg);
 118
 119     // Now scan the instructions and delete dead ones, tracking physreg
 120     // liveness as we go.
 121     for (MachineBasicBlock::reverse_iterator MII = MBB.rbegin(),
 122          MIE = MBB.rend(); MII != MIE; ) {
 123       MachineInstr *MI = &*MII++;
 124
 125       // If the instruction is dead, delete it!
 126       if (isDead(MI)) {
 127         LLVM_DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << *MI);
 128         // It is possible that some DBG_VALUE instructions refer to this
 129         // instruction.  They get marked as undef and will be deleted
 130         // in the live debug variable analysis.
 131         MI->eraseFromParentAndMarkDBGValuesForRemoval();
 132         AnyChanges = true;
 133         ++NumDeletes;
 134         continue;
 135       }
 136
 137       // Record the physreg defs.
 138       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
 139         const MachineOperand &MO = MI->getOperand(i);
 140         if (MO.isReg() && MO.isDef()) {
 141           unsigned Reg = MO.getReg();
 142           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
 143             // Check the subreg set, not the alias set, because a def
 144             // of a super-register may still be partially live after
 145             // this def.
 146             for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true);
 147                  SR.isValid(); ++SR)
 148               LivePhysRegs.reset(*SR);
 149           }
 150         } else if (MO.isRegMask()) {
 151           // Register mask of preserved registers. All clobbers are dead.
 152           LivePhysRegs.clearBitsNotInMask(MO.getRegMask());
 153         }
 154       }
 155       // Record the physreg uses, after the defs, in case a physreg is
 156       // both defined and used in the same instruction.
 157       for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
 158         const MachineOperand &MO = MI->getOperand(i);
 159         if (MO.isReg() && MO.isUse()) {
 160           unsigned Reg = MO.getReg();
 161           if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
 162             for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
 163               LivePhysRegs.set(*AI);
 164           }
 165         }
 166       }
 167     }
 168   }
 169
 170   LivePhysRegs.clear();
 171   return AnyChanges;
 172 }