lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp

   1 //===-------- LegalizeTypesGeneric.cpp - Generic type legalization --------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements generic type expansion and splitting for LegalizeTypes.
  10 // The routines here perform legalization when the details of the type (such as
  11 // whether it is an integer or a float) do not matter.
  12 // Expansion is the act of changing a computation in an illegal type to be a
  13 // computation in two identical registers of a smaller type.  The Lo/Hi part
  14 // is required to be stored first in memory on little/big-endian machines.
  15 // Splitting is the act of changing a computation in an illegal type to be a
  16 // computation in two not necessarily identical registers of a smaller type.
  17 // There are no requirements on how the type is represented in memory.
  18 //
  19 //===----------------------------------------------------------------------===//
  20
  21 #include "LegalizeTypes.h"
  22 #include "llvm/IR/DataLayout.h"
  23 using namespace llvm;
  24
  25 #define DEBUG_TYPE "legalize-types"
  26
  27 //===----------------------------------------------------------------------===//
  28 // Generic Result Expansion.
  29 //===----------------------------------------------------------------------===//
  30
  31 // These routines assume that the Lo/Hi part is stored first in memory on
  32 // little/big-endian machines, followed by the Hi/Lo part.  This means that
  33 // they cannot be used as is on vectors, for which Lo is always stored first.
  34 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
  35                                               SDValue &Lo, SDValue &Hi) {
  36   SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
  37   GetExpandedOp(Op, Lo, Hi);
  38 }
  39
  40 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
  41   EVT OutVT = N->getValueType(0);
  42   EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
  43   SDValue InOp = N->getOperand(0);
  44   EVT InVT = InOp.getValueType();
  45   SDLoc dl(N);
  46
  47   // Handle some special cases efficiently.
  48   switch (getTypeAction(InVT)) {
  49     case TargetLowering::TypeLegal:
  50     case TargetLowering::TypePromoteInteger:
  51       break;
  52     case TargetLowering::TypePromoteFloat:
  53       llvm_unreachable("Bitcast of a promotion-needing float should never need"
  54                        "expansion");
  55     case TargetLowering::TypeSoftenFloat: {
  56       // Expand the floating point operand only if it was converted to integers.
  57       // Otherwise, it is a legal type like f128 that can be saved in a register.
  58       auto SoftenedOp = GetSoftenedFloat(InOp);
  59       if (isLegalInHWReg(SoftenedOp.getValueType()))
  60         break;
  61       SplitInteger(SoftenedOp, Lo, Hi);
  62       Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
  63       Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
  64       return;
  65     }
  66     case TargetLowering::TypeExpandInteger:
  67     case TargetLowering::TypeExpandFloat: {
  68       auto &DL = DAG.getDataLayout();
  69       // Convert the expanded pieces of the input.
  70       GetExpandedOp(InOp, Lo, Hi);
  71       if (TLI.hasBigEndianPartOrdering(InVT, DL) !=
  72           TLI.hasBigEndianPartOrdering(OutVT, DL))
  73         std::swap(Lo, Hi);
  74       Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
  75       Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
  76       return;
  77     }
  78     case TargetLowering::TypeSplitVector:
  79       GetSplitVector(InOp, Lo, Hi);
  80       if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout()))
  81         std::swap(Lo, Hi);
  82       Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
  83       Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
  84       return;
  85     case TargetLowering::TypeScalarizeVector:
  86       // Convert the element instead.
  87       SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi);
  88       Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
  89       Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
  90       return;
  91     case TargetLowering::TypeWidenVector: {
  92       assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST");
  93       InOp = GetWidenedVector(InOp);
  94       EVT LoVT, HiVT;
  95       std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT);
  96       std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT);
  97       if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout()))
  98         std::swap(Lo, Hi);
  99       Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
 100       Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
 101       return;
 102     }
 103   }
 104
 105   if (InVT.isVector() && OutVT.isInteger()) {
 106     // Handle cases like i64 = BITCAST v1i64 on x86, where the operand
 107     // is legal but the result is not.
 108     unsigned NumElems = 2;
 109     EVT ElemVT = NOutVT;
 110     EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
 111
 112     // If <ElemVT * N> is not a legal type, try <ElemVT/2 * (N*2)>.
 113     while (!isTypeLegal(NVT)) {
 114       unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2;
 115       // If the element size is smaller than byte, bail.
 116       if (NewSizeInBits < 8)
 117         break;
 118       NumElems *= 2;
 119       ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits);
 120       NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
 121     }
 122
 123     if (isTypeLegal(NVT)) {
 124       SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp);
 125
 126       SmallVector<SDValue, 8> Vals;
 127       for (unsigned i = 0; i < NumElems; ++i)
 128         Vals.push_back(DAG.getNode(
 129             ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, CastInOp,
 130             DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
 131
 132       // Build Lo, Hi pair by pairing extracted elements if needed.
 133       unsigned Slot = 0;
 134       for (unsigned e = Vals.size(); e - Slot > 2; Slot += 2, e += 1) {
 135         // Each iteration will BUILD_PAIR two nodes and append the result until
 136         // there are only two nodes left, i.e. Lo and Hi.
 137         SDValue LHS = Vals[Slot];
 138         SDValue RHS = Vals[Slot + 1];
 139
 140         if (DAG.getDataLayout().isBigEndian())
 141           std::swap(LHS, RHS);
 142
 143         Vals.push_back(DAG.getNode(
 144             ISD::BUILD_PAIR, dl,
 145             EVT::getIntegerVT(*DAG.getContext(), LHS.getValueSizeInBits() << 1),
 146             LHS, RHS));
 147       }
 148       Lo = Vals[Slot++];
 149       Hi = Vals[Slot++];
 150
 151       if (DAG.getDataLayout().isBigEndian())
 152         std::swap(Lo, Hi);
 153
 154       return;
 155     }
 156   }
 157
 158   // Lower the bit-convert to a store/load from the stack.
 159   assert(NOutVT.isByteSized() && "Expanded type not byte sized!");
 160
 161   // Create the stack frame object.  Make sure it is aligned for both
 162   // the source and expanded destination types.
 163   unsigned Alignment = DAG.getDataLayout().getPrefTypeAlignment(
 164       NOutVT.getTypeForEVT(*DAG.getContext()));
 165   SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment);
 166   int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
 167   MachinePointerInfo PtrInfo =
 168       MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), SPFI);
 169
 170   // Emit a store to the stack slot.
 171   SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo);
 172
 173   // Load the first half from the stack slot.
 174   Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo);
 175
 176   // Increment the pointer to the other half.
 177   unsigned IncrementSize = NOutVT.getSizeInBits() / 8;
 178   StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
 179                          DAG.getConstant(IncrementSize, dl,
 180                                          StackPtr.getValueType()));
 181
 182   // Load the second half from the stack slot.
 183   Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr,
 184                    PtrInfo.getWithOffset(IncrementSize),
 185                    MinAlign(Alignment, IncrementSize));
 186
 187   // Handle endianness of the load.
 188   if (TLI.hasBigEndianPartOrdering(OutVT, DAG.getDataLayout()))
 189     std::swap(Lo, Hi);
 190 }
 191
 192 void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo,
 193                                             SDValue &Hi) {
 194   // Return the operands.
 195   Lo = N->getOperand(0);
 196   Hi = N->getOperand(1);
 197 }
 198
 199 void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo,
 200                                                  SDValue &Hi) {
 201   GetExpandedOp(N->getOperand(0), Lo, Hi);
 202   SDValue Part = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ?
 203                    Hi : Lo;
 204
 205   assert(Part.getValueType() == N->getValueType(0) &&
 206          "Type twice as big as expanded type not itself expanded!");
 207
 208   GetPairElements(Part, Lo, Hi);
 209 }
 210
 211 void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo,
 212                                                     SDValue &Hi) {
 213   SDValue OldVec = N->getOperand(0);
 214   unsigned OldElts = OldVec.getValueType().getVectorNumElements();
 215   EVT OldEltVT = OldVec.getValueType().getVectorElementType();
 216   SDLoc dl(N);
 217
 218   // Convert to a vector of the expanded element type, for example
 219   // <3 x i64> -> <6 x i32>.
 220   EVT OldVT = N->getValueType(0);
 221   EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
 222
 223   if (OldVT != OldEltVT) {
 224     // The result of EXTRACT_VECTOR_ELT may be larger than the element type of
 225     // the input vector.  If so, extend the elements of the input vector to the
 226     // same bitwidth as the result before expanding.
 227     assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!");
 228     EVT NVecVT = EVT::getVectorVT(*DAG.getContext(), OldVT, OldElts);
 229     OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0));
 230   }
 231
 232   SDValue NewVec = DAG.getNode(ISD::BITCAST, dl,
 233                                EVT::getVectorVT(*DAG.getContext(),
 234                                                 NewVT, 2*OldElts),
 235                                OldVec);
 236
 237   // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector.
 238   SDValue Idx = N->getOperand(1);
 239
 240   Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx);
 241   Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
 242
 243   Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx,
 244                     DAG.getConstant(1, dl, Idx.getValueType()));
 245   Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx);
 246
 247   if (DAG.getDataLayout().isBigEndian())
 248     std::swap(Lo, Hi);
 249 }
 250
 251 void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo,
 252                                             SDValue &Hi) {
 253   assert(ISD::isNormalLoad(N) && "This routine only for normal loads!");
 254   SDLoc dl(N);
 255
 256   LoadSDNode *LD = cast<LoadSDNode>(N);
 257   EVT ValueVT = LD->getValueType(0);
 258   EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT);
 259   SDValue Chain = LD->getChain();
 260   SDValue Ptr = LD->getBasePtr();
 261   unsigned Alignment = LD->getAlignment();
 262   AAMDNodes AAInfo = LD->getAAInfo();
 263
 264   assert(NVT.isByteSized() && "Expanded type not byte sized!");
 265
 266   Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(), Alignment,
 267                    LD->getMemOperand()->getFlags(), AAInfo);
 268
 269   // Increment the pointer to the other half.
 270   unsigned IncrementSize = NVT.getSizeInBits() / 8;
 271   Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
 272                     DAG.getConstant(IncrementSize, dl, Ptr.getValueType()));
 273   Hi = DAG.getLoad(NVT, dl, Chain, Ptr,
 274                    LD->getPointerInfo().getWithOffset(IncrementSize),
 275                    MinAlign(Alignment, IncrementSize),
 276                    LD->getMemOperand()->getFlags(), AAInfo);
 277
 278   // Build a factor node to remember that this load is independent of the
 279   // other one.
 280   Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
 281                       Hi.getValue(1));
 282
 283   // Handle endianness of the load.
 284   if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout()))
 285     std::swap(Lo, Hi);
 286
 287   // Modified the chain - switch anything that used the old chain to use
 288   // the new one.
 289   ReplaceValueWith(SDValue(N, 1), Chain);
 290 }
 291
 292 void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) {
 293   EVT OVT = N->getValueType(0);
 294   EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT);
 295   SDValue Chain = N->getOperand(0);
 296   SDValue Ptr = N->getOperand(1);
 297   SDLoc dl(N);
 298   const unsigned Align = N->getConstantOperandVal(3);
 299
 300   Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align);
 301   Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0);
 302   Chain = Hi.getValue(1);
 303
 304   // Handle endianness of the load.
 305   if (TLI.hasBigEndianPartOrdering(OVT, DAG.getDataLayout()))
 306     std::swap(Lo, Hi);
 307
 308   // Modified the chain - switch anything that used the old chain to use
 309   // the new one.
 310   ReplaceValueWith(SDValue(N, 1), Chain);
 311 }
 312
 313
 314 //===--------------------------------------------------------------------===//
 315 // Generic Operand Expansion.
 316 //===--------------------------------------------------------------------===//
 317
 318 void DAGTypeLegalizer::IntegerToVector(SDValue Op, unsigned NumElements,
 319                                        SmallVectorImpl<SDValue> &Ops,
 320                                        EVT EltVT) {
 321   assert(Op.getValueType().isInteger());
 322   SDLoc DL(Op);
 323   SDValue Parts[2];
 324
 325   if (NumElements > 1) {
 326     NumElements >>= 1;
 327     SplitInteger(Op, Parts[0], Parts[1]);
 328     if (DAG.getDataLayout().isBigEndian())
 329       std::swap(Parts[0], Parts[1]);
 330     IntegerToVector(Parts[0], NumElements, Ops, EltVT);
 331     IntegerToVector(Parts[1], NumElements, Ops, EltVT);
 332   } else {
 333     Ops.push_back(DAG.getNode(ISD::BITCAST, DL, EltVT, Op));
 334   }
 335 }
 336
 337 SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) {
 338   SDLoc dl(N);
 339   if (N->getValueType(0).isVector() &&
 340       N->getOperand(0).getValueType().isInteger()) {
 341     // An illegal expanding type is being converted to a legal vector type.
 342     // Make a two element vector out of the expanded parts and convert that
 343     // instead, but only if the new vector type is legal (otherwise there
 344     // is no point, and it might create expansion loops).  For example, on
 345     // x86 this turns v1i64 = BITCAST i64 into v1i64 = BITCAST v2i32.
 346     //
 347     // FIXME: I'm not sure why we are first trying to split the input into
 348     // a 2 element vector, so I'm leaving it here to maintain the current
 349     // behavior.
 350     unsigned NumElts = 2;
 351     EVT OVT = N->getOperand(0).getValueType();
 352     EVT NVT = EVT::getVectorVT(*DAG.getContext(),
 353                                TLI.getTypeToTransformTo(*DAG.getContext(), OVT),
 354                                NumElts);
 355     if (!isTypeLegal(NVT)) {
 356       // If we can't find a legal type by splitting the integer in half,
 357       // then we can use the node's value type.
 358       NumElts = N->getValueType(0).getVectorNumElements();
 359       NVT = N->getValueType(0);
 360     }
 361
 362     SmallVector<SDValue, 8> Ops;
 363     IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType());
 364
 365     SDValue Vec =
 366         DAG.getBuildVector(NVT, dl, makeArrayRef(Ops.data(), NumElts));
 367     return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec);
 368   }
 369
 370   // Otherwise, store to a temporary and load out again as the new type.
 371   return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0));
 372 }
 373
 374 SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) {
 375   // The vector type is legal but the element type needs expansion.
 376   EVT VecVT = N->getValueType(0);
 377   unsigned NumElts = VecVT.getVectorNumElements();
 378   EVT OldVT = N->getOperand(0).getValueType();
 379   EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT);
 380   SDLoc dl(N);
 381
 382   assert(OldVT == VecVT.getVectorElementType() &&
 383          "BUILD_VECTOR operand type doesn't match vector element type!");
 384
 385   // Build a vector of twice the length out of the expanded elements.
 386   // For example <3 x i64> -> <6 x i32>.
 387   SmallVector<SDValue, 16> NewElts;
 388   NewElts.reserve(NumElts*2);
 389
 390   for (unsigned i = 0; i < NumElts; ++i) {
 391     SDValue Lo, Hi;
 392     GetExpandedOp(N->getOperand(i), Lo, Hi);
 393     if (DAG.getDataLayout().isBigEndian())
 394       std::swap(Lo, Hi);
 395     NewElts.push_back(Lo);
 396     NewElts.push_back(Hi);
 397   }
 398
 399   EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NewElts.size());
 400   SDValue NewVec = DAG.getBuildVector(NewVecVT, dl, NewElts);
 401
 402   // Convert the new vector to the old vector type.
 403   return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
 404 }
 405
 406 SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) {
 407   SDValue Lo, Hi;
 408   GetExpandedOp(N->getOperand(0), Lo, Hi);
 409   return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? Hi : Lo;
 410 }
 411
 412 SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) {
 413   // The vector type is legal but the element type needs expansion.
 414   EVT VecVT = N->getValueType(0);
 415   unsigned NumElts = VecVT.getVectorNumElements();
 416   SDLoc dl(N);
 417
 418   SDValue Val = N->getOperand(1);
 419   EVT OldEVT = Val.getValueType();
 420   EVT NewEVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldEVT);
 421
 422   assert(OldEVT == VecVT.getVectorElementType() &&
 423          "Inserted element type doesn't match vector element type!");
 424
 425   // Bitconvert to a vector of twice the length with elements of the expanded
 426   // type, insert the expanded vector elements, and then convert back.
 427   EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewEVT, NumElts*2);
 428   SDValue NewVec = DAG.getNode(ISD::BITCAST, dl,
 429                                NewVecVT, N->getOperand(0));
 430
 431   SDValue Lo, Hi;
 432   GetExpandedOp(Val, Lo, Hi);
 433   if (DAG.getDataLayout().isBigEndian())
 434     std::swap(Lo, Hi);
 435
 436   SDValue Idx = N->getOperand(2);
 437   Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx);
 438   NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Lo, Idx);
 439   Idx = DAG.getNode(ISD::ADD, dl,
 440                     Idx.getValueType(), Idx,
 441                     DAG.getConstant(1, dl, Idx.getValueType()));
 442   NewVec =  DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx);
 443
 444   // Convert the new vector to the old vector type.
 445   return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec);
 446 }
 447
 448 SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) {
 449   SDLoc dl(N);
 450   EVT VT = N->getValueType(0);
 451   assert(VT.getVectorElementType() == N->getOperand(0).getValueType() &&
 452          "SCALAR_TO_VECTOR operand type doesn't match vector element type!");
 453   unsigned NumElts = VT.getVectorNumElements();
 454   SmallVector<SDValue, 16> Ops(NumElts);
 455   Ops[0] = N->getOperand(0);
 456   SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType());
 457   for (unsigned i = 1; i < NumElts; ++i)
 458     Ops[i] = UndefVal;
 459   return DAG.getBuildVector(VT, dl, Ops);
 460 }
 461
 462 SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) {
 463   assert(ISD::isNormalStore(N) && "This routine only for normal stores!");
 464   assert(OpNo == 1 && "Can only expand the stored value so far");
 465   SDLoc dl(N);
 466
 467   StoreSDNode *St = cast<StoreSDNode>(N);
 468   EVT ValueVT = St->getValue().getValueType();
 469   EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT);
 470   SDValue Chain = St->getChain();
 471   SDValue Ptr = St->getBasePtr();
 472   unsigned Alignment = St->getAlignment();
 473   AAMDNodes AAInfo = St->getAAInfo();
 474
 475   assert(NVT.isByteSized() && "Expanded type not byte sized!");
 476   unsigned IncrementSize = NVT.getSizeInBits() / 8;
 477
 478   SDValue Lo, Hi;
 479   GetExpandedOp(St->getValue(), Lo, Hi);
 480
 481   if (TLI.hasBigEndianPartOrdering(ValueVT, DAG.getDataLayout()))
 482     std::swap(Lo, Hi);
 483
 484   Lo = DAG.getStore(Chain, dl, Lo, Ptr, St->getPointerInfo(), Alignment,
 485                     St->getMemOperand()->getFlags(), AAInfo);
 486
 487   Ptr = DAG.getObjectPtrOffset(dl, Ptr, IncrementSize);
 488   Hi = DAG.getStore(Chain, dl, Hi, Ptr,
 489                     St->getPointerInfo().getWithOffset(IncrementSize),
 490                     MinAlign(Alignment, IncrementSize),
 491                     St->getMemOperand()->getFlags(), AAInfo);
 492
 493   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
 494 }
 495
 496
 497 //===--------------------------------------------------------------------===//
 498 // Generic Result Splitting.
 499 //===--------------------------------------------------------------------===//
 500
 501 // Be careful to make no assumptions about which of Lo/Hi is stored first in
 502 // memory (for vectors it is always Lo first followed by Hi in the following
 503 // bytes; for integers and floats it is Lo first if and only if the machine is
 504 // little-endian).
 505
 506 void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
 507                                              SDValue &Lo, SDValue &Hi) {
 508   SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
 509   GetSplitOp(Op, Lo, Hi);
 510 }
 511
 512 static std::pair<SDValue, SDValue> SplitVSETCC(const SDNode *N,
 513                                                SelectionDAG &DAG) {
 514   SDLoc DL(N);
 515   EVT LoVT, HiVT;
 516   std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
 517
 518   // Split the inputs.
 519   SDValue Lo, Hi, LL, LH, RL, RH;
 520   std::tie(LL, LH) = DAG.SplitVectorOperand(N, 0);
 521   std::tie(RL, RH) = DAG.SplitVectorOperand(N, 1);
 522
 523   Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
 524   Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
 525
 526   return std::make_pair(Lo, Hi);
 527 }
 528
 529 void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo, SDValue &Hi) {
 530   SDValue LL, LH, RL, RH, CL, CH;
 531   SDLoc dl(N);
 532   GetSplitOp(N->getOperand(1), LL, LH);
 533   GetSplitOp(N->getOperand(2), RL, RH);
 534
 535   SDValue Cond = N->getOperand(0);
 536   CL = CH = Cond;
 537   if (Cond.getValueType().isVector()) {
 538     if (SDValue Res = WidenVSELECTAndMask(N))
 539       std::tie(CL, CH) = DAG.SplitVector(Res->getOperand(0), dl);
 540     // It seems to improve code to generate two narrow SETCCs as opposed to
 541     // splitting a wide result vector.
 542     else if (Cond.getOpcode() == ISD::SETCC)
 543       std::tie(CL, CH) = SplitVSETCC(Cond.getNode(), DAG);
 544     // Check if there are already splitted versions of the vector available and
 545     // use those instead of splitting the mask operand again.
 546     else if (getTypeAction(Cond.getValueType()) ==
 547              TargetLowering::TypeSplitVector)
 548       GetSplitVector(Cond, CL, CH);
 549     else
 550       std::tie(CL, CH) = DAG.SplitVector(Cond, dl);
 551   }
 552
 553   Lo = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), CL, LL, RL);
 554   Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH);
 555 }
 556
 557 void DAGTypeLegalizer::SplitRes_SELECT_CC(SDNode *N, SDValue &Lo,
 558                                           SDValue &Hi) {
 559   SDValue LL, LH, RL, RH;
 560   SDLoc dl(N);
 561   GetSplitOp(N->getOperand(2), LL, LH);
 562   GetSplitOp(N->getOperand(3), RL, RH);
 563
 564   Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0),
 565                    N->getOperand(1), LL, RL, N->getOperand(4));
 566   Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0),
 567                    N->getOperand(1), LH, RH, N->getOperand(4));
 568 }
 569
 570 void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) {
 571   EVT LoVT, HiVT;
 572   std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
 573   Lo = DAG.getUNDEF(LoVT);
 574   Hi = DAG.getUNDEF(HiVT);
 575 }