lib/Target/AMDGPU/AMDGPULegalizerInfo.h

   1 //===- AMDGPULegalizerInfo ---------------------------------------*- C++ -*-==//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 /// \file
   9 /// This file declares the targeting of the Machinelegalizer class for
  10 /// AMDGPU.
  11 /// \todo This should be generated by TableGen.
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
  15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINELEGALIZER_H
  16
  17 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
  18
  19 namespace llvm {
  20
  21 class GCNTargetMachine;
  22 class LLVMContext;
  23 class GCNSubtarget;
  24
  25 /// This class provides the information for the target register banks.
  26 class AMDGPULegalizerInfo : public LegalizerInfo {
  27 public:
  28   AMDGPULegalizerInfo(const GCNSubtarget &ST,
  29                       const GCNTargetMachine &TM);
  30
  31   bool legalizeCustom(MachineInstr &MI, MachineRegisterInfo &MRI,
  32                       MachineIRBuilder &MIRBuilder,
  33                       GISelChangeObserver &Observer) const override;
  34
  35   unsigned getSegmentAperture(unsigned AddrSpace,
  36                               MachineRegisterInfo &MRI,
  37                               MachineIRBuilder &MIRBuilder) const;
  38
  39   bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
  40                              MachineIRBuilder &MIRBuilder) const;
  41 };
  42 } // End llvm namespace.
  43 #endif