Revert r354244 "[DAGCombiner] Eliminate dead stores to stack."
[llvm-complete.git] / lib / Target / AMDGPU / SIFrameLowering.h
bloba8795e126f6979bae5bc0adb164de4948b9362ac
1 //===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
10 #define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
12 #include "AMDGPUFrameLowering.h"
14 namespace llvm {
16 class SIInstrInfo;
17 class SIMachineFunctionInfo;
18 class SIRegisterInfo;
19 class GCNSubtarget;
21 class SIFrameLowering final : public AMDGPUFrameLowering {
22 public:
23 SIFrameLowering(StackDirection D, unsigned StackAl, int LAO,
24 unsigned TransAl = 1) :
25 AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
26 ~SIFrameLowering() override = default;
28 void emitEntryFunctionPrologue(MachineFunction &MF,
29 MachineBasicBlock &MBB) const;
30 void emitPrologue(MachineFunction &MF,
31 MachineBasicBlock &MBB) const override;
32 void emitEpilogue(MachineFunction &MF,
33 MachineBasicBlock &MBB) const override;
34 int getFrameIndexReference(const MachineFunction &MF, int FI,
35 unsigned &FrameReg) const override;
37 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
38 RegScavenger *RS = nullptr) const override;
40 void processFunctionBeforeFrameFinalized(
41 MachineFunction &MF,
42 RegScavenger *RS = nullptr) const override;
44 MachineBasicBlock::iterator
45 eliminateCallFramePseudoInstr(MachineFunction &MF,
46 MachineBasicBlock &MBB,
47 MachineBasicBlock::iterator MI) const override;
49 private:
50 void emitFlatScratchInit(const GCNSubtarget &ST,
51 MachineFunction &MF,
52 MachineBasicBlock &MBB) const;
54 unsigned getReservedPrivateSegmentBufferReg(
55 const GCNSubtarget &ST,
56 const SIInstrInfo *TII,
57 const SIRegisterInfo *TRI,
58 SIMachineFunctionInfo *MFI,
59 MachineFunction &MF) const;
61 std::pair<unsigned, unsigned> getReservedPrivateSegmentWaveByteOffsetReg(
62 const GCNSubtarget &ST,
63 const SIInstrInfo *TII,
64 const SIRegisterInfo *TRI,
65 SIMachineFunctionInfo *MFI,
66 MachineFunction &MF) const;
68 /// Emits debugger prologue.
69 void emitDebuggerPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const;
71 // Emit scratch setup code for AMDPAL or Mesa, assuming ResourceRegUsed is set.
72 void emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineFunction &MF,
73 MachineBasicBlock &MBB, SIMachineFunctionInfo *MFI,
74 MachineBasicBlock::iterator I, unsigned PreloadedPrivateBufferReg,
75 unsigned ScratchRsrcReg) const;
77 public:
78 bool hasFP(const MachineFunction &MF) const override;
79 bool hasSP(const MachineFunction &MF) const;
82 } // end namespace llvm
84 #endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H