lib/Target/Lanai/LanaiTargetMachine.cpp

   1 //===-- LanaiTargetMachine.cpp - Define TargetMachine for Lanai ---------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // Implements the info about Lanai target spec.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "LanaiTargetMachine.h"
  14
  15 #include "Lanai.h"
  16 #include "LanaiTargetObjectFile.h"
  17 #include "LanaiTargetTransformInfo.h"
  18 #include "llvm/Analysis/TargetTransformInfo.h"
  19 #include "llvm/CodeGen/Passes.h"
  20 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
  21 #include "llvm/CodeGen/TargetPassConfig.h"
  22 #include "llvm/Support/FormattedStream.h"
  23 #include "llvm/Support/TargetRegistry.h"
  24 #include "llvm/Target/TargetOptions.h"
  25
  26 using namespace llvm;
  27
  28 namespace llvm {
  29 void initializeLanaiMemAluCombinerPass(PassRegistry &);
  30 } // namespace llvm
  31
  32 extern "C" void LLVMInitializeLanaiTarget() {
  33   // Register the target.
  34   RegisterTargetMachine<LanaiTargetMachine> registered_target(
  35       getTheLanaiTarget());
  36 }
  37
  38 static std::string computeDataLayout() {
  39   // Data layout (keep in sync with clang/lib/Basic/Targets.cpp)
  40   return "E"        // Big endian
  41          "-m:e"     // ELF name manging
  42          "-p:32:32" // 32-bit pointers, 32 bit aligned
  43          "-i64:64"  // 64 bit integers, 64 bit aligned
  44          "-a:0:32"  // 32 bit alignment of objects of aggregate type
  45          "-n32"     // 32 bit native integer width
  46          "-S64";    // 64 bit natural stack alignment
  47 }
  48
  49 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
  50   if (!RM.hasValue())
  51     return Reloc::PIC_;
  52   return *RM;
  53 }
  54
  55 LanaiTargetMachine::LanaiTargetMachine(const Target &T, const Triple &TT,
  56                                        StringRef Cpu, StringRef FeatureString,
  57                                        const TargetOptions &Options,
  58                                        Optional<Reloc::Model> RM,
  59                                        Optional<CodeModel::Model> CodeModel,
  60                                        CodeGenOpt::Level OptLevel, bool JIT)
  61     : LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options,
  62                         getEffectiveRelocModel(RM),
  63                         getEffectiveCodeModel(CodeModel, CodeModel::Medium),
  64                         OptLevel),
  65       Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(),
  66                 OptLevel),
  67       TLOF(new LanaiTargetObjectFile()) {
  68   initAsmInfo();
  69 }
  70
  71 TargetTransformInfo
  72 LanaiTargetMachine::getTargetTransformInfo(const Function &F) {
  73   return TargetTransformInfo(LanaiTTIImpl(this, F));
  74 }
  75
  76 namespace {
  77 // Lanai Code Generator Pass Configuration Options.
  78 class LanaiPassConfig : public TargetPassConfig {
  79 public:
  80   LanaiPassConfig(LanaiTargetMachine &TM, PassManagerBase *PassManager)
  81       : TargetPassConfig(TM, *PassManager) {}
  82
  83   LanaiTargetMachine &getLanaiTargetMachine() const {
  84     return getTM<LanaiTargetMachine>();
  85   }
  86
  87   bool addInstSelector() override;
  88   void addPreSched2() override;
  89   void addPreEmitPass() override;
  90 };
  91 } // namespace
  92
  93 TargetPassConfig *
  94 LanaiTargetMachine::createPassConfig(PassManagerBase &PassManager) {
  95   return new LanaiPassConfig(*this, &PassManager);
  96 }
  97
  98 // Install an instruction selector pass.
  99 bool LanaiPassConfig::addInstSelector() {
 100   addPass(createLanaiISelDag(getLanaiTargetMachine()));
 101   return false;
 102 }
 103
 104 // Implemented by targets that want to run passes immediately before
 105 // machine code is emitted.
 106 void LanaiPassConfig::addPreEmitPass() {
 107   addPass(createLanaiDelaySlotFillerPass(getLanaiTargetMachine()));
 108 }
 109
 110 // Run passes after prolog-epilog insertion and before the second instruction
 111 // scheduling pass.
 112 void LanaiPassConfig::addPreSched2() {
 113   addPass(createLanaiMemAluCombinerPass());
 114 }