lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp

   1 //===---- MipsABIInfo.cpp - Information about MIPS ABI's ------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #include "MipsABIInfo.h"
  10 #include "MipsRegisterInfo.h"
  11 #include "llvm/ADT/StringRef.h"
  12 #include "llvm/ADT/StringSwitch.h"
  13 #include "llvm/MC/MCTargetOptions.h"
  14
  15 using namespace llvm;
  16
  17 // Note: this option is defined here to be visible from libLLVMMipsAsmParser
  18 //       and libLLVMMipsCodeGen
  19 cl::opt<bool>
  20 EmitJalrReloc("mips-jalr-reloc", cl::Hidden,
  21               cl::desc("MIPS: Emit R_{MICRO}MIPS_JALR relocation with jalr"),
  22               cl::init(true));
  23
  24 namespace {
  25 static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3};
  26
  27 static const MCPhysReg Mips64IntRegs[8] = {
  28     Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
  29     Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64};
  30 }
  31
  32 ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const {
  33   if (IsO32())
  34     return makeArrayRef(O32IntRegs);
  35   if (IsN32() || IsN64())
  36     return makeArrayRef(Mips64IntRegs);
  37   llvm_unreachable("Unhandled ABI");
  38 }
  39
  40 ArrayRef<MCPhysReg> MipsABIInfo::GetVarArgRegs() const {
  41   if (IsO32())
  42     return makeArrayRef(O32IntRegs);
  43   if (IsN32() || IsN64())
  44     return makeArrayRef(Mips64IntRegs);
  45   llvm_unreachable("Unhandled ABI");
  46 }
  47
  48 unsigned MipsABIInfo::GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const {
  49   if (IsO32())
  50     return CC != CallingConv::Fast ? 16 : 0;
  51   if (IsN32() || IsN64())
  52     return 0;
  53   llvm_unreachable("Unhandled ABI");
  54 }
  55
  56 MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU,
  57                                           const MCTargetOptions &Options) {
  58   if (Options.getABIName().startswith("o32"))
  59     return MipsABIInfo::O32();
  60   if (Options.getABIName().startswith("n32"))
  61     return MipsABIInfo::N32();
  62   if (Options.getABIName().startswith("n64"))
  63     return MipsABIInfo::N64();
  64   if (TT.getEnvironment() == llvm::Triple::GNUABIN32)
  65     return MipsABIInfo::N32();
  66   assert(Options.getABIName().empty() && "Unknown ABI option for MIPS");
  67
  68   if (TT.isMIPS64())
  69     return MipsABIInfo::N64();
  70   return MipsABIInfo::O32();
  71 }
  72
  73 unsigned MipsABIInfo::GetStackPtr() const {
  74   return ArePtrs64bit() ? Mips::SP_64 : Mips::SP;
  75 }
  76
  77 unsigned MipsABIInfo::GetFramePtr() const {
  78   return ArePtrs64bit() ? Mips::FP_64 : Mips::FP;
  79 }
  80
  81 unsigned MipsABIInfo::GetBasePtr() const {
  82   return ArePtrs64bit() ? Mips::S7_64 : Mips::S7;
  83 }
  84
  85 unsigned MipsABIInfo::GetGlobalPtr() const {
  86   return ArePtrs64bit() ? Mips::GP_64 : Mips::GP;
  87 }
  88
  89 unsigned MipsABIInfo::GetNullPtr() const {
  90   return ArePtrs64bit() ? Mips::ZERO_64 : Mips::ZERO;
  91 }
  92
  93 unsigned MipsABIInfo::GetZeroReg() const {
  94   return AreGprs64bit() ? Mips::ZERO_64 : Mips::ZERO;
  95 }
  96
  97 unsigned MipsABIInfo::GetPtrAdduOp() const {
  98   return ArePtrs64bit() ? Mips::DADDu : Mips::ADDu;
  99 }
 100
 101 unsigned MipsABIInfo::GetPtrAddiuOp() const {
 102   return ArePtrs64bit() ? Mips::DADDiu : Mips::ADDiu;
 103 }
 104
 105 unsigned MipsABIInfo::GetPtrSubuOp() const {
 106   return ArePtrs64bit() ? Mips::DSUBu : Mips::SUBu;
 107 }
 108
 109 unsigned MipsABIInfo::GetPtrAndOp() const {
 110   return ArePtrs64bit() ? Mips::AND64 : Mips::AND;
 111 }
 112
 113 unsigned MipsABIInfo::GetGPRMoveOp() const {
 114   return ArePtrs64bit() ? Mips::OR64 : Mips::OR;
 115 }
 116
 117 unsigned MipsABIInfo::GetEhDataReg(unsigned I) const {
 118   static const unsigned EhDataReg[] = {
 119     Mips::A0, Mips::A1, Mips::A2, Mips::A3
 120   };
 121   static const unsigned EhDataReg64[] = {
 122     Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64
 123   };
 124
 125   return IsN64() ? EhDataReg64[I] : EhDataReg[I];
 126 }
 127