Revert r354244 "[DAGCombiner] Eliminate dead stores to stack."
[llvm-complete.git] / lib / Target / Mips / MipsISelDAGToDAG.cpp
blob9ba54d6bb73ca708f23b2bdf04a9d23f5d6e91b5
1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines an instruction selector for the MIPS target.
11 //===----------------------------------------------------------------------===//
13 #include "MipsISelDAGToDAG.h"
14 #include "MCTargetDesc/MipsBaseInfo.h"
15 #include "Mips.h"
16 #include "Mips16ISelDAGToDAG.h"
17 #include "MipsMachineFunction.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsSEISelDAGToDAG.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineFrameInfo.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/CodeGen/SelectionDAGNodes.h"
26 #include "llvm/CodeGen/StackProtector.h"
27 #include "llvm/IR/CFG.h"
28 #include "llvm/IR/GlobalValue.h"
29 #include "llvm/IR/Instructions.h"
30 #include "llvm/IR/Intrinsics.h"
31 #include "llvm/IR/Type.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/Target/TargetMachine.h"
36 using namespace llvm;
38 #define DEBUG_TYPE "mips-isel"
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
44 //===----------------------------------------------------------------------===//
45 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
49 void MipsDAGToDAGISel::getAnalysisUsage(AnalysisUsage &AU) const {
50 // There are multiple MipsDAGToDAGISel instances added to the pass pipeline.
51 // We need to preserve StackProtector for the next one.
52 AU.addPreserved<StackProtector>();
53 SelectionDAGISel::getAnalysisUsage(AU);
56 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
57 Subtarget = &static_cast<const MipsSubtarget &>(MF.getSubtarget());
58 bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
60 processFunctionAfterISel(MF);
62 return Ret;
65 /// getGlobalBaseReg - Output the instructions required to put the
66 /// GOT address into a register.
67 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
68 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
69 return CurDAG->getRegister(GlobalBaseReg, getTargetLowering()->getPointerTy(
70 CurDAG->getDataLayout()))
71 .getNode();
74 /// ComplexPattern used on MipsInstrInfo
75 /// Used on Mips Load/Store instructions
76 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base,
77 SDValue &Offset) const {
78 llvm_unreachable("Unimplemented function.");
79 return false;
82 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base,
83 SDValue &Offset) const {
84 llvm_unreachable("Unimplemented function.");
85 return false;
88 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base,
89 SDValue &Offset) const {
90 llvm_unreachable("Unimplemented function.");
91 return false;
94 bool MipsDAGToDAGISel::selectIntAddr11MM(SDValue Addr, SDValue &Base,
95 SDValue &Offset) const {
96 llvm_unreachable("Unimplemented function.");
97 return false;
100 bool MipsDAGToDAGISel::selectIntAddr12MM(SDValue Addr, SDValue &Base,
101 SDValue &Offset) const {
102 llvm_unreachable("Unimplemented function.");
103 return false;
106 bool MipsDAGToDAGISel::selectIntAddr16MM(SDValue Addr, SDValue &Base,
107 SDValue &Offset) const {
108 llvm_unreachable("Unimplemented function.");
109 return false;
112 bool MipsDAGToDAGISel::selectIntAddrLSL2MM(SDValue Addr, SDValue &Base,
113 SDValue &Offset) const {
114 llvm_unreachable("Unimplemented function.");
115 return false;
118 bool MipsDAGToDAGISel::selectIntAddrSImm10(SDValue Addr, SDValue &Base,
119 SDValue &Offset) const {
120 llvm_unreachable("Unimplemented function.");
121 return false;
124 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl1(SDValue Addr, SDValue &Base,
125 SDValue &Offset) const {
126 llvm_unreachable("Unimplemented function.");
127 return false;
130 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl2(SDValue Addr, SDValue &Base,
131 SDValue &Offset) const {
132 llvm_unreachable("Unimplemented function.");
133 return false;
136 bool MipsDAGToDAGISel::selectIntAddrSImm10Lsl3(SDValue Addr, SDValue &Base,
137 SDValue &Offset) const {
138 llvm_unreachable("Unimplemented function.");
139 return false;
142 bool MipsDAGToDAGISel::selectAddr16(SDValue Addr, SDValue &Base,
143 SDValue &Offset) {
144 llvm_unreachable("Unimplemented function.");
145 return false;
148 bool MipsDAGToDAGISel::selectAddr16SP(SDValue Addr, SDValue &Base,
149 SDValue &Offset) {
150 llvm_unreachable("Unimplemented function.");
151 return false;
154 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm,
155 unsigned MinSizeInBits) const {
156 llvm_unreachable("Unimplemented function.");
157 return false;
160 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const {
161 llvm_unreachable("Unimplemented function.");
162 return false;
165 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const {
166 llvm_unreachable("Unimplemented function.");
167 return false;
170 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const {
171 llvm_unreachable("Unimplemented function.");
172 return false;
175 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const {
176 llvm_unreachable("Unimplemented function.");
177 return false;
180 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const {
181 llvm_unreachable("Unimplemented function.");
182 return false;
185 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const {
186 llvm_unreachable("Unimplemented function.");
187 return false;
190 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const {
191 llvm_unreachable("Unimplemented function.");
192 return false;
195 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const {
196 llvm_unreachable("Unimplemented function.");
197 return false;
200 bool MipsDAGToDAGISel::selectVSplatUimmPow2(SDValue N, SDValue &Imm) const {
201 llvm_unreachable("Unimplemented function.");
202 return false;
205 bool MipsDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const {
206 llvm_unreachable("Unimplemented function.");
207 return false;
210 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const {
211 llvm_unreachable("Unimplemented function.");
212 return false;
215 bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const {
216 llvm_unreachable("Unimplemented function.");
217 return false;
220 /// Select instructions not customized! Used for
221 /// expanded, promoted and normal instructions
222 void MipsDAGToDAGISel::Select(SDNode *Node) {
223 unsigned Opcode = Node->getOpcode();
225 // If we have a custom node, we already have selected!
226 if (Node->isMachineOpcode()) {
227 LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
228 Node->setNodeId(-1);
229 return;
232 // See if subclasses can handle this node.
233 if (trySelect(Node))
234 return;
236 switch(Opcode) {
237 default: break;
239 // Get target GOT address.
240 case ISD::GLOBAL_OFFSET_TABLE:
241 ReplaceNode(Node, getGlobalBaseReg());
242 return;
244 #ifndef NDEBUG
245 case ISD::LOAD:
246 case ISD::STORE:
247 assert((Subtarget->systemSupportsUnalignedAccess() ||
248 cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <=
249 cast<MemSDNode>(Node)->getAlignment()) &&
250 "Unexpected unaligned loads/stores.");
251 break;
252 #endif
255 // Select the default instruction
256 SelectCode(Node);
259 bool MipsDAGToDAGISel::
260 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
261 std::vector<SDValue> &OutOps) {
262 // All memory constraints can at least accept raw pointers.
263 switch(ConstraintID) {
264 default:
265 llvm_unreachable("Unexpected asm memory constraint");
266 case InlineAsm::Constraint_i:
267 case InlineAsm::Constraint_m:
268 case InlineAsm::Constraint_R:
269 case InlineAsm::Constraint_ZC:
270 OutOps.push_back(Op);
271 return false;
273 return true;