lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp

   1 //- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 ///
   9 /// \file
  10 /// This file defines an instruction selector for the WebAssembly target.
  11 ///
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
  15 #include "WebAssembly.h"
  16 #include "WebAssemblyTargetMachine.h"
  17 #include "llvm/CodeGen/SelectionDAGISel.h"
  18 #include "llvm/IR/Function.h" // To access function attributes.
  19 #include "llvm/Support/Debug.h"
  20 #include "llvm/Support/KnownBits.h"
  21 #include "llvm/Support/MathExtras.h"
  22 #include "llvm/Support/raw_ostream.h"
  23 using namespace llvm;
  24
  25 #define DEBUG_TYPE "wasm-isel"
  26
  27 //===--------------------------------------------------------------------===//
  28 /// WebAssembly-specific code to select WebAssembly machine instructions for
  29 /// SelectionDAG operations.
  30 ///
  31 namespace {
  32 class WebAssemblyDAGToDAGISel final : public SelectionDAGISel {
  33   /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
  34   /// right decision when generating code for different targets.
  35   const WebAssemblySubtarget *Subtarget;
  36
  37   bool ForCodeSize;
  38
  39 public:
  40   WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &TM,
  41                           CodeGenOpt::Level OptLevel)
  42       : SelectionDAGISel(TM, OptLevel), Subtarget(nullptr), ForCodeSize(false) {
  43   }
  44
  45   StringRef getPassName() const override {
  46     return "WebAssembly Instruction Selection";
  47   }
  48
  49   bool runOnMachineFunction(MachineFunction &MF) override {
  50     LLVM_DEBUG(dbgs() << "********** ISelDAGToDAG **********\n"
  51                          "********** Function: "
  52                       << MF.getName() << '\n');
  53
  54     ForCodeSize = MF.getFunction().hasFnAttribute(Attribute::OptimizeForSize) ||
  55                   MF.getFunction().hasFnAttribute(Attribute::MinSize);
  56     Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
  57     return SelectionDAGISel::runOnMachineFunction(MF);
  58   }
  59
  60   void Select(SDNode *Node) override;
  61
  62   bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
  63                                     std::vector<SDValue> &OutOps) override;
  64
  65 // Include the pieces autogenerated from the target description.
  66 #include "WebAssemblyGenDAGISel.inc"
  67
  68 private:
  69   // add select functions here...
  70 };
  71 } // end anonymous namespace
  72
  73 void WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
  74   // If we have a custom node, we already have selected!
  75   if (Node->isMachineOpcode()) {
  76     LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
  77     Node->setNodeId(-1);
  78     return;
  79   }
  80
  81   // Few custom selection stuff. If we need WebAssembly-specific selection,
  82   // uncomment this block add corresponding case statements.
  83   /*
  84   switch (Node->getOpcode()) {
  85   default:
  86     break;
  87   }
  88   */
  89
  90   // Select the default instruction.
  91   SelectCode(Node);
  92 }
  93
  94 bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand(
  95     const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
  96   switch (ConstraintID) {
  97   case InlineAsm::Constraint_i:
  98   case InlineAsm::Constraint_m:
  99     // We just support simple memory operands that just have a single address
 100     // operand and need no special handling.
 101     OutOps.push_back(Op);
 102     return false;
 103   default:
 104     break;
 105   }
 106
 107   return true;
 108 }
 109
 110 /// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready
 111 /// for instruction scheduling.
 112 FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
 113                                              CodeGenOpt::Level OptLevel) {
 114   return new WebAssemblyDAGToDAGISel(TM, OptLevel);
 115 }