1 //===-- X86TargetTransformInfo.h - X86 specific TTI -------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 /// This file a TargetTransformInfo::Concept conforming object specific to the
10 /// X86 target machine. It uses the target's detailed information to
11 /// provide more precise answers to certain TTI queries, while letting the
12 /// target independent and default TTI implementations handle the rest.
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H
17 #define LLVM_LIB_TARGET_X86_X86TARGETTRANSFORMINFO_H
20 #include "X86TargetMachine.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/CodeGen/BasicTTIImpl.h"
23 #include "llvm/CodeGen/TargetLowering.h"
27 class X86TTIImpl
: public BasicTTIImplBase
<X86TTIImpl
> {
28 typedef BasicTTIImplBase
<X86TTIImpl
> BaseT
;
29 typedef TargetTransformInfo TTI
;
32 const X86Subtarget
*ST
;
33 const X86TargetLowering
*TLI
;
35 const X86Subtarget
*getST() const { return ST
; }
36 const X86TargetLowering
*getTLI() const { return TLI
; }
39 explicit X86TTIImpl(const X86TargetMachine
*TM
, const Function
&F
)
40 : BaseT(TM
, F
.getParent()->getDataLayout()), ST(TM
->getSubtargetImpl(F
)),
41 TLI(ST
->getTargetLowering()) {}
43 /// \name Scalar TTI Implementations
45 TTI::PopcntSupportKind
getPopcntSupport(unsigned TyWidth
);
49 /// \name Cache TTI Implementation
51 llvm::Optional
<unsigned> getCacheSize(
52 TargetTransformInfo::CacheLevel Level
) const;
53 llvm::Optional
<unsigned> getCacheAssociativity(
54 TargetTransformInfo::CacheLevel Level
) const;
57 /// \name Vector TTI Implementations
60 unsigned getNumberOfRegisters(bool Vector
);
61 unsigned getRegisterBitWidth(bool Vector
) const;
62 unsigned getMinVectorRegisterBitWidth() const;
63 unsigned getLoadStoreVecRegBitWidth(unsigned AS
) const;
64 unsigned getMaxInterleaveFactor(unsigned VF
);
65 int getArithmeticInstrCost(
66 unsigned Opcode
, Type
*Ty
,
67 TTI::OperandValueKind Opd1Info
= TTI::OK_AnyValue
,
68 TTI::OperandValueKind Opd2Info
= TTI::OK_AnyValue
,
69 TTI::OperandValueProperties Opd1PropInfo
= TTI::OP_None
,
70 TTI::OperandValueProperties Opd2PropInfo
= TTI::OP_None
,
71 ArrayRef
<const Value
*> Args
= ArrayRef
<const Value
*>());
72 int getShuffleCost(TTI::ShuffleKind Kind
, Type
*Tp
, int Index
, Type
*SubTp
);
73 int getCastInstrCost(unsigned Opcode
, Type
*Dst
, Type
*Src
,
74 const Instruction
*I
= nullptr);
75 int getCmpSelInstrCost(unsigned Opcode
, Type
*ValTy
, Type
*CondTy
,
76 const Instruction
*I
= nullptr);
77 int getVectorInstrCost(unsigned Opcode
, Type
*Val
, unsigned Index
);
78 int getMemoryOpCost(unsigned Opcode
, Type
*Src
, unsigned Alignment
,
79 unsigned AddressSpace
, const Instruction
*I
= nullptr);
80 int getMaskedMemoryOpCost(unsigned Opcode
, Type
*Src
, unsigned Alignment
,
81 unsigned AddressSpace
);
82 int getGatherScatterOpCost(unsigned Opcode
, Type
*DataTy
, Value
*Ptr
,
83 bool VariableMask
, unsigned Alignment
);
84 int getAddressComputationCost(Type
*PtrTy
, ScalarEvolution
*SE
,
87 unsigned getAtomicMemIntrinsicMaxElementSize() const;
89 int getIntrinsicInstrCost(Intrinsic::ID IID
, Type
*RetTy
,
90 ArrayRef
<Type
*> Tys
, FastMathFlags FMF
,
91 unsigned ScalarizationCostPassed
= UINT_MAX
);
92 int getIntrinsicInstrCost(Intrinsic::ID IID
, Type
*RetTy
,
93 ArrayRef
<Value
*> Args
, FastMathFlags FMF
,
96 int getArithmeticReductionCost(unsigned Opcode
, Type
*Ty
,
99 int getMinMaxReductionCost(Type
*Ty
, Type
*CondTy
, bool IsPairwiseForm
,
102 int getInterleavedMemoryOpCost(unsigned Opcode
, Type
*VecTy
,
103 unsigned Factor
, ArrayRef
<unsigned> Indices
,
104 unsigned Alignment
, unsigned AddressSpace
,
105 bool UseMaskForCond
= false,
106 bool UseMaskForGaps
= false);
107 int getInterleavedMemoryOpCostAVX512(unsigned Opcode
, Type
*VecTy
,
108 unsigned Factor
, ArrayRef
<unsigned> Indices
,
109 unsigned Alignment
, unsigned AddressSpace
,
110 bool UseMaskForCond
= false,
111 bool UseMaskForGaps
= false);
112 int getInterleavedMemoryOpCostAVX2(unsigned Opcode
, Type
*VecTy
,
113 unsigned Factor
, ArrayRef
<unsigned> Indices
,
114 unsigned Alignment
, unsigned AddressSpace
,
115 bool UseMaskForCond
= false,
116 bool UseMaskForGaps
= false);
118 int getIntImmCost(int64_t);
120 int getIntImmCost(const APInt
&Imm
, Type
*Ty
);
122 unsigned getUserCost(const User
*U
, ArrayRef
<const Value
*> Operands
);
124 int getIntImmCost(unsigned Opcode
, unsigned Idx
, const APInt
&Imm
, Type
*Ty
);
125 int getIntImmCost(Intrinsic::ID IID
, unsigned Idx
, const APInt
&Imm
,
127 bool isLSRCostLess(TargetTransformInfo::LSRCost
&C1
,
128 TargetTransformInfo::LSRCost
&C2
);
129 bool canMacroFuseCmp();
130 bool isLegalMaskedLoad(Type
*DataType
);
131 bool isLegalMaskedStore(Type
*DataType
);
132 bool isLegalMaskedGather(Type
*DataType
);
133 bool isLegalMaskedScatter(Type
*DataType
);
134 bool hasDivRemOp(Type
*DataType
, bool IsSigned
);
135 bool isFCmpOrdCheaperThanFCmpZero(Type
*Ty
);
136 bool areInlineCompatible(const Function
*Caller
,
137 const Function
*Callee
) const;
138 const TTI::MemCmpExpansionOptions
*enableMemCmpExpansion(
139 bool IsZeroCmp
) const;
140 bool enableInterleavedAccessVectorization();
142 int getGSScalarCost(unsigned Opcode
, Type
*DataTy
, bool VariableMask
,
143 unsigned Alignment
, unsigned AddressSpace
);
144 int getGSVectorCost(unsigned Opcode
, Type
*DataTy
, Value
*Ptr
,
145 unsigned Alignment
, unsigned AddressSpace
);
150 } // end namespace llvm