1 ; RUN: llc -verify-machineinstrs -mtriple=arm64-linux-gnu -pre-RA-sched=linearize -enable-misched=false -disable-post-ra < %s | FileCheck %s
3 %va_list = type {i8*, i8*, i8*, i32, i32}
5 @var = global %va_list zeroinitializer, align 8
7 declare void @llvm.va_start(i8*)
9 define void @test_simple(i32 %n, ...) {
10 ; CHECK-LABEL: test_simple:
11 ; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]]
12 ; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #[[STACKSIZE]]
14 ; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var
15 ; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var
17 ; CHECK: stp x1, x2, [sp, #[[GR_BASE:[0-9]+]]]
18 ; ... omit middle ones ...
19 ; CHECK: str x7, [sp, #
21 ; CHECK: stp q0, q1, [sp]
22 ; ... omit middle ones ...
23 ; CHECK: stp q6, q7, [sp, #
25 ; CHECK: str [[STACK_TOP]], [x[[VA_LIST]]]
27 ; CHECK: add [[GR_TOPTMP:x[0-9]+]], sp, #[[GR_BASE]]
28 ; CHECK: add [[GR_TOP:x[0-9]+]], [[GR_TOPTMP]], #56
29 ; CHECK: str [[GR_TOP]], [x[[VA_LIST]], #8]
31 ; CHECK: mov [[VR_TOPTMP:x[0-9]+]], sp
32 ; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #128
33 ; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16]
35 ; CHECK: mov [[GRVR:x[0-9]+]], #-56
36 ; CHECK: movk [[GRVR]], #65408, lsl #32
37 ; CHECK: str [[GRVR]], [x[[VA_LIST]], #24]
39 %addr = bitcast %va_list* @var to i8*
40 call void @llvm.va_start(i8* %addr)
45 define void @test_fewargs(i32 %n, i32 %n1, i32 %n2, float %m, ...) {
46 ; CHECK-LABEL: test_fewargs:
47 ; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]]
48 ; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #[[STACKSIZE]]
50 ; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var
51 ; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var
53 ; CHECK: stp x3, x4, [sp, #[[GR_BASE:[0-9]+]]]
54 ; ... omit middle ones ...
55 ; CHECK: str x7, [sp, #
57 ; CHECK: stp q1, q2, [sp]
58 ; ... omit middle ones ...
59 ; CHECK: str q7, [sp, #
61 ; CHECK: str [[STACK_TOP]], [x[[VA_LIST]]]
63 ; CHECK: add [[GR_TOPTMP:x[0-9]+]], sp, #[[GR_BASE]]
64 ; CHECK: add [[GR_TOP:x[0-9]+]], [[GR_TOPTMP]], #40
65 ; CHECK: str [[GR_TOP]], [x[[VA_LIST]], #8]
67 ; CHECK: mov [[VR_TOPTMP:x[0-9]+]], sp
68 ; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #112
69 ; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16]
71 ; CHECK: mov [[GRVR_OFFS:x[0-9]+]], #-40
72 ; CHECK: movk [[GRVR_OFFS]], #65424, lsl #32
73 ; CHECK: str [[GRVR_OFFS]], [x[[VA_LIST]], #24]
75 %addr = bitcast %va_list* @var to i8*
76 call void @llvm.va_start(i8* %addr)
81 define void @test_nospare([8 x i64], [8 x float], ...) {
82 ; CHECK-LABEL: test_nospare:
84 %addr = bitcast %va_list* @var to i8*
85 call void @llvm.va_start(i8* %addr)
86 ; CHECK-NOT: sub sp, sp
87 ; CHECK: mov [[STACK:x[0-9]+]], sp
88 ; CHECK: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var
89 ; CHECK: str [[STACK]], [x[[VAR]]]
94 ; If there are non-variadic arguments on the stack (here two i64s) then the
95 ; __stack field should point just past them.
96 define void @test_offsetstack([8 x i64], [2 x i64], [3 x float], ...) {
97 ; CHECK-LABEL: test_offsetstack:
98 ; CHECK: stp {{q[0-9]+}}, {{q[0-9]+}}, [sp, #-80]!
99 ; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #96
100 ; CHECK: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var
101 ; CHECK: str [[STACK_TOP]], [x[[VAR]]]
103 %addr = bitcast %va_list* @var to i8*
104 call void @llvm.va_start(i8* %addr)
108 declare void @llvm.va_end(i8*)
110 define void @test_va_end() nounwind {
111 ; CHECK-LABEL: test_va_end:
114 %addr = bitcast %va_list* @var to i8*
115 call void @llvm.va_end(i8* %addr)
121 declare void @llvm.va_copy(i8* %dest, i8* %src)
123 @second_list = global %va_list zeroinitializer
125 define void @test_va_copy() {
126 ; CHECK-LABEL: test_va_copy:
127 %srcaddr = bitcast %va_list* @var to i8*
128 %dstaddr = bitcast %va_list* @second_list to i8*
129 call void @llvm.va_copy(i8* %dstaddr, i8* %srcaddr)
131 ; CHECK: add x[[SRC:[0-9]+]], {{x[0-9]+}}, :lo12:var
133 ; CHECK: ldp [[BLOCK:q[0-9]+]], [[BLOCK:q[0-9]+]], [x[[SRC]]]
134 ; CHECK: add x[[DST:[0-9]+]], {{x[0-9]+}}, :lo12:second_list
135 ; CHECK: stp [[BLOCK:q[0-9]+]], [[BLOCK:q[0-9]+]], [x[[DST]]]