test/CodeGen/PowerPC/vec_add_sub_quadword.ll

   1 ; Check VMX 128-bit integer operations
   2 ;
   3 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
   4 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s
   5
   6 define <1 x i128> @out_of_bounds_insertelement(<1 x i128> %x, i128 %val) nounwind {
   7        %tmpvec = insertelement <1 x i128> <i128 0>, i128 %val, i32 1
   8        %result = add <1 x i128> %x, %tmpvec
   9        ret <1 x i128> %result
  10 ; CHECK-LABEL: @out_of_bounds_insertelement
  11 ; CHECK: # %bb.0:
  12 ; CHECK-NEXT: blr
  13 }
  14
  15 define <1 x i128> @test_add(<1 x i128> %x, <1 x i128> %y) nounwind {
  16        %result = add <1 x i128> %x, %y
  17        ret <1 x i128> %result
  18 ; CHECK-LABEL: @test_add
  19 ; CHECK: vadduqm 2, 2, 3
  20 }
  21
  22 define <1 x i128> @increment_by_one(<1 x i128> %x) nounwind {
  23        %result = add <1 x i128> %x, <i128 1>
  24        ret <1 x i128> %result
  25 ; CHECK-LABEL: @increment_by_one
  26 ; CHECK: vadduqm 2, 2, 3
  27 }
  28
  29 define <1 x i128> @increment_by_val(<1 x i128> %x, i128 %val) nounwind {
  30        %tmpvec = insertelement <1 x i128> <i128 0>, i128 %val, i32 0
  31        %result = add <1 x i128> %x, %tmpvec
  32        ret <1 x i128> %result
  33 ; CHECK-LABEL: @increment_by_val
  34 ; CHECK: vadduqm 2, 2, 3
  35 }
  36
  37 define <1 x i128> @test_sub(<1 x i128> %x, <1 x i128> %y) nounwind {
  38        %result = sub <1 x i128> %x, %y
  39        ret <1 x i128> %result
  40 ; CHECK-LABEL: @test_sub
  41 ; CHECK: vsubuqm 2, 2, 3
  42 }
  43
  44 define <1 x i128> @decrement_by_one(<1 x i128> %x) nounwind {
  45        %result = sub <1 x i128> %x, <i128 1>
  46        ret <1 x i128> %result
  47 ; CHECK-LABEL: @decrement_by_one
  48 ; CHECK: vsubuqm 2, 2, 3
  49 }
  50
  51 define <1 x i128> @decrement_by_val(<1 x i128> %x, i128 %val) nounwind {
  52        %tmpvec = insertelement <1 x i128> <i128 0>, i128 %val, i32 0
  53        %result = sub <1 x i128> %x, %tmpvec
  54        ret <1 x i128> %result
  55 ; CHECK-LABEL: @decrement_by_val
  56 ; CHECK: vsubuqm 2, 2, 3
  57 }
  58
  59 declare <1 x i128> @llvm.ppc.altivec.vaddeuqm(<1 x i128> %x,
  60                                               <1 x i128> %y,
  61                                               <1 x i128> %z) nounwind readnone
  62 declare <1 x i128> @llvm.ppc.altivec.vaddcuq(<1 x i128> %x,
  63                                              <1 x i128> %y) nounwind readnone
  64 declare <1 x i128> @llvm.ppc.altivec.vaddecuq(<1 x i128> %x,
  65                                               <1 x i128> %y,
  66                                               <1 x i128> %z) nounwind readnone
  67 declare <1 x i128> @llvm.ppc.altivec.vsubeuqm(<1 x i128> %x,
  68                                               <1 x i128> %y,
  69                                               <1 x i128> %z) nounwind readnone
  70 declare <1 x i128> @llvm.ppc.altivec.vsubcuq(<1 x i128> %x,
  71                                              <1 x i128> %y) nounwind readnone
  72 declare <1 x i128> @llvm.ppc.altivec.vsubecuq(<1 x i128> %x,
  73                                               <1 x i128> %y,
  74                                               <1 x i128> %z) nounwind readnone
  75
  76 define <1 x i128> @test_vaddeuqm(<1 x i128> %x,
  77                                  <1 x i128> %y,
  78                                  <1 x i128> %z) nounwind {
  79   %tmp = tail call <1 x i128> @llvm.ppc.altivec.vaddeuqm(<1 x i128> %x,
  80                                                          <1 x i128> %y,
  81                                                          <1 x i128> %z)
  82   ret <1 x i128> %tmp
  83 ; CHECK-LABEL: @test_vaddeuqm
  84 ; CHECK: vaddeuqm 2, 2, 3, 4
  85 }
  86
  87 define <1 x i128> @test_vaddcuq(<1 x i128> %x,
  88                                 <1 x i128> %y) nounwind {
  89   %tmp = tail call <1 x i128> @llvm.ppc.altivec.vaddcuq(<1 x i128> %x,
  90                                                         <1 x i128> %y)
  91   ret <1 x i128> %tmp
  92 ; CHECK-LABEL: @test_vaddcuq
  93 ; CHECK: vaddcuq 2, 2, 3
  94 }
  95
  96 define <1 x i128> @test_vaddecuq(<1 x i128> %x,
  97                                  <1 x i128> %y,
  98                                  <1 x i128> %z) nounwind {
  99   %tmp = tail call <1 x i128> @llvm.ppc.altivec.vaddecuq(<1 x i128> %x,
 100                                                          <1 x i128> %y,
 101                                                          <1 x i128> %z)
 102   ret <1 x i128> %tmp
 103 ; CHECK-LABEL: @test_vaddecuq
 104 ; CHECK: vaddecuq 2, 2, 3, 4
 105 }
 106
 107 define <1 x i128> @test_vsubeuqm(<1 x i128> %x,
 108                                  <1 x i128> %y,
 109                                  <1 x i128> %z) nounwind {
 110   %tmp = tail call <1 x i128> @llvm.ppc.altivec.vsubeuqm(<1 x i128> %x,
 111                                                          <1 x i128> %y,
 112                                                          <1 x i128> %z)
 113   ret <1 x i128> %tmp
 114 ; CHECK-LABEL: test_vsubeuqm
 115 ; CHECK: vsubeuqm 2, 2, 3, 4
 116 }
 117
 118 define <1 x i128> @test_vsubcuq(<1 x i128> %x,
 119                                 <1 x i128> %y) nounwind {
 120   %tmp = tail call <1 x i128> @llvm.ppc.altivec.vsubcuq(<1 x i128> %x,
 121                                                         <1 x i128> %y)
 122   ret <1 x i128> %tmp
 123 ; CHECK-LABEL: test_vsubcuq
 124 ; CHECK: vsubcuq 2, 2, 3
 125 }
 126
 127 define <1 x i128> @test_vsubecuq(<1 x i128> %x,
 128                                  <1 x i128> %y,
 129                                  <1 x i128> %z) nounwind {
 130   %tmp = tail call <1 x i128> @llvm.ppc.altivec.vsubecuq(<1 x i128> %x,
 131                                                          <1 x i128> %y,
 132                                                          <1 x i128> %z)
 133   ret <1 x i128> %tmp
 134 ; CHECK-LABEL: test_vsubecuq
 135 ; CHECK: vsubecuq 2, 2, 3, 4
 136 }
 137