1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck -check-prefix=RV32I %s
4 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
5 ; RUN: | FileCheck -check-prefix=RV64I %s
7 @gi = external global i32
9 define i32 @constraint_r(i32 %a) {
10 ; RV32I-LABEL: constraint_r:
12 ; RV32I-NEXT: lui a1, %hi(gi)
13 ; RV32I-NEXT: lw a1, %lo(gi)(a1)
15 ; RV32I-NEXT: add a0, a0, a1
19 ; RV64I-LABEL: constraint_r:
21 ; RV64I-NEXT: lui a1, %hi(gi)
22 ; RV64I-NEXT: lwu a1, %lo(gi)(a1)
24 ; RV64I-NEXT: add a0, a0, a1
27 %1 = load i32, i32* @gi
28 %2 = tail call i32 asm "add $0, $1, $2", "=r,r,r"(i32 %a, i32 %1)
32 define i32 @constraint_i(i32 %a) {
33 ; RV32I-LABEL: constraint_i:
36 ; RV32I-NEXT: addi a0, a0, 113
40 ; RV64I-LABEL: constraint_i:
43 ; RV64I-NEXT: addi a0, a0, 113
46 %1 = load i32, i32* @gi
47 %2 = tail call i32 asm "addi $0, $1, $2", "=r,r,i"(i32 %a, i32 113)
51 define void @constraint_m(i32* %a) {
52 ; RV32I-LABEL: constraint_m:
58 ; RV64I-LABEL: constraint_m:
63 call void asm sideeffect "", "=*m"(i32* %a)
67 define i32 @constraint_m2(i32* %a) {
68 ; RV32I-LABEL: constraint_m2:
71 ; RV32I-NEXT: lw a0, 0(a0)
75 ; RV64I-LABEL: constraint_m2:
78 ; RV64I-NEXT: lw a0, 0(a0)
81 %1 = tail call i32 asm "lw $0, $1", "=r,*m"(i32* %a) nounwind
85 ; TODO: expend tests for more complex constraints, out of range immediates etc