| blob | 9937ca08aafa7156b39a1497e46cdd4129e07bc8 |
1 # RUN: llc -mtriple=x86_64-- -run-pass x86-evex-to-vex-compress -verify-machineinstrs -mcpu=skx -o - %s | FileCheck %s
2 # This test verifies VEX encdoing for AVX-512 instructions that use registers of low inedexes and
3 # do not use zmm or mask registers and have a corresponding AVX/AVX2 opcode
5 --- |
6 define void @evex_z256_to_vex_test() { ret void }
7 define void @evex_z128_to_vex_test() { ret void }
8 define void @evex_scalar_to_vex_test() { ret void }
9 define void @evex_z256_to_evex_test() { ret void }
10 define void @evex_z128_to_evex_test() { ret void }
11 define void @evex_scalar_to_evex_test() { ret void }
12 ...
13 ---
14 # CHECK-LABEL: name: evex_z256_to_vex_test
15 # CHECK: bb.0:
17 name: evex_z256_to_vex_test
18 body: |
19 bb.0:
20 ; CHECK: VMOVAPDYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
21 VMOVAPDZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
22 ; CHECK: $ymm0 = VMOVAPDYrm $rip, 1, $noreg, $rax, $noreg
23 $ymm0 = VMOVAPDZ256rm $rip, 1, $noreg, $rax, $noreg
24 ; CHECK: $ymm0 = VMOVAPDYrr $ymm0
25 $ymm0 = VMOVAPDZ256rr $ymm0
26 ; CHECK: $ymm0 = VMOVAPDYrr_REV $ymm0
27 $ymm0 = VMOVAPDZ256rr_REV $ymm0
28 ; CHECK: VMOVAPSYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
29 VMOVAPSZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
30 ; CHECK: $ymm0 = VMOVAPSYrm $rip, 1, $noreg, $rax, $noreg
31 $ymm0 = VMOVAPSZ256rm $rip, 1, $noreg, $rax, $noreg
32 ; CHECK: $ymm0 = VMOVAPSYrr $ymm0
33 $ymm0 = VMOVAPSZ256rr $ymm0
34 ; CHECK: $ymm0 = VMOVAPSYrr_REV $ymm0
35 $ymm0 = VMOVAPSZ256rr_REV $ymm0
36 ; CHECK: $ymm0 = VMOVDDUPYrm $rip, 1, $noreg, $rax, $noreg
37 $ymm0 = VMOVDDUPZ256rm $rip, 1, $noreg, $rax, $noreg
38 ; CHECK: $ymm0 = VMOVDDUPYrr $ymm0
39 $ymm0 = VMOVDDUPZ256rr $ymm0
40 ; CHECK: VMOVDQAYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
41 VMOVDQA32Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
42 ; CHECK: $ymm0 = VMOVDQAYrm $rip, 1, $noreg, $rax, $noreg
43 $ymm0 = VMOVDQA32Z256rm $rip, 1, $noreg, $rax, $noreg
44 ; CHECK: $ymm0 = VMOVDQAYrr $ymm0
45 $ymm0 = VMOVDQA32Z256rr $ymm0
46 ; CHECK: $ymm0 = VMOVDQAYrr_REV $ymm0
47 $ymm0 = VMOVDQA32Z256rr_REV $ymm0
48 ; CHECK: VMOVDQAYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
49 VMOVDQA64Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
50 ; CHECK: $ymm0 = VMOVDQAYrm $rip, 1, $noreg, $rax, $noreg
51 $ymm0 = VMOVDQA64Z256rm $rip, 1, $noreg, $rax, $noreg
52 ; CHECK: $ymm0 = VMOVDQAYrr $ymm0
53 $ymm0 = VMOVDQA64Z256rr $ymm0
54 ; CHECK: $ymm0 = VMOVDQAYrr_REV $ymm0
55 $ymm0 = VMOVDQA64Z256rr_REV $ymm0
56 ; CHECK: VMOVDQUYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
57 VMOVDQU16Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
58 ; CHECK: $ymm0 = VMOVDQUYrm $rip, 1, $noreg, $rax, $noreg
59 $ymm0 = VMOVDQU16Z256rm $rip, 1, $noreg, $rax, $noreg
60 ; CHECK: $ymm0 = VMOVDQUYrr $ymm0
61 $ymm0 = VMOVDQU16Z256rr $ymm0
62 ; CHECK: $ymm0 = VMOVDQUYrr_REV $ymm0
63 $ymm0 = VMOVDQU16Z256rr_REV $ymm0
64 ; CHECK: VMOVDQUYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
65 VMOVDQU32Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
66 ; CHECK: $ymm0 = VMOVDQUYrm $rip, 1, $noreg, $rax, $noreg
67 $ymm0 = VMOVDQU32Z256rm $rip, 1, $noreg, $rax, $noreg
68 ; CHECK: $ymm0 = VMOVDQUYrr $ymm0
69 $ymm0 = VMOVDQU32Z256rr $ymm0
70 ; CHECK: $ymm0 = VMOVDQUYrr_REV $ymm0
71 $ymm0 = VMOVDQU32Z256rr_REV $ymm0
72 ; CHECK: VMOVDQUYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
73 VMOVDQU64Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
74 ; CHECK: $ymm0 = VMOVDQUYrm $rip, 1, $noreg, $rax, $noreg
75 $ymm0 = VMOVDQU64Z256rm $rip, 1, $noreg, $rax, $noreg
76 ; CHECK: $ymm0 = VMOVDQUYrr $ymm0
77 $ymm0 = VMOVDQU64Z256rr $ymm0
78 ; CHECK: $ymm0 = VMOVDQUYrr_REV $ymm0
79 $ymm0 = VMOVDQU64Z256rr_REV $ymm0
80 ; CHECK: VMOVDQUYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
81 VMOVDQU8Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
82 ; CHECK: $ymm0 = VMOVDQUYrm $rip, 1, $noreg, $rax, $noreg
83 $ymm0 = VMOVDQU8Z256rm $rip, 1, $noreg, $rax, $noreg
84 ; CHECK: $ymm0 = VMOVDQUYrr $ymm0
85 $ymm0 = VMOVDQU8Z256rr $ymm0
86 ; CHECK: $ymm0 = VMOVDQUYrr_REV $ymm0
87 $ymm0 = VMOVDQU8Z256rr_REV $ymm0
88 ; CHECK: $ymm0 = VMOVNTDQAYrm $rip, 1, $noreg, $rax, $noreg
89 $ymm0 = VMOVNTDQAZ256rm $rip, 1, $noreg, $rax, $noreg
90 ; CHECK: VMOVNTDQYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
91 VMOVNTDQZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
92 ; CHECK: VMOVNTPDYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
93 VMOVNTPDZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
94 ; CHECK: VMOVNTPSYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
95 VMOVNTPSZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
96 ; CHECK: $ymm0 = VMOVSHDUPYrm $rip, 1, $noreg, $rax, $noreg
97 $ymm0 = VMOVSHDUPZ256rm $rip, 1, $noreg, $rax, $noreg
98 ; CHECK: $ymm0 = VMOVSHDUPYrr $ymm0
99 $ymm0 = VMOVSHDUPZ256rr $ymm0
100 ; CHECK: $ymm0 = VMOVSLDUPYrm $rip, 1, $noreg, $rax, $noreg
101 $ymm0 = VMOVSLDUPZ256rm $rip, 1, $noreg, $rax, $noreg
102 ; CHECK: $ymm0 = VMOVSLDUPYrr $ymm0
103 $ymm0 = VMOVSLDUPZ256rr $ymm0
104 ; CHECK: VMOVUPDYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
105 VMOVUPDZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
106 ; CHECK: $ymm0 = VMOVUPDYrm $rip, 1, $noreg, $rax, $noreg
107 $ymm0 = VMOVUPDZ256rm $rip, 1, $noreg, $rax, $noreg
108 ; CHECK: $ymm0 = VMOVUPDYrr $ymm0
109 $ymm0 = VMOVUPDZ256rr $ymm0
110 ; CHECK: $ymm0 = VMOVUPDYrr_REV $ymm0
111 $ymm0 = VMOVUPDZ256rr_REV $ymm0
112 ; CHECK: VMOVUPSYmr $rdi, 1, $noreg, 0, $noreg, $ymm0
113 VMOVUPSZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm0
114 ; CHECK: $ymm0 = VPANDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
115 $ymm0 = VPANDDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
116 ; CHECK: $ymm0 = VPANDYrr $ymm0, $ymm1
117 $ymm0 = VPANDDZ256rr $ymm0, $ymm1
118 ; CHECK: $ymm0 = VPANDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
119 $ymm0 = VPANDQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
120 ; CHECK: $ymm0 = VPANDYrr $ymm0, $ymm1
121 $ymm0 = VPANDQZ256rr $ymm0, $ymm1
122 ; CHECK: $ymm0 = VPANDNYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
123 $ymm0 = VPANDNDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
124 ; CHECK: $ymm0 = VPANDNYrr $ymm0, $ymm1
125 $ymm0 = VPANDNDZ256rr $ymm0, $ymm1
126 ; CHECK: $ymm0 = VPANDNYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
127 $ymm0 = VPANDNQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
128 ; CHECK: $ymm0 = VPANDNYrr $ymm0, $ymm1
129 $ymm0 = VPANDNQZ256rr $ymm0, $ymm1
130 ; CHECK: $ymm0 = VPAVGBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
131 $ymm0 = VPAVGBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
132 ; CHECK: $ymm0 = VPAVGBYrr $ymm0, $ymm1
133 $ymm0 = VPAVGBZ256rr $ymm0, $ymm1
134 ; CHECK: $ymm0 = VPAVGWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
135 $ymm0 = VPAVGWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
136 ; CHECK: $ymm0 = VPAVGWYrr $ymm0, $ymm1
137 $ymm0 = VPAVGWZ256rr $ymm0, $ymm1
138 ; CHECK: $ymm0 = VPADDBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
139 $ymm0 = VPADDBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
140 ; CHECK: $ymm0 = VPADDBYrr $ymm0, $ymm1
141 $ymm0 = VPADDBZ256rr $ymm0, $ymm1
142 ; CHECK: $ymm0 = VPADDDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
143 $ymm0 = VPADDDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
144 ; CHECK: $ymm0 = VPADDDYrr $ymm0, $ymm1
145 $ymm0 = VPADDDZ256rr $ymm0, $ymm1
146 ; CHECK: $ymm0 = VPADDQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
147 $ymm0 = VPADDQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
148 ; CHECK: $ymm0 = VPADDQYrr $ymm0, $ymm1
149 $ymm0 = VPADDQZ256rr $ymm0, $ymm1
150 ; CHECK: $ymm0 = VPADDSBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
151 $ymm0 = VPADDSBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
152 ; CHECK: $ymm0 = VPADDSBYrr $ymm0, $ymm1
153 $ymm0 = VPADDSBZ256rr $ymm0, $ymm1
154 ; CHECK: $ymm0 = VPADDSWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
155 $ymm0 = VPADDSWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
156 ; CHECK: $ymm0 = VPADDSWYrr $ymm0, $ymm1
157 $ymm0 = VPADDSWZ256rr $ymm0, $ymm1
158 ; CHECK: $ymm0 = VPADDUSBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
159 $ymm0 = VPADDUSBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
160 ; CHECK: $ymm0 = VPADDUSBYrr $ymm0, $ymm1
161 $ymm0 = VPADDUSBZ256rr $ymm0, $ymm1
162 ; CHECK: $ymm0 = VPADDUSWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
163 $ymm0 = VPADDUSWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
164 ; CHECK: $ymm0 = VPADDUSWYrr $ymm0, $ymm1
165 $ymm0 = VPADDUSWZ256rr $ymm0, $ymm1
166 ; CHECK: $ymm0 = VPADDWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
167 $ymm0 = VPADDWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
168 ; CHECK: $ymm0 = VPADDWYrr $ymm0, $ymm1
169 $ymm0 = VPADDWZ256rr $ymm0, $ymm1
170 ; CHECK: $ymm0 = VMULPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
171 $ymm0 = VMULPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
172 ; CHECK: $ymm0 = VMULPDYrr $ymm0, $ymm1
173 $ymm0 = VMULPDZ256rr $ymm0, $ymm1
174 ; CHECK: $ymm0 = VMULPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
175 $ymm0 = VMULPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
176 ; CHECK: $ymm0 = VMULPSYrr $ymm0, $ymm1
177 $ymm0 = VMULPSZ256rr $ymm0, $ymm1
178 ; CHECK: $ymm0 = VORPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
179 $ymm0 = VORPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
180 ; CHECK: $ymm0 = VORPDYrr $ymm0, $ymm1
181 $ymm0 = VORPDZ256rr $ymm0, $ymm1
182 ; CHECK: $ymm0 = VORPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
183 $ymm0 = VORPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
184 ; CHECK: $ymm0 = VORPSYrr $ymm0, $ymm1
185 $ymm0 = VORPSZ256rr $ymm0, $ymm1
186 ; CHECK: $ymm0 = VPMADDUBSWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
187 $ymm0 = VPMADDUBSWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
188 ; CHECK: $ymm0 = VPMADDUBSWYrr $ymm0, $ymm1
189 $ymm0 = VPMADDUBSWZ256rr $ymm0, $ymm1
190 ; CHECK: $ymm0 = VPMADDWDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
191 $ymm0 = VPMADDWDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
192 ; CHECK: $ymm0 = VPMADDWDYrr $ymm0, $ymm1
193 $ymm0 = VPMADDWDZ256rr $ymm0, $ymm1
194 ; CHECK: $ymm0 = VPMAXSBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
195 $ymm0 = VPMAXSBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
196 ; CHECK: $ymm0 = VPMAXSBYrr $ymm0, $ymm1
197 $ymm0 = VPMAXSBZ256rr $ymm0, $ymm1
198 ; CHECK: $ymm0 = VPMAXSDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
199 $ymm0 = VPMAXSDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
200 ; CHECK: $ymm0 = VPMAXSDYrr $ymm0, $ymm1
201 $ymm0 = VPMAXSDZ256rr $ymm0, $ymm1
202 ; CHECK: $ymm0 = VPMAXSWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
203 $ymm0 = VPMAXSWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
204 ; CHECK: $ymm0 = VPMAXSWYrr $ymm0, $ymm1
205 $ymm0 = VPMAXSWZ256rr $ymm0, $ymm1
206 ; CHECK: $ymm0 = VPMAXUBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
207 $ymm0 = VPMAXUBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
208 ; CHECK: $ymm0 = VPMAXUBYrr $ymm0, $ymm1
209 $ymm0 = VPMAXUBZ256rr $ymm0, $ymm1
210 ; CHECK: $ymm0 = VPMAXUDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
211 $ymm0 = VPMAXUDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
212 ; CHECK: $ymm0 = VPMAXUDYrr $ymm0, $ymm1
213 $ymm0 = VPMAXUDZ256rr $ymm0, $ymm1
214 ; CHECK: $ymm0 = VPMAXUWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
215 $ymm0 = VPMAXUWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
216 ; CHECK: $ymm0 = VPMAXUWYrr $ymm0, $ymm1
217 $ymm0 = VPMAXUWZ256rr $ymm0, $ymm1
218 ; CHECK: $ymm0 = VPMINSBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
219 $ymm0 = VPMINSBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
220 ; CHECK: $ymm0 = VPMINSBYrr $ymm0, $ymm1
221 $ymm0 = VPMINSBZ256rr $ymm0, $ymm1
222 ; CHECK: $ymm0 = VPMINSDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
223 $ymm0 = VPMINSDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
224 ; CHECK: $ymm0 = VPMINSDYrr $ymm0, $ymm1
225 $ymm0 = VPMINSDZ256rr $ymm0, $ymm1
226 ; CHECK: $ymm0 = VPMINSWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
227 $ymm0 = VPMINSWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
228 ; CHECK: $ymm0 = VPMINSWYrr $ymm0, $ymm1
229 $ymm0 = VPMINSWZ256rr $ymm0, $ymm1
230 ; CHECK: $ymm0 = VPMINUBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
231 $ymm0 = VPMINUBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
232 ; CHECK: $ymm0 = VPMINUBYrr $ymm0, $ymm1
233 $ymm0 = VPMINUBZ256rr $ymm0, $ymm1
234 ; CHECK: $ymm0 = VPMINUDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
235 $ymm0 = VPMINUDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
236 ; CHECK: $ymm0 = VPMINUDYrr $ymm0, $ymm1
237 $ymm0 = VPMINUDZ256rr $ymm0, $ymm1
238 ; CHECK: $ymm0 = VPMINUWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
239 $ymm0 = VPMINUWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
240 ; CHECK: $ymm0 = VPMINUWYrr $ymm0, $ymm1
241 $ymm0 = VPMINUWZ256rr $ymm0, $ymm1
242 ; CHECK: $ymm0 = VPMULDQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
243 $ymm0 = VPMULDQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
244 ; CHECK: $ymm0 = VPMULDQYrr $ymm0, $ymm1
245 $ymm0 = VPMULDQZ256rr $ymm0, $ymm1
246 ; CHECK: $ymm0 = VPMULHRSWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
247 $ymm0 = VPMULHRSWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
248 ; CHECK: $ymm0 = VPMULHRSWYrr $ymm0, $ymm1
249 $ymm0 = VPMULHRSWZ256rr $ymm0, $ymm1
250 ; CHECK: $ymm0 = VPMULHUWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
251 $ymm0 = VPMULHUWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
252 ; CHECK: $ymm0 = VPMULHUWYrr $ymm0, $ymm1
253 $ymm0 = VPMULHUWZ256rr $ymm0, $ymm1
254 ; CHECK: $ymm0 = VPMULHWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
255 $ymm0 = VPMULHWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
256 ; CHECK: $ymm0 = VPMULHWYrr $ymm0, $ymm1
257 $ymm0 = VPMULHWZ256rr $ymm0, $ymm1
258 ; CHECK: $ymm0 = VPMULLDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
259 $ymm0 = VPMULLDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
260 ; CHECK: $ymm0 = VPMULLDYrr $ymm0, $ymm1
261 $ymm0 = VPMULLDZ256rr $ymm0, $ymm1
262 ; CHECK: $ymm0 = VPMULLWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
263 $ymm0 = VPMULLWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
264 ; CHECK: $ymm0 = VPMULLWYrr $ymm0, $ymm1
265 $ymm0 = VPMULLWZ256rr $ymm0, $ymm1
266 ; CHECK: $ymm0 = VPMULUDQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
267 $ymm0 = VPMULUDQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
268 ; CHECK: $ymm0 = VPMULUDQYrr $ymm0, $ymm1
269 $ymm0 = VPMULUDQZ256rr $ymm0, $ymm1
270 ; CHECK: $ymm0 = VPORYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
271 $ymm0 = VPORDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
272 ; CHECK: $ymm0 = VPORYrr $ymm0, $ymm1
273 $ymm0 = VPORDZ256rr $ymm0, $ymm1
274 ; CHECK: $ymm0 = VPORYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
275 $ymm0 = VPORQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
276 ; CHECK: $ymm0 = VPORYrr $ymm0, $ymm1
277 $ymm0 = VPORQZ256rr $ymm0, $ymm1
278 ; CHECK: $ymm0 = VPSUBBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
279 $ymm0 = VPSUBBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
280 ; CHECK: $ymm0 = VPSUBBYrr $ymm0, $ymm1
281 $ymm0 = VPSUBBZ256rr $ymm0, $ymm1
282 ; CHECK: $ymm0 = VPSUBDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
283 $ymm0 = VPSUBDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
284 ; CHECK: $ymm0 = VPSUBDYrr $ymm0, $ymm1
285 $ymm0 = VPSUBDZ256rr $ymm0, $ymm1
286 ; CHECK: $ymm0 = VPSUBQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
287 $ymm0 = VPSUBQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
288 ; CHECK: $ymm0 = VPSUBQYrr $ymm0, $ymm1
289 $ymm0 = VPSUBQZ256rr $ymm0, $ymm1
290 ; CHECK: $ymm0 = VPSUBSBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
291 $ymm0 = VPSUBSBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
292 ; CHECK: $ymm0 = VPSUBSBYrr $ymm0, $ymm1
293 $ymm0 = VPSUBSBZ256rr $ymm0, $ymm1
294 ; CHECK: $ymm0 = VPSUBSWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
295 $ymm0 = VPSUBSWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
296 ; CHECK: $ymm0 = VPSUBSWYrr $ymm0, $ymm1
297 $ymm0 = VPSUBSWZ256rr $ymm0, $ymm1
298 ; CHECK: $ymm0 = VPSUBUSBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
299 $ymm0 = VPSUBUSBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
300 ; CHECK: $ymm0 = VPSUBUSBYrr $ymm0, $ymm1
301 $ymm0 = VPSUBUSBZ256rr $ymm0, $ymm1
302 ; CHECK: $ymm0 = VPSUBUSWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
303 $ymm0 = VPSUBUSWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
304 ; CHECK: $ymm0 = VPSUBUSWYrr $ymm0, $ymm1
305 $ymm0 = VPSUBUSWZ256rr $ymm0, $ymm1
306 ; CHECK: $ymm0 = VPSUBWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
307 $ymm0 = VPSUBWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
308 ; CHECK: $ymm0 = VPSUBWYrr $ymm0, $ymm1
309 $ymm0 = VPSUBWZ256rr $ymm0, $ymm1
310 ; CHECK: $ymm0 = VPXORYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
311 $ymm0 = VPXORDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
312 ; CHECK: $ymm0 = VPXORYrr $ymm0, $ymm1
313 $ymm0 = VPXORDZ256rr $ymm0, $ymm1
314 ; CHECK: $ymm0 = VPXORYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
315 $ymm0 = VPXORQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
316 ; CHECK: $ymm0 = VPXORYrr $ymm0, $ymm1
317 $ymm0 = VPXORQZ256rr $ymm0, $ymm1
318 ; CHECK: $ymm0 = VADDPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
319 $ymm0 = VADDPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
320 ; CHECK: $ymm0 = VADDPDYrr $ymm0, $ymm1
321 $ymm0 = VADDPDZ256rr $ymm0, $ymm1
322 ; CHECK: $ymm0 = VADDPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
323 $ymm0 = VADDPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
324 ; CHECK: $ymm0 = VADDPSYrr $ymm0, $ymm1
325 $ymm0 = VADDPSZ256rr $ymm0, $ymm1
326 ; CHECK: $ymm0 = VANDNPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
327 $ymm0 = VANDNPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
328 ; CHECK: $ymm0 = VANDNPDYrr $ymm0, $ymm1
329 $ymm0 = VANDNPDZ256rr $ymm0, $ymm1
330 ; CHECK: $ymm0 = VANDNPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
331 $ymm0 = VANDNPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
332 ; CHECK: $ymm0 = VANDNPSYrr $ymm0, $ymm1
333 $ymm0 = VANDNPSZ256rr $ymm0, $ymm1
334 ; CHECK: $ymm0 = VANDPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
335 $ymm0 = VANDPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
336 ; CHECK: $ymm0 = VANDPDYrr $ymm0, $ymm1
337 $ymm0 = VANDPDZ256rr $ymm0, $ymm1
338 ; CHECK: $ymm0 = VANDPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
339 $ymm0 = VANDPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
340 ; CHECK: $ymm0 = VANDPSYrr $ymm0, $ymm1
341 $ymm0 = VANDPSZ256rr $ymm0, $ymm1
342 ; CHECK: $ymm0 = VDIVPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
343 $ymm0 = VDIVPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
344 ; CHECK: $ymm0 = VDIVPDYrr $ymm0, $ymm1
345 $ymm0 = VDIVPDZ256rr $ymm0, $ymm1
346 ; CHECK: $ymm0 = VDIVPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
347 $ymm0 = VDIVPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
348 ; CHECK: $ymm0 = VDIVPSYrr $ymm0, $ymm1
349 $ymm0 = VDIVPSZ256rr $ymm0, $ymm1
350 ; CHECK: $ymm0 = VMAXCPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
351 $ymm0 = VMAXCPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
352 ; CHECK: $ymm0 = VMAXCPDYrr $ymm0, $ymm1
353 $ymm0 = VMAXCPDZ256rr $ymm0, $ymm1
354 ; CHECK: $ymm0 = VMAXCPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
355 $ymm0 = VMAXCPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
356 ; CHECK: $ymm0 = VMAXCPSYrr $ymm0, $ymm1
357 $ymm0 = VMAXCPSZ256rr $ymm0, $ymm1
358 ; CHECK: $ymm0 = VMAXCPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
359 $ymm0 = VMAXPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
360 ; CHECK: $ymm0 = VMAXCPDYrr $ymm0, $ymm1
361 $ymm0 = VMAXPDZ256rr $ymm0, $ymm1
362 ; CHECK: $ymm0 = VMAXCPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
363 $ymm0 = VMAXPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
364 ; CHECK: $ymm0 = VMAXCPSYrr $ymm0, $ymm1
365 $ymm0 = VMAXPSZ256rr $ymm0, $ymm1
366 ; CHECK: $ymm0 = VMINCPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
367 $ymm0 = VMINCPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
368 ; CHECK: $ymm0 = VMINCPDYrr $ymm0, $ymm1
369 $ymm0 = VMINCPDZ256rr $ymm0, $ymm1
370 ; CHECK: $ymm0 = VMINCPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
371 $ymm0 = VMINCPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
372 ; CHECK: $ymm0 = VMINCPSYrr $ymm0, $ymm1
373 $ymm0 = VMINCPSZ256rr $ymm0, $ymm1
374 ; CHECK: $ymm0 = VMINCPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
375 $ymm0 = VMINPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
376 ; CHECK: $ymm0 = VMINCPDYrr $ymm0, $ymm1
377 $ymm0 = VMINPDZ256rr $ymm0, $ymm1
378 ; CHECK: $ymm0 = VMINCPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
379 $ymm0 = VMINPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
380 ; CHECK: $ymm0 = VMINCPSYrr $ymm0, $ymm1
381 $ymm0 = VMINPSZ256rr $ymm0, $ymm1
382 ; CHECK: $ymm0 = VXORPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
383 $ymm0 = VXORPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
384 ; CHECK: $ymm0 = VXORPDYrr $ymm0, $ymm1
385 $ymm0 = VXORPDZ256rr $ymm0, $ymm1
386 ; CHECK: $ymm0 = VXORPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
387 $ymm0 = VXORPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
388 ; CHECK: $ymm0 = VXORPSYrr $ymm0, $ymm1
389 $ymm0 = VXORPSZ256rr $ymm0, $ymm1
390 ; CHECK: $ymm0 = VPACKSSDWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
391 $ymm0 = VPACKSSDWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
392 ; CHECK: $ymm0 = VPACKSSDWYrr $ymm0, $ymm1
393 $ymm0 = VPACKSSDWZ256rr $ymm0, $ymm1
394 ; CHECK: $ymm0 = VPACKSSWBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
395 $ymm0 = VPACKSSWBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
396 ; CHECK: $ymm0 = VPACKSSWBYrr $ymm0, $ymm1
397 $ymm0 = VPACKSSWBZ256rr $ymm0, $ymm1
398 ; CHECK: $ymm0 = VPACKUSDWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
399 $ymm0 = VPACKUSDWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
400 ; CHECK: $ymm0 = VPACKUSDWYrr $ymm0, $ymm1
401 $ymm0 = VPACKUSDWZ256rr $ymm0, $ymm1
402 ; CHECK: $ymm0 = VPACKUSWBYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
403 $ymm0 = VPACKUSWBZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
404 ; CHECK: $ymm0 = VPACKUSWBYrr $ymm0, $ymm1
405 $ymm0 = VPACKUSWBZ256rr $ymm0, $ymm1
406 ; CHECK: $ymm0 = VUNPCKHPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
407 $ymm0 = VUNPCKHPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
408 ; CHECK: $ymm0 = VUNPCKHPDYrr $ymm0, $ymm1
409 $ymm0 = VUNPCKHPDZ256rr $ymm0, $ymm1
410 ; CHECK: $ymm0 = VUNPCKHPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
411 $ymm0 = VUNPCKHPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
412 ; CHECK: $ymm0 = VUNPCKHPSYrr $ymm0, $ymm1
413 $ymm0 = VUNPCKHPSZ256rr $ymm0, $ymm1
414 ; CHECK: $ymm0 = VUNPCKLPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
415 $ymm0 = VUNPCKLPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
416 ; CHECK: $ymm0 = VUNPCKLPDYrr $ymm0, $ymm1
417 $ymm0 = VUNPCKLPDZ256rr $ymm0, $ymm1
418 ; CHECK: $ymm0 = VUNPCKLPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
419 $ymm0 = VUNPCKLPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
420 ; CHECK: $ymm0 = VUNPCKLPSYrr $ymm0, $ymm1
421 $ymm0 = VUNPCKLPSZ256rr $ymm0, $ymm1
422 ; CHECK: $ymm0 = VSUBPDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
423 $ymm0 = VSUBPDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
424 ; CHECK: $ymm0 = VSUBPDYrr $ymm0, $ymm1
425 $ymm0 = VSUBPDZ256rr $ymm0, $ymm1
426 ; CHECK: $ymm0 = VSUBPSYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
427 $ymm0 = VSUBPSZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
428 ; CHECK: $ymm0 = VSUBPSYrr $ymm0, $ymm1
429 $ymm0 = VSUBPSZ256rr $ymm0, $ymm1
430 ; CHECK: $ymm0 = VPUNPCKHBWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
431 $ymm0 = VPUNPCKHBWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
432 ; CHECK: $ymm0 = VPUNPCKHBWYrr $ymm0, $ymm1
433 $ymm0 = VPUNPCKHBWZ256rr $ymm0, $ymm1
434 ; CHECK: $ymm0 = VPUNPCKHDQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
435 $ymm0 = VPUNPCKHDQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
436 ; CHECK: $ymm0 = VPUNPCKHDQYrr $ymm0, $ymm1
437 $ymm0 = VPUNPCKHDQZ256rr $ymm0, $ymm1
438 ; CHECK: $ymm0 = VPUNPCKHQDQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
439 $ymm0 = VPUNPCKHQDQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
440 ; CHECK: $ymm0 = VPUNPCKHQDQYrr $ymm0, $ymm1
441 $ymm0 = VPUNPCKHQDQZ256rr $ymm0, $ymm1
442 ; CHECK: $ymm0 = VPUNPCKHWDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
443 $ymm0 = VPUNPCKHWDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
444 ; CHECK: $ymm0 = VPUNPCKHWDYrr $ymm0, $ymm1
445 $ymm0 = VPUNPCKHWDZ256rr $ymm0, $ymm1
446 ; CHECK: $ymm0 = VPUNPCKLBWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
447 $ymm0 = VPUNPCKLBWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
448 ; CHECK: $ymm0 = VPUNPCKLBWYrr $ymm0, $ymm1
449 $ymm0 = VPUNPCKLBWZ256rr $ymm0, $ymm1
450 ; CHECK: $ymm0 = VPUNPCKLDQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
451 $ymm0 = VPUNPCKLDQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
452 ; CHECK: $ymm0 = VPUNPCKLDQYrr $ymm0, $ymm1
453 $ymm0 = VPUNPCKLDQZ256rr $ymm0, $ymm1
454 ; CHECK: $ymm0 = VPUNPCKLQDQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
455 $ymm0 = VPUNPCKLQDQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
456 ; CHECK: $ymm0 = VPUNPCKLQDQYrr $ymm0, $ymm1
457 $ymm0 = VPUNPCKLQDQZ256rr $ymm0, $ymm1
458 ; CHECK: $ymm0 = VPUNPCKLWDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
459 $ymm0 = VPUNPCKLWDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
460 ; CHECK: $ymm0 = VPUNPCKLWDYrr $ymm0, $ymm1
461 $ymm0 = VPUNPCKLWDZ256rr $ymm0, $ymm1
462 ; CHECK: $ymm0 = VFMADD132PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
463 $ymm0 = VFMADD132PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
464 ; CHECK: $ymm0 = VFMADD132PDYr $ymm0, $ymm1, $ymm2
465 $ymm0 = VFMADD132PDZ256r $ymm0, $ymm1, $ymm2
466 ; CHECK: $ymm0 = VFMADD132PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
467 $ymm0 = VFMADD132PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
468 ; CHECK: $ymm0 = VFMADD132PSYr $ymm0, $ymm1, $ymm2
469 $ymm0 = VFMADD132PSZ256r $ymm0, $ymm1, $ymm2
470 ; CHECK: $ymm0 = VFMADD213PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
471 $ymm0 = VFMADD213PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
472 ; CHECK: $ymm0 = VFMADD213PDYr $ymm0, $ymm1, $ymm2
473 $ymm0 = VFMADD213PDZ256r $ymm0, $ymm1, $ymm2
474 ; CHECK: $ymm0 = VFMADD213PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
475 $ymm0 = VFMADD213PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
476 ; CHECK: $ymm0 = VFMADD213PSYr $ymm0, $ymm1, $ymm2
477 $ymm0 = VFMADD213PSZ256r $ymm0, $ymm1, $ymm2
478 ; CHECK: $ymm0 = VFMADD231PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
479 $ymm0 = VFMADD231PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
480 ; CHECK: $ymm0 = VFMADD231PDYr $ymm0, $ymm1, $ymm2
481 $ymm0 = VFMADD231PDZ256r $ymm0, $ymm1, $ymm2
482 ; CHECK: $ymm0 = VFMADD231PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
483 $ymm0 = VFMADD231PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
484 ; CHECK: $ymm0 = VFMADD231PSYr $ymm0, $ymm1, $ymm2
485 $ymm0 = VFMADD231PSZ256r $ymm0, $ymm1, $ymm2
486 ; CHECK: $ymm0 = VFMADDSUB132PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
487 $ymm0 = VFMADDSUB132PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
488 ; CHECK: $ymm0 = VFMADDSUB132PDYr $ymm0, $ymm1, $ymm2
489 $ymm0 = VFMADDSUB132PDZ256r $ymm0, $ymm1, $ymm2
490 ; CHECK: $ymm0 = VFMADDSUB132PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
491 $ymm0 = VFMADDSUB132PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
492 ; CHECK: $ymm0 = VFMADDSUB132PSYr $ymm0, $ymm1, $ymm2
493 $ymm0 = VFMADDSUB132PSZ256r $ymm0, $ymm1, $ymm2
494 ; CHECK: $ymm0 = VFMADDSUB213PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
495 $ymm0 = VFMADDSUB213PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
496 ; CHECK: $ymm0 = VFMADDSUB213PDYr $ymm0, $ymm1, $ymm2
497 $ymm0 = VFMADDSUB213PDZ256r $ymm0, $ymm1, $ymm2
498 ; CHECK: $ymm0 = VFMADDSUB213PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
499 $ymm0 = VFMADDSUB213PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
500 ; CHECK: $ymm0 = VFMADDSUB213PSYr $ymm0, $ymm1, $ymm2
501 $ymm0 = VFMADDSUB213PSZ256r $ymm0, $ymm1, $ymm2
502 ; CHECK: $ymm0 = VFMADDSUB231PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
503 $ymm0 = VFMADDSUB231PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
504 ; CHECK: $ymm0 = VFMADDSUB231PDYr $ymm0, $ymm1, $ymm2
505 $ymm0 = VFMADDSUB231PDZ256r $ymm0, $ymm1, $ymm2
506 ; CHECK: $ymm0 = VFMADDSUB231PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
507 $ymm0 = VFMADDSUB231PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
508 ; CHECK: $ymm0 = VFMADDSUB231PSYr $ymm0, $ymm1, $ymm2
509 $ymm0 = VFMADDSUB231PSZ256r $ymm0, $ymm1, $ymm2
510 ; CHECK: $ymm0 = VFMSUB132PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
511 $ymm0 = VFMSUB132PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
512 ; CHECK: $ymm0 = VFMSUB132PDYr $ymm0, $ymm1, $ymm2
513 $ymm0 = VFMSUB132PDZ256r $ymm0, $ymm1, $ymm2
514 ; CHECK: $ymm0 = VFMSUB132PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
515 $ymm0 = VFMSUB132PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
516 ; CHECK: $ymm0 = VFMSUB132PSYr $ymm0, $ymm1, $ymm2
517 $ymm0 = VFMSUB132PSZ256r $ymm0, $ymm1, $ymm2
518 ; CHECK: $ymm0 = VFMSUB213PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
519 $ymm0 = VFMSUB213PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
520 ; CHECK: $ymm0 = VFMSUB213PDYr $ymm0, $ymm1, $ymm2
521 $ymm0 = VFMSUB213PDZ256r $ymm0, $ymm1, $ymm2
522 ; CHECK: $ymm0 = VFMSUB213PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
523 $ymm0 = VFMSUB213PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
524 ; CHECK: $ymm0 = VFMSUB213PSYr $ymm0, $ymm1, $ymm2
525 $ymm0 = VFMSUB213PSZ256r $ymm0, $ymm1, $ymm2
526 ; CHECK: $ymm0 = VFMSUB231PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
527 $ymm0 = VFMSUB231PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
528 ; CHECK: $ymm0 = VFMSUB231PDYr $ymm0, $ymm1, $ymm2
529 $ymm0 = VFMSUB231PDZ256r $ymm0, $ymm1, $ymm2
530 ; CHECK: $ymm0 = VFMSUB231PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
531 $ymm0 = VFMSUB231PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
532 ; CHECK: $ymm0 = VFMSUB231PSYr $ymm0, $ymm1, $ymm2
533 $ymm0 = VFMSUB231PSZ256r $ymm0, $ymm1, $ymm2
534 ; CHECK: $ymm0 = VFMSUBADD132PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
535 $ymm0 = VFMSUBADD132PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
536 ; CHECK: $ymm0 = VFMSUBADD132PDYr $ymm0, $ymm1, $ymm2
537 $ymm0 = VFMSUBADD132PDZ256r $ymm0, $ymm1, $ymm2
538 ; CHECK: $ymm0 = VFMSUBADD132PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
539 $ymm0 = VFMSUBADD132PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
540 ; CHECK: $ymm0 = VFMSUBADD132PSYr $ymm0, $ymm1, $ymm2
541 $ymm0 = VFMSUBADD132PSZ256r $ymm0, $ymm1, $ymm2
542 ; CHECK: $ymm0 = VFMSUBADD213PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
543 $ymm0 = VFMSUBADD213PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
544 ; CHECK: $ymm0 = VFMSUBADD213PDYr $ymm0, $ymm1, $ymm2
545 $ymm0 = VFMSUBADD213PDZ256r $ymm0, $ymm1, $ymm2
546 ; CHECK: $ymm0 = VFMSUBADD213PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
547 $ymm0 = VFMSUBADD213PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
548 ; CHECK: $ymm0 = VFMSUBADD213PSYr $ymm0, $ymm1, $ymm2
549 $ymm0 = VFMSUBADD213PSZ256r $ymm0, $ymm1, $ymm2
550 ; CHECK: $ymm0 = VFMSUBADD231PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
551 $ymm0 = VFMSUBADD231PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
552 ; CHECK: $ymm0 = VFMSUBADD231PDYr $ymm0, $ymm1, $ymm2
553 $ymm0 = VFMSUBADD231PDZ256r $ymm0, $ymm1, $ymm2
554 ; CHECK: $ymm0 = VFMSUBADD231PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
555 $ymm0 = VFMSUBADD231PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
556 ; CHECK: $ymm0 = VFMSUBADD231PSYr $ymm0, $ymm1, $ymm2
557 $ymm0 = VFMSUBADD231PSZ256r $ymm0, $ymm1, $ymm2
558 ; CHECK: $ymm0 = VFNMADD132PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
559 $ymm0 = VFNMADD132PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
560 ; CHECK: $ymm0 = VFNMADD132PDYr $ymm0, $ymm1, $ymm2
561 $ymm0 = VFNMADD132PDZ256r $ymm0, $ymm1, $ymm2
562 ; CHECK: $ymm0 = VFNMADD132PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
563 $ymm0 = VFNMADD132PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
564 ; CHECK: $ymm0 = VFNMADD132PSYr $ymm0, $ymm1, $ymm2
565 $ymm0 = VFNMADD132PSZ256r $ymm0, $ymm1, $ymm2
566 ; CHECK: $ymm0 = VFNMADD213PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
567 $ymm0 = VFNMADD213PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
568 ; CHECK: $ymm0 = VFNMADD213PDYr $ymm0, $ymm1, $ymm2
569 $ymm0 = VFNMADD213PDZ256r $ymm0, $ymm1, $ymm2
570 ; CHECK: $ymm0 = VFNMADD213PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
571 $ymm0 = VFNMADD213PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
572 ; CHECK: $ymm0 = VFNMADD213PSYr $ymm0, $ymm1, $ymm2
573 $ymm0 = VFNMADD213PSZ256r $ymm0, $ymm1, $ymm2
574 ; CHECK: $ymm0 = VFNMADD231PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
575 $ymm0 = VFNMADD231PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
576 ; CHECK: $ymm0 = VFNMADD231PDYr $ymm0, $ymm1, $ymm2
577 $ymm0 = VFNMADD231PDZ256r $ymm0, $ymm1, $ymm2
578 ; CHECK: $ymm0 = VFNMADD231PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
579 $ymm0 = VFNMADD231PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
580 ; CHECK: $ymm0 = VFNMADD231PSYr $ymm0, $ymm1, $ymm2
581 $ymm0 = VFNMADD231PSZ256r $ymm0, $ymm1, $ymm2
582 ; CHECK: $ymm0 = VFNMSUB132PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
583 $ymm0 = VFNMSUB132PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
584 ; CHECK: $ymm0 = VFNMSUB132PDYr $ymm0, $ymm1, $ymm2
585 $ymm0 = VFNMSUB132PDZ256r $ymm0, $ymm1, $ymm2
586 ; CHECK: $ymm0 = VFNMSUB132PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
587 $ymm0 = VFNMSUB132PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
588 ; CHECK: $ymm0 = VFNMSUB132PSYr $ymm0, $ymm1, $ymm2
589 $ymm0 = VFNMSUB132PSZ256r $ymm0, $ymm1, $ymm2
590 ; CHECK: $ymm0 = VFNMSUB213PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
591 $ymm0 = VFNMSUB213PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
592 ; CHECK: $ymm0 = VFNMSUB213PDYr $ymm0, $ymm1, $ymm2
593 $ymm0 = VFNMSUB213PDZ256r $ymm0, $ymm1, $ymm2
594 ; CHECK: $ymm0 = VFNMSUB213PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
595 $ymm0 = VFNMSUB213PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
596 ; CHECK: $ymm0 = VFNMSUB213PSYr $ymm0, $ymm1, $ymm2
597 $ymm0 = VFNMSUB213PSZ256r $ymm0, $ymm1, $ymm2
598 ; CHECK: $ymm0 = VFNMSUB231PDYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
599 $ymm0 = VFNMSUB231PDZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
600 ; CHECK: $ymm0 = VFNMSUB231PDYr $ymm0, $ymm1, $ymm2
601 $ymm0 = VFNMSUB231PDZ256r $ymm0, $ymm1, $ymm2
602 ; CHECK: $ymm0 = VFNMSUB231PSYm $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
603 $ymm0 = VFNMSUB231PSZ256m $ymm0, $ymm0, $rsi, 1, $noreg, 0, $noreg
604 ; CHECK: $ymm0 = VFNMSUB231PSYr $ymm0, $ymm1, $ymm2
605 $ymm0 = VFNMSUB231PSZ256r $ymm0, $ymm1, $ymm2
606 ; CHECK: $ymm0 = VPSRADYri $ymm0, 7
607 $ymm0 = VPSRADZ256ri $ymm0, 7
608 ; CHECK: $ymm0 = VPSRADYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
609 $ymm0 = VPSRADZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
610 ; CHECK: $ymm0 = VPSRADYrr $ymm0, $xmm1
611 $ymm0 = VPSRADZ256rr $ymm0, $xmm1
612 ; CHECK: $ymm0 = VPSRAVDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
613 $ymm0 = VPSRAVDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
614 ; CHECK: $ymm0 = VPSRAVDYrr $ymm0, $ymm1
615 $ymm0 = VPSRAVDZ256rr $ymm0, $ymm1
616 ; CHECK: $ymm0 = VPSRAWYri $ymm0, 7
617 $ymm0 = VPSRAWZ256ri $ymm0, 7
618 ; CHECK: $ymm0 = VPSRAWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
619 $ymm0 = VPSRAWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
620 ; CHECK: $ymm0 = VPSRAWYrr $ymm0, $xmm1
621 $ymm0 = VPSRAWZ256rr $ymm0, $xmm1
622 ; CHECK: $ymm0 = VPSRLDQYri $ymm0, $ymm1
623 $ymm0 = VPSRLDQZ256rr $ymm0, $ymm1
624 ; CHECK: $ymm0 = VPSRLDYri $ymm0, 7
625 $ymm0 = VPSRLDZ256ri $ymm0, 7
626 ; CHECK: $ymm0 = VPSRLDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
627 $ymm0 = VPSRLDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
628 ; CHECK: $ymm0 = VPSRLDYrr $ymm0, $xmm1
629 $ymm0 = VPSRLDZ256rr $ymm0, $xmm1
630 ; CHECK: $ymm0 = VPSRLQYri $ymm0, 7
631 $ymm0 = VPSRLQZ256ri $ymm0, 7
632 ; CHECK: $ymm0 = VPSRLQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
633 $ymm0 = VPSRLQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
634 ; CHECK: $ymm0 = VPSRLQYrr $ymm0, $xmm1
635 $ymm0 = VPSRLQZ256rr $ymm0, $xmm1
636 ; CHECK: $ymm0 = VPSRLVDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
637 $ymm0 = VPSRLVDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
638 ; CHECK: $ymm0 = VPSRLVDYrr $ymm0, $ymm1
639 $ymm0 = VPSRLVDZ256rr $ymm0, $ymm1
640 ; CHECK: $ymm0 = VPSRLVQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
641 $ymm0 = VPSRLVQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
642 ; CHECK: $ymm0 = VPSRLVQYrr $ymm0, $ymm1
643 $ymm0 = VPSRLVQZ256rr $ymm0, $ymm1
644 ; CHECK: $ymm0 = VPSRLWYri $ymm0, 7
645 $ymm0 = VPSRLWZ256ri $ymm0, 7
646 ; CHECK: $ymm0 = VPSRLWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
647 $ymm0 = VPSRLWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
648 ; CHECK: $ymm0 = VPSRLWYrr $ymm0, $xmm1
649 $ymm0 = VPSRLWZ256rr $ymm0, $xmm1
650 ; CHECK: $ymm0 = VPMOVSXBDYrm $rip, 1, $noreg, $rax, $noreg
651 $ymm0 = VPMOVSXBDZ256rm $rip, 1, $noreg, $rax, $noreg
652 ; CHECK: $ymm0 = VPMOVSXBDYrr $xmm0
653 $ymm0 = VPMOVSXBDZ256rr $xmm0
654 ; CHECK: $ymm0 = VPMOVSXBQYrm $rip, 1, $noreg, $rax, $noreg
655 $ymm0 = VPMOVSXBQZ256rm $rip, 1, $noreg, $rax, $noreg
656 ; CHECK: $ymm0 = VPMOVSXBQYrr $xmm0
657 $ymm0 = VPMOVSXBQZ256rr $xmm0
658 ; CHECK: $ymm0 = VPMOVSXBWYrm $rip, 1, $noreg, $rax, $noreg
659 $ymm0 = VPMOVSXBWZ256rm $rip, 1, $noreg, $rax, $noreg
660 ; CHECK: $ymm0 = VPMOVSXBWYrr $xmm0
661 $ymm0 = VPMOVSXBWZ256rr $xmm0
662 ; CHECK: $ymm0 = VPMOVSXDQYrm $rip, 1, $noreg, $rax, $noreg
663 $ymm0 = VPMOVSXDQZ256rm $rip, 1, $noreg, $rax, $noreg
664 ; CHECK: $ymm0 = VPMOVSXDQYrr $xmm0
665 $ymm0 = VPMOVSXDQZ256rr $xmm0
666 ; CHECK: $ymm0 = VPMOVSXWDYrm $rip, 1, $noreg, $rax, $noreg
667 $ymm0 = VPMOVSXWDZ256rm $rip, 1, $noreg, $rax, $noreg
668 ; CHECK: $ymm0 = VPMOVSXWDYrr $xmm0
669 $ymm0 = VPMOVSXWDZ256rr $xmm0
670 ; CHECK: $ymm0 = VPMOVSXWQYrm $rip, 1, $noreg, $rax, $noreg
671 $ymm0 = VPMOVSXWQZ256rm $rip, 1, $noreg, $rax, $noreg
672 ; CHECK: $ymm0 = VPMOVSXWQYrr $xmm0
673 $ymm0 = VPMOVSXWQZ256rr $xmm0
674 ; CHECK: $ymm0 = VPMOVZXBDYrm $rip, 1, $noreg, $rax, $noreg
675 $ymm0 = VPMOVZXBDZ256rm $rip, 1, $noreg, $rax, $noreg
676 ; CHECK: $ymm0 = VPMOVZXBDYrr $xmm0
677 $ymm0 = VPMOVZXBDZ256rr $xmm0
678 ; CHECK: $ymm0 = VPMOVZXBQYrm $rip, 1, $noreg, $rax, $noreg
679 $ymm0 = VPMOVZXBQZ256rm $rip, 1, $noreg, $rax, $noreg
680 ; CHECK: $ymm0 = VPMOVZXBQYrr $xmm0
681 $ymm0 = VPMOVZXBQZ256rr $xmm0
682 ; CHECK: $ymm0 = VPMOVZXBWYrm $rip, 1, $noreg, $rax, $noreg
683 $ymm0 = VPMOVZXBWZ256rm $rip, 1, $noreg, $rax, $noreg
684 ; CHECK: $ymm0 = VPMOVZXBWYrr $xmm0
685 $ymm0 = VPMOVZXBWZ256rr $xmm0
686 ; CHECK: $ymm0 = VPMOVZXDQYrm $rip, 1, $noreg, $rax, $noreg
687 $ymm0 = VPMOVZXDQZ256rm $rip, 1, $noreg, $rax, $noreg
688 ; CHECK: $ymm0 = VPMOVZXDQYrr $xmm0
689 $ymm0 = VPMOVZXDQZ256rr $xmm0
690 ; CHECK: $ymm0 = VPMOVZXWDYrm $rip, 1, $noreg, $rax, $noreg
691 $ymm0 = VPMOVZXWDZ256rm $rip, 1, $noreg, $rax, $noreg
692 ; CHECK: $ymm0 = VPMOVZXWDYrr $xmm0
693 $ymm0 = VPMOVZXWDZ256rr $xmm0
694 ; CHECK: $ymm0 = VPMOVZXWQYrm $rip, 1, $noreg, $rax, $noreg
695 $ymm0 = VPMOVZXWQZ256rm $rip, 1, $noreg, $rax, $noreg
696 ; CHECK: $ymm0 = VPMOVZXWQYrr $xmm0
697 $ymm0 = VPMOVZXWQZ256rr $xmm0
698 ; CHECK: $ymm0 = VBROADCASTF128 $rip, 1, $noreg, $rax, $noreg
699 $ymm0 = VBROADCASTF32X4Z256rm $rip, 1, $noreg, $rax, $noreg
700 ; CHECK: $ymm0 = VBROADCASTSDYrm $rip, 1, $noreg, $rax, $noreg
701 $ymm0 = VBROADCASTF32X2Z256m $rip, 1, $noreg, $rax, $noreg
702 ; CHECK: $ymm0 = VBROADCASTSDYrr $xmm0
703 $ymm0 = VBROADCASTF32X2Z256r $xmm0
704 ; CHECK: $ymm0 = VBROADCASTSDYrm $rip, 1, $noreg, $rax, $noreg
705 $ymm0 = VBROADCASTSDZ256m $rip, 1, $noreg, $rax, $noreg
706 ; CHECK: $ymm0 = VBROADCASTSDYrr $xmm0
707 $ymm0 = VBROADCASTSDZ256r $xmm0
708 ; CHECK: $ymm0 = VBROADCASTSSYrm $rip, 1, $noreg, $rax, $noreg
709 $ymm0 = VBROADCASTSSZ256m $rip, 1, $noreg, $rax, $noreg
710 ; CHECK: $ymm0 = VBROADCASTSSYrr $xmm0
711 $ymm0 = VBROADCASTSSZ256r $xmm0
712 ; CHECK: $ymm0 = VPBROADCASTBYrm $rip, 1, $noreg, $rax, $noreg
713 $ymm0 = VPBROADCASTBZ256m $rip, 1, $noreg, $rax, $noreg
714 ; CHECK: $ymm0 = VPBROADCASTBYrr $xmm0
715 $ymm0 = VPBROADCASTBZ256r $xmm0
716 ; CHECK: $ymm0 = VPBROADCASTDYrm $rip, 1, $noreg, $rax, $noreg
717 $ymm0 = VPBROADCASTDZ256m $rip, 1, $noreg, $rax, $noreg
718 ; CHECK: $ymm0 = VPBROADCASTDYrr $xmm0
719 $ymm0 = VPBROADCASTDZ256r $xmm0
720 ; CHECK: $ymm0 = VPBROADCASTWYrm $rip, 1, $noreg, $rax, $noreg
721 $ymm0 = VPBROADCASTWZ256m $rip, 1, $noreg, $rax, $noreg
722 ; CHECK: $ymm0 = VPBROADCASTWYrr $xmm0
723 $ymm0 = VPBROADCASTWZ256r $xmm0
724 ; CHECK: $ymm0 = VBROADCASTI128 $rip, 1, $noreg, $rax, $noreg
725 $ymm0 = VBROADCASTI32X4Z256rm $rip, 1, $noreg, $rax, $noreg
726 ; CHECK: $ymm0 = VPBROADCASTQYrm $rip, 1, $noreg, $rax, $noreg
727 $ymm0 = VBROADCASTI32X2Z256m $rip, 1, $noreg, $rax, $noreg
728 ; CHECK: $ymm0 = VPBROADCASTQYrr $xmm0
729 $ymm0 = VBROADCASTI32X2Z256r $xmm0
730 ; CHECK: $ymm0 = VPBROADCASTQYrm $rip, 1, $noreg, $rax, $noreg
731 $ymm0 = VPBROADCASTQZ256m $rip, 1, $noreg, $rax, $noreg
732 ; CHECK: $ymm0 = VPBROADCASTQYrr $xmm0
733 $ymm0 = VPBROADCASTQZ256r $xmm0
734 ; CHECK: $ymm0 = VPABSBYrm $rip, 1, $noreg, $rax, $noreg
735 $ymm0 = VPABSBZ256rm $rip, 1, $noreg, $rax, $noreg
736 ; CHECK: $ymm0 = VPABSBYrr $ymm0
737 $ymm0 = VPABSBZ256rr $ymm0
738 ; CHECK: $ymm0 = VPABSDYrm $rip, 1, $noreg, $rax, $noreg
739 $ymm0 = VPABSDZ256rm $rip, 1, $noreg, $rax, $noreg
740 ; CHECK: $ymm0 = VPABSDYrr $ymm0
741 $ymm0 = VPABSDZ256rr $ymm0
742 ; CHECK: $ymm0 = VPABSWYrm $rip, 1, $noreg, $rax, $noreg
743 $ymm0 = VPABSWZ256rm $rip, 1, $noreg, $rax, $noreg
744 ; CHECK: $ymm0 = VPABSWYrr $ymm0
745 $ymm0 = VPABSWZ256rr $ymm0
746 ; CHECK: $ymm0 = VPSADBWYrm $ymm0, 1, $noreg, $rax, $noreg, $noreg
747 $ymm0 = VPSADBWZ256rm $ymm0, 1, $noreg, $rax, $noreg, $noreg
748 ; CHECK: $ymm0 = VPSADBWYrr $ymm0, $ymm1
749 $ymm0 = VPSADBWZ256rr $ymm0, $ymm1
750 ; CHECK: $ymm0 = VPERMDYrm $ymm0, $rdi, 1, $noreg, 0, $noreg
751 $ymm0 = VPERMDZ256rm $ymm0, $rdi, 1, $noreg, 0, $noreg
752 ; CHECK: $ymm0 = VPERMDYrr $ymm1, $ymm0
753 $ymm0 = VPERMDZ256rr $ymm1, $ymm0
754 ; CHECK: $ymm0 = VPERMILPDYmi $rdi, 1, $noreg, 0, $noreg, $noreg
755 $ymm0 = VPERMILPDZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
756 ; CHECK: $ymm0 = VPERMILPDYri $ymm0, 7
757 $ymm0 = VPERMILPDZ256ri $ymm0, 7
758 ; CHECK: $ymm0 = VPERMILPDYrm $ymm0, $rdi, 1, $noreg, 0, $noreg
759 $ymm0 = VPERMILPDZ256rm $ymm0, $rdi, 1, $noreg, 0, $noreg
760 ; CHECK: $ymm0 = VPERMILPDYrr $ymm1, $ymm0
761 $ymm0 = VPERMILPDZ256rr $ymm1, $ymm0
762 ; CHECK: $ymm0 = VPERMILPSYmi $rdi, 1, $noreg, 0, $noreg, $noreg
763 $ymm0 = VPERMILPSZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
764 ; CHECK: $ymm0 = VPERMILPSYri $ymm0, 7
765 $ymm0 = VPERMILPSZ256ri $ymm0, 7
766 ; CHECK: $ymm0 = VPERMILPSYrm $ymm0, $rdi, 1, $noreg, 0, $noreg
767 $ymm0 = VPERMILPSZ256rm $ymm0, $rdi, 1, $noreg, 0, $noreg
768 ; CHECK: $ymm0 = VPERMILPSYrr $ymm1, $ymm0
769 $ymm0 = VPERMILPSZ256rr $ymm1, $ymm0
770 ; CHECK: $ymm0 = VPERMPDYmi $rdi, 1, $noreg, 0, $noreg, $noreg
771 $ymm0 = VPERMPDZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
772 ; CHECK: $ymm0 = VPERMPDYri $ymm0, 7
773 $ymm0 = VPERMPDZ256ri $ymm0, 7
774 ; CHECK: $ymm0 = VPERMPSYrm $ymm0, $rdi, 1, $noreg, 0, $noreg
775 $ymm0 = VPERMPSZ256rm $ymm0, $rdi, 1, $noreg, 0, $noreg
776 ; CHECK: $ymm0 = VPERMPSYrr $ymm1, $ymm0
777 $ymm0 = VPERMPSZ256rr $ymm1, $ymm0
778 ; CHECK: $ymm0 = VPERMQYmi $rdi, 1, $noreg, 0, $noreg, $noreg
779 $ymm0 = VPERMQZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
780 ; CHECK: $ymm0 = VPERMQYri $ymm0, 7
781 $ymm0 = VPERMQZ256ri $ymm0, 7
782 ; CHECK: $ymm0 = VPSLLDQYri $ymm0, 14
783 $ymm0 = VPSLLDQZ256rr $ymm0, 14
784 ; CHECK: $ymm0 = VPSLLDYri $ymm0, 7
785 $ymm0 = VPSLLDZ256ri $ymm0, 7
786 ; CHECK: $ymm0 = VPSLLDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
787 $ymm0 = VPSLLDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
788 ; CHECK: $ymm0 = VPSLLDYrr $ymm0, 14
789 $ymm0 = VPSLLDZ256rr $ymm0, 14
790 ; CHECK: $ymm0 = VPSLLQYri $ymm0, 7
791 $ymm0 = VPSLLQZ256ri $ymm0, 7
792 ; CHECK: $ymm0 = VPSLLQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
793 $ymm0 = VPSLLQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
794 ; CHECK: $ymm0 = VPSLLQYrr $ymm0, 14
795 $ymm0 = VPSLLQZ256rr $ymm0, 14
796 ; CHECK: $ymm0 = VPSLLVDYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
797 $ymm0 = VPSLLVDZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
798 ; CHECK: $ymm0 = VPSLLVDYrr $ymm0, 14
799 $ymm0 = VPSLLVDZ256rr $ymm0, 14
800 ; CHECK: $ymm0 = VPSLLVQYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
801 $ymm0 = VPSLLVQZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
802 ; CHECK: $ymm0 = VPSLLVQYrr $ymm0, 14
803 $ymm0 = VPSLLVQZ256rr $ymm0, 14
804 ; CHECK: $ymm0 = VPSLLWYri $ymm0, 7
805 $ymm0 = VPSLLWZ256ri $ymm0, 7
806 ; CHECK: $ymm0 = VPSLLWYrm $ymm0, $rip, 1, $noreg, $rax, $noreg
807 $ymm0 = VPSLLWZ256rm $ymm0, $rip, 1, $noreg, $rax, $noreg
808 ; CHECK: $ymm0 = VPSLLWYrr $ymm0, 14
809 $ymm0 = VPSLLWZ256rr $ymm0, 14
810 ; CHECK: $ymm0 = VCVTDQ2PDYrm $rdi, $ymm0, 1, $noreg, 0
811 $ymm0 = VCVTDQ2PDZ256rm $rdi, $ymm0, 1, $noreg, 0
812 ; CHECK: $ymm0 = VCVTDQ2PDYrr $xmm0
813 $ymm0 = VCVTDQ2PDZ256rr $xmm0
814 ; CHECK: $ymm0 = VCVTDQ2PSYrm $rdi, $ymm0, 1, $noreg, 0
815 $ymm0 = VCVTDQ2PSZ256rm $rdi, $ymm0, 1, $noreg, 0
816 ; CHECK: $ymm0 = VCVTDQ2PSYrr $ymm0
817 $ymm0 = VCVTDQ2PSZ256rr $ymm0
818 ; CHECK: $xmm0 = VCVTPD2DQYrm $rdi, $ymm0, 1, $noreg, 0
819 $xmm0 = VCVTPD2DQZ256rm $rdi, $ymm0, 1, $noreg, 0
820 ; CHECK: $xmm0 = VCVTPD2DQYrr $ymm0
821 $xmm0 = VCVTPD2DQZ256rr $ymm0
822 ; CHECK: $xmm0 = VCVTPD2PSYrm $rdi, $ymm0, 1, $noreg, 0
823 $xmm0 = VCVTPD2PSZ256rm $rdi, $ymm0, 1, $noreg, 0
824 ; CHECK: $xmm0 = VCVTPD2PSYrr $ymm0
825 $xmm0 = VCVTPD2PSZ256rr $ymm0
826 ; CHECK: $ymm0 = VCVTPS2DQYrm $rdi, $ymm0, 1, $noreg, 0
827 $ymm0 = VCVTPS2DQZ256rm $rdi, $ymm0, 1, $noreg, 0
828 ; CHECK: $ymm0 = VCVTPS2DQYrr $ymm0
829 $ymm0 = VCVTPS2DQZ256rr $ymm0
830 ; CHECK: $ymm0 = VCVTPS2PDYrm $rdi, $ymm0, 1, $noreg, 0
831 $ymm0 = VCVTPS2PDZ256rm $rdi, $ymm0, 1, $noreg, 0
832 ; CHECK: $ymm0 = VCVTPS2PDYrr $xmm0
833 $ymm0 = VCVTPS2PDZ256rr $xmm0
834 ; CHECK: VCVTPS2PHYmr $rdi, $ymm0, 1, $noreg, 0, $noreg, $noreg
835 VCVTPS2PHZ256mr $rdi, $ymm0, 1, $noreg, 0, $noreg, $noreg
836 ; CHECK: $xmm0 = VCVTPS2PHYrr $ymm0, $noreg
837 $xmm0 = VCVTPS2PHZ256rr $ymm0, $noreg
838 ; CHECK: $ymm0 = VCVTPH2PSYrm $rdi, $ymm0, 1, $noreg, 0
839 $ymm0 = VCVTPH2PSZ256rm $rdi, $ymm0, 1, $noreg, 0
840 ; CHECK: $ymm0 = VCVTPH2PSYrr $xmm0
841 $ymm0 = VCVTPH2PSZ256rr $xmm0
842 ; CHECK: $xmm0 = VCVTTPD2DQYrm $rdi, $ymm0, 1, $noreg, 0
843 $xmm0 = VCVTTPD2DQZ256rm $rdi, $ymm0, 1, $noreg, 0
844 ; CHECK: $xmm0 = VCVTTPD2DQYrr $ymm0
845 $xmm0 = VCVTTPD2DQZ256rr $ymm0
846 ; CHECK: $ymm0 = VCVTTPS2DQYrm $rdi, $ymm0, 1, $noreg, 0
847 $ymm0 = VCVTTPS2DQZ256rm $rdi, $ymm0, 1, $noreg, 0
848 ; CHECK: $ymm0 = VCVTTPS2DQYrr $ymm0
849 $ymm0 = VCVTTPS2DQZ256rr $ymm0
850 ; CHECK: $ymm0 = VSQRTPDYm $rdi, $noreg, $noreg, $noreg, $noreg
851 $ymm0 = VSQRTPDZ256m $rdi, $noreg, $noreg, $noreg, $noreg
852 ; CHECK: $ymm0 = VSQRTPDYr $ymm0
853 $ymm0 = VSQRTPDZ256r $ymm0
854 ; CHECK: $ymm0 = VSQRTPSYm $rdi, $noreg, $noreg, $noreg, $noreg
855 $ymm0 = VSQRTPSZ256m $rdi, $noreg, $noreg, $noreg, $noreg
856 ; CHECK: $ymm0 = VSQRTPSYr $ymm0
857 $ymm0 = VSQRTPSZ256r $ymm0
858 ; CHECK: $ymm0 = VPALIGNRYrmi $ymm0, $rdi, $noreg, $noreg, $noreg, $noreg, $noreg
859 $ymm0 = VPALIGNRZ256rmi $ymm0, $rdi, $noreg, $noreg, $noreg, $noreg, $noreg
860 ; CHECK: $ymm0 = VPALIGNRYrri $ymm0, $ymm1, $noreg
861 $ymm0 = VPALIGNRZ256rri $ymm0, $ymm1, $noreg
862 ; CHECK: $ymm0 = VMOVUPSYrm $rdi, 1, $noreg, 0, $noreg
863 $ymm0 = VMOVUPSZ256rm $rdi, 1, $noreg, 0, $noreg
864 ; CHECK: $ymm0 = VMOVUPSYrr $ymm0
865 $ymm0 = VMOVUPSZ256rr $ymm0
866 ; CHECK: $ymm0 = VMOVUPSYrr_REV $ymm0
867 $ymm0 = VMOVUPSZ256rr_REV $ymm0
868 ; CHECK: $ymm0 = VPSHUFBYrm $ymm0, $noreg, $noreg, $noreg, $noreg, $noreg
869 $ymm0 = VPSHUFBZ256rm $ymm0, $noreg, $noreg, $noreg, $noreg, $noreg
870 ; CHECK: $ymm0 = VPSHUFBYrr $ymm0, $ymm1
871 $ymm0 = VPSHUFBZ256rr $ymm0, $ymm1
872 ; CHECK: $ymm0 = VPSHUFDYmi $rdi, 1, $noreg, 0, $noreg, $noreg
873 $ymm0 = VPSHUFDZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
874 ; CHECK: $ymm0 = VPSHUFDYri $ymm0, -24
875 $ymm0 = VPSHUFDZ256ri $ymm0, -24
876 ; CHECK: $ymm0 = VPSHUFHWYmi $rdi, 1, $noreg, 0, $noreg, $noreg
877 $ymm0 = VPSHUFHWZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
878 ; CHECK: $ymm0 = VPSHUFHWYri $ymm0, -24
879 $ymm0 = VPSHUFHWZ256ri $ymm0, -24
880 ; CHECK: $ymm0 = VPSHUFLWYmi $rdi, 1, $noreg, 0, $noreg, $noreg
881 $ymm0 = VPSHUFLWZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
882 ; CHECK: $ymm0 = VPSHUFLWYri $ymm0, -24
883 $ymm0 = VPSHUFLWZ256ri $ymm0, -24
884 ; CHECK: $ymm0 = VSHUFPDYrmi $ymm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
885 $ymm0 = VSHUFPDZ256rmi $ymm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
886 ; CHECK: $ymm0 = VSHUFPDYrri $ymm0, $noreg, $noreg
887 $ymm0 = VSHUFPDZ256rri $ymm0, $noreg, $noreg
888 ; CHECK: $ymm0 = VSHUFPSYrmi $ymm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
889 $ymm0 = VSHUFPSZ256rmi $ymm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
890 ; CHECK: $ymm0 = VSHUFPSYrri $ymm0, $noreg, $noreg
891 $ymm0 = VSHUFPSZ256rri $ymm0, $noreg, $noreg
893 RET 0, $zmm0, $zmm1
894 ...
895 ---
896 # CHECK-LABEL: name: evex_z128_to_vex_test
897 # CHECK: bb.0:
899 name: evex_z128_to_vex_test
900 body: |
901 bb.0:
902 ; CHECK: VMOVAPDmr $rdi, 1, $noreg, 0, $noreg, $xmm0
903 VMOVAPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
904 ; CHECK: $xmm0 = VMOVAPDrm $rip, 1, $noreg, $rax, $noreg
905 $xmm0 = VMOVAPDZ128rm $rip, 1, $noreg, $rax, $noreg
906 ; CHECK: $xmm0 = VMOVAPDrr $xmm0
907 $xmm0 = VMOVAPDZ128rr $xmm0
908 ; CHECK: VMOVAPSmr $rdi, 1, $noreg, 0, $noreg, $xmm0
909 VMOVAPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
910 ; CHECK: $xmm0 = VMOVAPSrm $rip, 1, $noreg, $rax, $noreg
911 $xmm0 = VMOVAPSZ128rm $rip, 1, $noreg, $rax, $noreg
912 ; CHECK: $xmm0 = VMOVAPSrr $xmm0
913 $xmm0 = VMOVAPSZ128rr $xmm0
914 ; CHECK: VMOVDQAmr $rdi, 1, $noreg, 0, $noreg, $xmm0
915 VMOVDQA32Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
916 ; CHECK: $xmm0 = VMOVDQArm $rip, 1, $noreg, $rax, $noreg
917 $xmm0 = VMOVDQA32Z128rm $rip, 1, $noreg, $rax, $noreg
918 ; CHECK: $xmm0 = VMOVDQArr $xmm0
919 $xmm0 = VMOVDQA32Z128rr $xmm0
920 ; CHECK: VMOVDQAmr $rdi, 1, $noreg, 0, $noreg, $xmm0
921 VMOVDQA64Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
922 ; CHECK: $xmm0 = VMOVDQArm $rip, 1, $noreg, $rax, $noreg
923 $xmm0 = VMOVDQA64Z128rm $rip, 1, $noreg, $rax, $noreg
924 ; CHECK: $xmm0 = VMOVDQArr $xmm0
925 $xmm0 = VMOVDQA64Z128rr $xmm0
926 ; CHECK: VMOVDQUmr $rdi, 1, $noreg, 0, $noreg, $xmm0
927 VMOVDQU16Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
928 ; CHECK: $xmm0 = VMOVDQUrm $rip, 1, $noreg, $rax, $noreg
929 $xmm0 = VMOVDQU16Z128rm $rip, 1, $noreg, $rax, $noreg
930 ; CHECK: $xmm0 = VMOVDQUrr $xmm0
931 $xmm0 = VMOVDQU16Z128rr $xmm0
932 ; CHECK: VMOVDQUmr $rdi, 1, $noreg, 0, $noreg, $xmm0
933 VMOVDQU32Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
934 ; CHECK: $xmm0 = VMOVDQUrm $rip, 1, $noreg, $rax, $noreg
935 $xmm0 = VMOVDQU32Z128rm $rip, 1, $noreg, $rax, $noreg
936 ; CHECK: $xmm0 = VMOVDQUrr $xmm0
937 $xmm0 = VMOVDQU32Z128rr $xmm0
938 ; CHECK: VMOVDQUmr $rdi, 1, $noreg, 0, $noreg, $xmm0
939 VMOVDQU64Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
940 ; CHECK: $xmm0 = VMOVDQUrm $rip, 1, $noreg, $rax, $noreg
941 $xmm0 = VMOVDQU64Z128rm $rip, 1, $noreg, $rax, $noreg
942 ; CHECK: $xmm0 = VMOVDQUrr $xmm0
943 $xmm0 = VMOVDQU64Z128rr $xmm0
944 ; CHECK: VMOVDQUmr $rdi, 1, $noreg, 0, $noreg, $xmm0
945 VMOVDQU8Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
946 ; CHECK: $xmm0 = VMOVDQUrm $rip, 1, $noreg, $rax, $noreg
947 $xmm0 = VMOVDQU8Z128rm $rip, 1, $noreg, $rax, $noreg
948 ; CHECK: $xmm0 = VMOVDQUrr $xmm0
949 $xmm0 = VMOVDQU8Z128rr $xmm0
950 ; CHECK: $xmm0 = VMOVDQUrr_REV $xmm0
951 $xmm0 = VMOVDQU8Z128rr_REV $xmm0
952 ; CHECK: $xmm0 = VMOVNTDQArm $rip, 1, $noreg, $rax, $noreg
953 $xmm0 = VMOVNTDQAZ128rm $rip, 1, $noreg, $rax, $noreg
954 ; CHECK: VMOVUPDmr $rdi, 1, $noreg, 0, $noreg, $xmm0
955 VMOVUPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
956 ; CHECK: $xmm0 = VMOVUPDrm $rip, 1, $noreg, $rax, $noreg
957 $xmm0 = VMOVUPDZ128rm $rip, 1, $noreg, $rax, $noreg
958 ; CHECK: $xmm0 = VMOVUPDrr $xmm0
959 $xmm0 = VMOVUPDZ128rr $xmm0
960 ; CHECK: $xmm0 = VMOVUPDrr_REV $xmm0
961 $xmm0 = VMOVUPDZ128rr_REV $xmm0
962 ; CHECK: VMOVUPSmr $rdi, 1, $noreg, 0, $noreg, $xmm0
963 VMOVUPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
964 ; CHECK: $xmm0 = VMOVUPSrm $rip, 1, $noreg, $rax, $noreg
965 $xmm0 = VMOVUPSZ128rm $rip, 1, $noreg, $rax, $noreg
966 ; CHECK: $xmm0 = VMOVUPSrr $xmm0
967 $xmm0 = VMOVUPSZ128rr $xmm0
968 ; CHECK: $xmm0 = VMOVUPSrr_REV $xmm0
969 $xmm0 = VMOVUPSZ128rr_REV $xmm0
970 ; CHECK: VMOVNTDQmr $rdi, 1, $noreg, 0, $noreg, $xmm0
971 VMOVNTDQZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
972 ; CHECK: VMOVNTPDmr $rdi, 1, $noreg, 0, $noreg, $xmm0
973 VMOVNTPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
974 ; CHECK: VMOVNTPSmr $rdi, 1, $noreg, 0, $noreg, $xmm0
975 VMOVNTPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
976 ; CHECK: $xmm0 = VMOVAPDrr_REV $xmm0
977 $xmm0 = VMOVAPDZ128rr_REV $xmm0
978 ; CHECK: $xmm0 = VMOVAPSrr_REV $xmm0
979 $xmm0 = VMOVAPSZ128rr_REV $xmm0
980 ; CHECK: $xmm0 = VMOVDQArr_REV $xmm0
981 $xmm0 = VMOVDQA32Z128rr_REV $xmm0
982 ; CHECK: $xmm0 = VMOVDQArr_REV $xmm0
983 $xmm0 = VMOVDQA64Z128rr_REV $xmm0
984 ; CHECK: $xmm0 = VMOVDQUrr_REV $xmm0
985 $xmm0 = VMOVDQU16Z128rr_REV $xmm0
986 ; CHECK: $xmm0 = VMOVDQUrr_REV $xmm0
987 $xmm0 = VMOVDQU32Z128rr_REV $xmm0
988 ; CHECK: $xmm0 = VMOVDQUrr_REV $xmm0
989 $xmm0 = VMOVDQU64Z128rr_REV $xmm0
990 ; CHECK: $xmm0 = VPMOVSXBDrm $rip, 1, $noreg, $rax, $noreg
991 $xmm0 = VPMOVSXBDZ128rm $rip, 1, $noreg, $rax, $noreg
992 ; CHECK: $xmm0 = VPMOVSXBDrr $xmm0
993 $xmm0 = VPMOVSXBDZ128rr $xmm0
994 ; CHECK: $xmm0 = VPMOVSXBQrm $rip, 1, $noreg, $rax, $noreg
995 $xmm0 = VPMOVSXBQZ128rm $rip, 1, $noreg, $rax, $noreg
996 ; CHECK: $xmm0 = VPMOVSXBQrr $xmm0
997 $xmm0 = VPMOVSXBQZ128rr $xmm0
998 ; CHECK: $xmm0 = VPMOVSXBWrm $rip, 1, $noreg, $rax, $noreg
999 $xmm0 = VPMOVSXBWZ128rm $rip, 1, $noreg, $rax, $noreg
1000 ; CHECK: $xmm0 = VPMOVSXBWrr $xmm0
1001 $xmm0 = VPMOVSXBWZ128rr $xmm0
1002 ; CHECK: $xmm0 = VPMOVSXDQrm $rip, 1, $noreg, $rax, $noreg
1003 $xmm0 = VPMOVSXDQZ128rm $rip, 1, $noreg, $rax, $noreg
1004 ; CHECK: $xmm0 = VPMOVSXDQrr $xmm0
1005 $xmm0 = VPMOVSXDQZ128rr $xmm0
1006 ; CHECK: $xmm0 = VPMOVSXWDrm $rip, 1, $noreg, $rax, $noreg
1007 $xmm0 = VPMOVSXWDZ128rm $rip, 1, $noreg, $rax, $noreg
1008 ; CHECK: $xmm0 = VPMOVSXWDrr $xmm0
1009 $xmm0 = VPMOVSXWDZ128rr $xmm0
1010 ; CHECK: $xmm0 = VPMOVSXWQrm $rip, 1, $noreg, $rax, $noreg
1011 $xmm0 = VPMOVSXWQZ128rm $rip, 1, $noreg, $rax, $noreg
1012 ; CHECK: $xmm0 = VPMOVSXWQrr $xmm0
1013 $xmm0 = VPMOVSXWQZ128rr $xmm0
1014 ; CHECK: $xmm0 = VPMOVZXBDrm $rip, 1, $noreg, $rax, $noreg
1015 $xmm0 = VPMOVZXBDZ128rm $rip, 1, $noreg, $rax, $noreg
1016 ; CHECK: $xmm0 = VPMOVZXBDrr $xmm0
1017 $xmm0 = VPMOVZXBDZ128rr $xmm0
1018 ; CHECK: $xmm0 = VPMOVZXBQrm $rip, 1, $noreg, $rax, $noreg
1019 $xmm0 = VPMOVZXBQZ128rm $rip, 1, $noreg, $rax, $noreg
1020 ; CHECK: $xmm0 = VPMOVZXBQrr $xmm0
1021 $xmm0 = VPMOVZXBQZ128rr $xmm0
1022 ; CHECK: $xmm0 = VPMOVZXBWrm $rip, 1, $noreg, $rax, $noreg
1023 $xmm0 = VPMOVZXBWZ128rm $rip, 1, $noreg, $rax, $noreg
1024 ; CHECK: $xmm0 = VPMOVZXBWrr $xmm0
1025 $xmm0 = VPMOVZXBWZ128rr $xmm0
1026 ; CHECK: $xmm0 = VPMOVZXDQrm $rip, 1, $noreg, $rax, $noreg
1027 $xmm0 = VPMOVZXDQZ128rm $rip, 1, $noreg, $rax, $noreg
1028 ; CHECK: $xmm0 = VPMOVZXDQrr $xmm0
1029 $xmm0 = VPMOVZXDQZ128rr $xmm0
1030 ; CHECK: $xmm0 = VPMOVZXWDrm $rip, 1, $noreg, $rax, $noreg
1031 $xmm0 = VPMOVZXWDZ128rm $rip, 1, $noreg, $rax, $noreg
1032 ; CHECK: $xmm0 = VPMOVZXWDrr $xmm0
1033 $xmm0 = VPMOVZXWDZ128rr $xmm0
1034 ; CHECK: $xmm0 = VPMOVZXWQrm $rip, 1, $noreg, $rax, $noreg
1035 $xmm0 = VPMOVZXWQZ128rm $rip, 1, $noreg, $rax, $noreg
1036 ; CHECK: $xmm0 = VPMOVZXWQrr $xmm0
1037 $xmm0 = VPMOVZXWQZ128rr $xmm0
1038 ; CHECK: VMOVHPDmr $rdi, 1, $noreg, 0, $noreg, $xmm0
1039 VMOVHPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
1040 ; CHECK: $xmm0 = VMOVHPDrm $xmm0, $rdi, 1, $noreg, 0, $noreg
1041 $xmm0 = VMOVHPDZ128rm $xmm0, $rdi, 1, $noreg, 0, $noreg
1042 ; CHECK: VMOVHPSmr $rdi, 1, $noreg, 0, $noreg, $xmm0
1043 VMOVHPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
1044 ; CHECK: $xmm0 = VMOVHPSrm $xmm0, $rdi, 1, $noreg, 0, $noreg
1045 $xmm0 = VMOVHPSZ128rm $xmm0, $rdi, 1, $noreg, 0, $noreg
1046 ; CHECK: VMOVLPDmr $rdi, 1, $noreg, 0, $noreg, $xmm0
1047 VMOVLPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
1048 ; CHECK: $xmm0 = VMOVLPDrm $xmm0, $rdi, 1, $noreg, 0, $noreg
1049 $xmm0 = VMOVLPDZ128rm $xmm0, $rdi, 1, $noreg, 0, $noreg
1050 ; CHECK: VMOVLPSmr $rdi, 1, $noreg, 0, $noreg, $xmm0
1051 VMOVLPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm0
1052 ; CHECK: $xmm0 = VMOVLPSrm $xmm0, $rdi, 1, $noreg, 0, $noreg
1053 $xmm0 = VMOVLPSZ128rm $xmm0, $rdi, 1, $noreg, 0, $noreg
1054 ; CHECK: $xmm0 = VMAXCPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1055 $xmm0 = VMAXCPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1056 ; CHECK: $xmm0 = VMAXCPDrr $xmm0, $xmm1
1057 $xmm0 = VMAXCPDZ128rr $xmm0, $xmm1
1058 ; CHECK: $xmm0 = VMAXCPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1059 $xmm0 = VMAXCPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1060 ; CHECK: $xmm0 = VMAXCPSrr $xmm0, $xmm1
1061 $xmm0 = VMAXCPSZ128rr $xmm0, $xmm1
1062 ; CHECK: $xmm0 = VMAXCPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1063 $xmm0 = VMAXPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1064 ; CHECK: $xmm0 = VMAXCPDrr $xmm0, $xmm1
1065 $xmm0 = VMAXPDZ128rr $xmm0, $xmm1
1066 ; CHECK: $xmm0 = VMAXCPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1067 $xmm0 = VMAXPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1068 ; CHECK: $xmm0 = VMAXCPSrr $xmm0, $xmm1
1069 $xmm0 = VMAXPSZ128rr $xmm0, $xmm1
1070 ; CHECK: $xmm0 = VMINCPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1071 $xmm0 = VMINCPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1072 ; CHECK: $xmm0 = VMINCPDrr $xmm0, $xmm1
1073 $xmm0 = VMINCPDZ128rr $xmm0, $xmm1
1074 ; CHECK: $xmm0 = VMINCPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1075 $xmm0 = VMINCPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1076 ; CHECK: $xmm0 = VMINCPSrr $xmm0, $xmm1
1077 $xmm0 = VMINCPSZ128rr $xmm0, $xmm1
1078 ; CHECK: $xmm0 = VMINCPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1079 $xmm0 = VMINPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1080 ; CHECK: $xmm0 = VMINCPDrr $xmm0, $xmm1
1081 $xmm0 = VMINPDZ128rr $xmm0, $xmm1
1082 ; CHECK: $xmm0 = VMINCPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1083 $xmm0 = VMINPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1084 ; CHECK: $xmm0 = VMINCPSrr $xmm0, $xmm1
1085 $xmm0 = VMINPSZ128rr $xmm0, $xmm1
1086 ; CHECK: $xmm0 = VMULPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1087 $xmm0 = VMULPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1088 ; CHECK: $xmm0 = VMULPDrr $xmm0, $xmm1
1089 $xmm0 = VMULPDZ128rr $xmm0, $xmm1
1090 ; CHECK: $xmm0 = VMULPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1091 $xmm0 = VMULPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1092 ; CHECK: $xmm0 = VMULPSrr $xmm0, $xmm1
1093 $xmm0 = VMULPSZ128rr $xmm0, $xmm1
1094 ; CHECK: $xmm0 = VORPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1095 $xmm0 = VORPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1096 ; CHECK: $xmm0 = VORPDrr $xmm0, $xmm1
1097 $xmm0 = VORPDZ128rr $xmm0, $xmm1
1098 ; CHECK: $xmm0 = VORPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1099 $xmm0 = VORPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1100 ; CHECK: $xmm0 = VORPSrr $xmm0, $xmm1
1101 $xmm0 = VORPSZ128rr $xmm0, $xmm1
1102 ; CHECK: $xmm0 = VPADDBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1103 $xmm0 = VPADDBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1104 ; CHECK: $xmm0 = VPADDBrr $xmm0, $xmm1
1105 $xmm0 = VPADDBZ128rr $xmm0, $xmm1
1106 ; CHECK: $xmm0 = VPADDDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1107 $xmm0 = VPADDDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1108 ; CHECK: $xmm0 = VPADDDrr $xmm0, $xmm1
1109 $xmm0 = VPADDDZ128rr $xmm0, $xmm1
1110 ; CHECK: $xmm0 = VPADDQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1111 $xmm0 = VPADDQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1112 ; CHECK: $xmm0 = VPADDQrr $xmm0, $xmm1
1113 $xmm0 = VPADDQZ128rr $xmm0, $xmm1
1114 ; CHECK: $xmm0 = VPADDSBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1115 $xmm0 = VPADDSBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1116 ; CHECK: $xmm0 = VPADDSBrr $xmm0, $xmm1
1117 $xmm0 = VPADDSBZ128rr $xmm0, $xmm1
1118 ; CHECK: $xmm0 = VPADDSWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1119 $xmm0 = VPADDSWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1120 ; CHECK: $xmm0 = VPADDSWrr $xmm0, $xmm1
1121 $xmm0 = VPADDSWZ128rr $xmm0, $xmm1
1122 ; CHECK: $xmm0 = VPADDUSBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1123 $xmm0 = VPADDUSBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1124 ; CHECK: $xmm0 = VPADDUSBrr $xmm0, $xmm1
1125 $xmm0 = VPADDUSBZ128rr $xmm0, $xmm1
1126 ; CHECK: $xmm0 = VPADDUSWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1127 $xmm0 = VPADDUSWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1128 ; CHECK: $xmm0 = VPADDUSWrr $xmm0, $xmm1
1129 $xmm0 = VPADDUSWZ128rr $xmm0, $xmm1
1130 ; CHECK: $xmm0 = VPADDWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1131 $xmm0 = VPADDWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1132 ; CHECK: $xmm0 = VPADDWrr $xmm0, $xmm1
1133 $xmm0 = VPADDWZ128rr $xmm0, $xmm1
1134 ; CHECK: $xmm0 = VPANDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1135 $xmm0 = VPANDDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1136 ; CHECK: $xmm0 = VPANDrr $xmm0, $xmm1
1137 $xmm0 = VPANDDZ128rr $xmm0, $xmm1
1138 ; CHECK: $xmm0 = VPANDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1139 $xmm0 = VPANDQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1140 ; CHECK: $xmm0 = VPANDrr $xmm0, $xmm1
1141 $xmm0 = VPANDQZ128rr $xmm0, $xmm1
1142 ; CHECK: $xmm0 = VPANDNrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1143 $xmm0 = VPANDNDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1144 ; CHECK: $xmm0 = VPANDNrr $xmm0, $xmm1
1145 $xmm0 = VPANDNDZ128rr $xmm0, $xmm1
1146 ; CHECK: $xmm0 = VPANDNrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1147 $xmm0 = VPANDNQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1148 ; CHECK: $xmm0 = VPANDNrr $xmm0, $xmm1
1149 $xmm0 = VPANDNQZ128rr $xmm0, $xmm1
1150 ; CHECK: $xmm0 = VPAVGBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1151 $xmm0 = VPAVGBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1152 ; CHECK: $xmm0 = VPAVGBrr $xmm0, $xmm1
1153 $xmm0 = VPAVGBZ128rr $xmm0, $xmm1
1154 ; CHECK: $xmm0 = VPAVGWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1155 $xmm0 = VPAVGWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1156 ; CHECK: $xmm0 = VPAVGWrr $xmm0, $xmm1
1157 $xmm0 = VPAVGWZ128rr $xmm0, $xmm1
1158 ; CHECK: $xmm0 = VPMAXSBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1159 $xmm0 = VPMAXSBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1160 ; CHECK: $xmm0 = VPMAXSBrr $xmm0, $xmm1
1161 $xmm0 = VPMAXSBZ128rr $xmm0, $xmm1
1162 ; CHECK: $xmm0 = VPMAXSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1163 $xmm0 = VPMAXSDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1164 ; CHECK: $xmm0 = VPMAXSDrr $xmm0, $xmm1
1165 $xmm0 = VPMAXSDZ128rr $xmm0, $xmm1
1166 ; CHECK: $xmm0 = VPMAXSWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1167 $xmm0 = VPMAXSWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1168 ; CHECK: $xmm0 = VPMAXSWrr $xmm0, $xmm1
1169 $xmm0 = VPMAXSWZ128rr $xmm0, $xmm1
1170 ; CHECK: $xmm0 = VPMAXUBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1171 $xmm0 = VPMAXUBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1172 ; CHECK: $xmm0 = VPMAXUBrr $xmm0, $xmm1
1173 $xmm0 = VPMAXUBZ128rr $xmm0, $xmm1
1174 ; CHECK: $xmm0 = VPMAXUDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1175 $xmm0 = VPMAXUDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1176 ; CHECK: $xmm0 = VPMAXUDrr $xmm0, $xmm1
1177 $xmm0 = VPMAXUDZ128rr $xmm0, $xmm1
1178 ; CHECK: $xmm0 = VPMAXUWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1179 $xmm0 = VPMAXUWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1180 ; CHECK: $xmm0 = VPMAXUWrr $xmm0, $xmm1
1181 $xmm0 = VPMAXUWZ128rr $xmm0, $xmm1
1182 ; CHECK: $xmm0 = VPMINSBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1183 $xmm0 = VPMINSBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1184 ; CHECK: $xmm0 = VPMINSBrr $xmm0, $xmm1
1185 $xmm0 = VPMINSBZ128rr $xmm0, $xmm1
1186 ; CHECK: $xmm0 = VPMINSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1187 $xmm0 = VPMINSDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1188 ; CHECK: $xmm0 = VPMINSDrr $xmm0, $xmm1
1189 $xmm0 = VPMINSDZ128rr $xmm0, $xmm1
1190 ; CHECK: $xmm0 = VPMINSWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1191 $xmm0 = VPMINSWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1192 ; CHECK: $xmm0 = VPMINSWrr $xmm0, $xmm1
1193 $xmm0 = VPMINSWZ128rr $xmm0, $xmm1
1194 ; CHECK: $xmm0 = VPMINUBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1195 $xmm0 = VPMINUBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1196 ; CHECK: $xmm0 = VPMINUBrr $xmm0, $xmm1
1197 $xmm0 = VPMINUBZ128rr $xmm0, $xmm1
1198 ; CHECK: $xmm0 = VPMINUDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1199 $xmm0 = VPMINUDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1200 ; CHECK: $xmm0 = VPMINUDrr $xmm0, $xmm1
1201 $xmm0 = VPMINUDZ128rr $xmm0, $xmm1
1202 ; CHECK: $xmm0 = VPMINUWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1203 $xmm0 = VPMINUWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1204 ; CHECK: $xmm0 = VPMINUWrr $xmm0, $xmm1
1205 $xmm0 = VPMINUWZ128rr $xmm0, $xmm1
1206 ; CHECK: $xmm0 = VPMULDQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1207 $xmm0 = VPMULDQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1208 ; CHECK: $xmm0 = VPMULDQrr $xmm0, $xmm1
1209 $xmm0 = VPMULDQZ128rr $xmm0, $xmm1
1210 ; CHECK: $xmm0 = VPMULHRSWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1211 $xmm0 = VPMULHRSWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1212 ; CHECK: $xmm0 = VPMULHRSWrr $xmm0, $xmm1
1213 $xmm0 = VPMULHRSWZ128rr $xmm0, $xmm1
1214 ; CHECK: $xmm0 = VPMULHUWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1215 $xmm0 = VPMULHUWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1216 ; CHECK: $xmm0 = VPMULHUWrr $xmm0, $xmm1
1217 $xmm0 = VPMULHUWZ128rr $xmm0, $xmm1
1218 ; CHECK: $xmm0 = VPMULHWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1219 $xmm0 = VPMULHWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1220 ; CHECK: $xmm0 = VPMULHWrr $xmm0, $xmm1
1221 $xmm0 = VPMULHWZ128rr $xmm0, $xmm1
1222 ; CHECK: $xmm0 = VPMULLDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1223 $xmm0 = VPMULLDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1224 ; CHECK: $xmm0 = VPMULLDrr $xmm0, $xmm1
1225 $xmm0 = VPMULLDZ128rr $xmm0, $xmm1
1226 ; CHECK: $xmm0 = VPMULLWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1227 $xmm0 = VPMULLWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1228 ; CHECK: $xmm0 = VPMULLWrr $xmm0, $xmm1
1229 $xmm0 = VPMULLWZ128rr $xmm0, $xmm1
1230 ; CHECK: $xmm0 = VPMULUDQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1231 $xmm0 = VPMULUDQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1232 ; CHECK: $xmm0 = VPMULUDQrr $xmm0, $xmm1
1233 $xmm0 = VPMULUDQZ128rr $xmm0, $xmm1
1234 ; CHECK: $xmm0 = VPORrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1235 $xmm0 = VPORDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1236 ; CHECK: $xmm0 = VPORrr $xmm0, $xmm1
1237 $xmm0 = VPORDZ128rr $xmm0, $xmm1
1238 ; CHECK: $xmm0 = VPORrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1239 $xmm0 = VPORQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1240 ; CHECK: $xmm0 = VPORrr $xmm0, $xmm1
1241 $xmm0 = VPORQZ128rr $xmm0, $xmm1
1242 ; CHECK: $xmm0 = VPSUBBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1243 $xmm0 = VPSUBBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1244 ; CHECK: $xmm0 = VPSUBBrr $xmm0, $xmm1
1245 $xmm0 = VPSUBBZ128rr $xmm0, $xmm1
1246 ; CHECK: $xmm0 = VPSUBDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1247 $xmm0 = VPSUBDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1248 ; CHECK: $xmm0 = VPSUBDrr $xmm0, $xmm1
1249 $xmm0 = VPSUBDZ128rr $xmm0, $xmm1
1250 ; CHECK: $xmm0 = VPSUBQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1251 $xmm0 = VPSUBQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1252 ; CHECK: $xmm0 = VPSUBQrr $xmm0, $xmm1
1253 $xmm0 = VPSUBQZ128rr $xmm0, $xmm1
1254 ; CHECK: $xmm0 = VPSUBSBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1255 $xmm0 = VPSUBSBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1256 ; CHECK: $xmm0 = VPSUBSBrr $xmm0, $xmm1
1257 $xmm0 = VPSUBSBZ128rr $xmm0, $xmm1
1258 ; CHECK: $xmm0 = VPSUBSWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1259 $xmm0 = VPSUBSWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1260 ; CHECK: $xmm0 = VPSUBSWrr $xmm0, $xmm1
1261 $xmm0 = VPSUBSWZ128rr $xmm0, $xmm1
1262 ; CHECK: $xmm0 = VPSUBUSBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1263 $xmm0 = VPSUBUSBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1264 ; CHECK: $xmm0 = VPSUBUSBrr $xmm0, $xmm1
1265 $xmm0 = VPSUBUSBZ128rr $xmm0, $xmm1
1266 ; CHECK: $xmm0 = VPSUBUSWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1267 $xmm0 = VPSUBUSWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1268 ; CHECK: $xmm0 = VPSUBUSWrr $xmm0, $xmm1
1269 $xmm0 = VPSUBUSWZ128rr $xmm0, $xmm1
1270 ; CHECK: $xmm0 = VPSUBWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1271 $xmm0 = VPSUBWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1272 ; CHECK: $xmm0 = VPSUBWrr $xmm0, $xmm1
1273 $xmm0 = VPSUBWZ128rr $xmm0, $xmm1
1274 ; CHECK: $xmm0 = VADDPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1275 $xmm0 = VADDPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1276 ; CHECK: $xmm0 = VADDPDrr $xmm0, $xmm1
1277 $xmm0 = VADDPDZ128rr $xmm0, $xmm1
1278 ; CHECK: $xmm0 = VADDPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1279 $xmm0 = VADDPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1280 ; CHECK: $xmm0 = VADDPSrr $xmm0, $xmm1
1281 $xmm0 = VADDPSZ128rr $xmm0, $xmm1
1282 ; CHECK: $xmm0 = VANDNPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1283 $xmm0 = VANDNPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1284 ; CHECK: $xmm0 = VANDNPDrr $xmm0, $xmm1
1285 $xmm0 = VANDNPDZ128rr $xmm0, $xmm1
1286 ; CHECK: $xmm0 = VANDNPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1287 $xmm0 = VANDNPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1288 ; CHECK: $xmm0 = VANDNPSrr $xmm0, $xmm1
1289 $xmm0 = VANDNPSZ128rr $xmm0, $xmm1
1290 ; CHECK: $xmm0 = VANDPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1291 $xmm0 = VANDPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1292 ; CHECK: $xmm0 = VANDPDrr $xmm0, $xmm1
1293 $xmm0 = VANDPDZ128rr $xmm0, $xmm1
1294 ; CHECK: $xmm0 = VANDPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1295 $xmm0 = VANDPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1296 ; CHECK: $xmm0 = VANDPSrr $xmm0, $xmm1
1297 $xmm0 = VANDPSZ128rr $xmm0, $xmm1
1298 ; CHECK: $xmm0 = VDIVPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1299 $xmm0 = VDIVPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1300 ; CHECK: $xmm0 = VDIVPDrr $xmm0, $xmm1
1301 $xmm0 = VDIVPDZ128rr $xmm0, $xmm1
1302 ; CHECK: $xmm0 = VDIVPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1303 $xmm0 = VDIVPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1304 ; CHECK: $xmm0 = VDIVPSrr $xmm0, $xmm1
1305 $xmm0 = VDIVPSZ128rr $xmm0, $xmm1
1306 ; CHECK: $xmm0 = VPXORrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1307 $xmm0 = VPXORDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1308 ; CHECK: $xmm0 = VPXORrr $xmm0, $xmm1
1309 $xmm0 = VPXORDZ128rr $xmm0, $xmm1
1310 ; CHECK: $xmm0 = VPXORrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1311 $xmm0 = VPXORQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1312 ; CHECK: $xmm0 = VPXORrr $xmm0, $xmm1
1313 $xmm0 = VPXORQZ128rr $xmm0, $xmm1
1314 ; CHECK: $xmm0 = VSUBPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1315 $xmm0 = VSUBPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1316 ; CHECK: $xmm0 = VSUBPDrr $xmm0, $xmm1
1317 $xmm0 = VSUBPDZ128rr $xmm0, $xmm1
1318 ; CHECK: $xmm0 = VSUBPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1319 $xmm0 = VSUBPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1320 ; CHECK: $xmm0 = VSUBPSrr $xmm0, $xmm1
1321 $xmm0 = VSUBPSZ128rr $xmm0, $xmm1
1322 ; CHECK: $xmm0 = VXORPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1323 $xmm0 = VXORPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1324 ; CHECK: $xmm0 = VXORPDrr $xmm0, $xmm1
1325 $xmm0 = VXORPDZ128rr $xmm0, $xmm1
1326 ; CHECK: $xmm0 = VXORPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1327 $xmm0 = VXORPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1328 ; CHECK: $xmm0 = VXORPSrr $xmm0, $xmm1
1329 $xmm0 = VXORPSZ128rr $xmm0, $xmm1
1330 ; CHECK: $xmm0 = VPMADDUBSWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1331 $xmm0 = VPMADDUBSWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1332 ; CHECK: $xmm0 = VPMADDUBSWrr $xmm0, $xmm1
1333 $xmm0 = VPMADDUBSWZ128rr $xmm0, $xmm1
1334 ; CHECK: $xmm0 = VPMADDWDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1335 $xmm0 = VPMADDWDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1336 ; CHECK: $xmm0 = VPMADDWDrr $xmm0, $xmm1
1337 $xmm0 = VPMADDWDZ128rr $xmm0, $xmm1
1338 ; CHECK: $xmm0 = VPACKSSDWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1339 $xmm0 = VPACKSSDWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1340 ; CHECK: $xmm0 = VPACKSSDWrr $xmm0, $xmm1
1341 $xmm0 = VPACKSSDWZ128rr $xmm0, $xmm1
1342 ; CHECK: $xmm0 = VPACKSSWBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1343 $xmm0 = VPACKSSWBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1344 ; CHECK: $xmm0 = VPACKSSWBrr $xmm0, $xmm1
1345 $xmm0 = VPACKSSWBZ128rr $xmm0, $xmm1
1346 ; CHECK: $xmm0 = VPACKUSDWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1347 $xmm0 = VPACKUSDWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1348 ; CHECK: $xmm0 = VPACKUSDWrr $xmm0, $xmm1
1349 $xmm0 = VPACKUSDWZ128rr $xmm0, $xmm1
1350 ; CHECK: $xmm0 = VPACKUSWBrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1351 $xmm0 = VPACKUSWBZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1352 ; CHECK: $xmm0 = VPACKUSWBrr $xmm0, $xmm1
1353 $xmm0 = VPACKUSWBZ128rr $xmm0, $xmm1
1354 ; CHECK: $xmm0 = VPUNPCKHBWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1355 $xmm0 = VPUNPCKHBWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1356 ; CHECK: $xmm0 = VPUNPCKHBWrr $xmm0, $xmm1
1357 $xmm0 = VPUNPCKHBWZ128rr $xmm0, $xmm1
1358 ; CHECK: $xmm0 = VPUNPCKHDQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1359 $xmm0 = VPUNPCKHDQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1360 ; CHECK: $xmm0 = VPUNPCKHDQrr $xmm0, $xmm1
1361 $xmm0 = VPUNPCKHDQZ128rr $xmm0, $xmm1
1362 ; CHECK: $xmm0 = VPUNPCKHQDQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1363 $xmm0 = VPUNPCKHQDQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1364 ; CHECK: $xmm0 = VPUNPCKHQDQrr $xmm0, $xmm1
1365 $xmm0 = VPUNPCKHQDQZ128rr $xmm0, $xmm1
1366 ; CHECK: $xmm0 = VPUNPCKHWDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1367 $xmm0 = VPUNPCKHWDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1368 ; CHECK: $xmm0 = VPUNPCKHWDrr $xmm0, $xmm1
1369 $xmm0 = VPUNPCKHWDZ128rr $xmm0, $xmm1
1370 ; CHECK: $xmm0 = VPUNPCKLBWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1371 $xmm0 = VPUNPCKLBWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1372 ; CHECK: $xmm0 = VPUNPCKLBWrr $xmm0, $xmm1
1373 $xmm0 = VPUNPCKLBWZ128rr $xmm0, $xmm1
1374 ; CHECK: $xmm0 = VPUNPCKLDQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1375 $xmm0 = VPUNPCKLDQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1376 ; CHECK: $xmm0 = VPUNPCKLDQrr $xmm0, $xmm1
1377 $xmm0 = VPUNPCKLDQZ128rr $xmm0, $xmm1
1378 ; CHECK: $xmm0 = VPUNPCKLQDQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1379 $xmm0 = VPUNPCKLQDQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1380 ; CHECK: $xmm0 = VPUNPCKLQDQrr $xmm0, $xmm1
1381 $xmm0 = VPUNPCKLQDQZ128rr $xmm0, $xmm1
1382 ; CHECK: $xmm0 = VPUNPCKLWDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1383 $xmm0 = VPUNPCKLWDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1384 ; CHECK: $xmm0 = VPUNPCKLWDrr $xmm0, $xmm1
1385 $xmm0 = VPUNPCKLWDZ128rr $xmm0, $xmm1
1386 ; CHECK: $xmm0 = VUNPCKHPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1387 $xmm0 = VUNPCKHPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1388 ; CHECK: $xmm0 = VUNPCKHPDrr $xmm0, $xmm1
1389 $xmm0 = VUNPCKHPDZ128rr $xmm0, $xmm1
1390 ; CHECK: $xmm0 = VUNPCKHPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1391 $xmm0 = VUNPCKHPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1392 ; CHECK: $xmm0 = VUNPCKHPSrr $xmm0, $xmm1
1393 $xmm0 = VUNPCKHPSZ128rr $xmm0, $xmm1
1394 ; CHECK: $xmm0 = VUNPCKLPDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1395 $xmm0 = VUNPCKLPDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1396 ; CHECK: $xmm0 = VUNPCKLPDrr $xmm0, $xmm1
1397 $xmm0 = VUNPCKLPDZ128rr $xmm0, $xmm1
1398 ; CHECK: $xmm0 = VUNPCKLPSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1399 $xmm0 = VUNPCKLPSZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1400 ; CHECK: $xmm0 = VUNPCKLPSrr $xmm0, $xmm1
1401 $xmm0 = VUNPCKLPSZ128rr $xmm0, $xmm1
1402 ; CHECK: $xmm0 = VFMADD132PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1403 $xmm0 = VFMADD132PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1404 ; CHECK: $xmm0 = VFMADD132PDr $xmm0, $xmm1, $xmm2
1405 $xmm0 = VFMADD132PDZ128r $xmm0, $xmm1, $xmm2
1406 ; CHECK: $xmm0 = VFMADD132PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1407 $xmm0 = VFMADD132PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1408 ; CHECK: $xmm0 = VFMADD132PSr $xmm0, $xmm1, $xmm2
1409 $xmm0 = VFMADD132PSZ128r $xmm0, $xmm1, $xmm2
1410 ; CHECK: $xmm0 = VFMADD213PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1411 $xmm0 = VFMADD213PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1412 ; CHECK: $xmm0 = VFMADD213PDr $xmm0, $xmm1, $xmm2
1413 $xmm0 = VFMADD213PDZ128r $xmm0, $xmm1, $xmm2
1414 ; CHECK: $xmm0 = VFMADD213PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1415 $xmm0 = VFMADD213PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1416 ; CHECK: $xmm0 = VFMADD213PSr $xmm0, $xmm1, $xmm2
1417 $xmm0 = VFMADD213PSZ128r $xmm0, $xmm1, $xmm2
1418 ; CHECK: $xmm0 = VFMADD231PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1419 $xmm0 = VFMADD231PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1420 ; CHECK: $xmm0 = VFMADD231PDr $xmm0, $xmm1, $xmm2
1421 $xmm0 = VFMADD231PDZ128r $xmm0, $xmm1, $xmm2
1422 ; CHECK: $xmm0 = VFMADD231PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1423 $xmm0 = VFMADD231PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1424 ; CHECK: $xmm0 = VFMADD231PSr $xmm0, $xmm1, $xmm2
1425 $xmm0 = VFMADD231PSZ128r $xmm0, $xmm1, $xmm2
1426 ; CHECK: $xmm0 = VFMADDSUB132PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1427 $xmm0 = VFMADDSUB132PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1428 ; CHECK: $xmm0 = VFMADDSUB132PDr $xmm0, $xmm1, $xmm2
1429 $xmm0 = VFMADDSUB132PDZ128r $xmm0, $xmm1, $xmm2
1430 ; CHECK: $xmm0 = VFMADDSUB132PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1431 $xmm0 = VFMADDSUB132PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1432 ; CHECK: $xmm0 = VFMADDSUB132PSr $xmm0, $xmm1, $xmm2
1433 $xmm0 = VFMADDSUB132PSZ128r $xmm0, $xmm1, $xmm2
1434 ; CHECK: $xmm0 = VFMADDSUB213PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1435 $xmm0 = VFMADDSUB213PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1436 ; CHECK: $xmm0 = VFMADDSUB213PDr $xmm0, $xmm1, $xmm2
1437 $xmm0 = VFMADDSUB213PDZ128r $xmm0, $xmm1, $xmm2
1438 ; CHECK: $xmm0 = VFMADDSUB213PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1439 $xmm0 = VFMADDSUB213PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1440 ; CHECK: $xmm0 = VFMADDSUB213PSr $xmm0, $xmm1, $xmm2
1441 $xmm0 = VFMADDSUB213PSZ128r $xmm0, $xmm1, $xmm2
1442 ; CHECK: $xmm0 = VFMADDSUB231PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1443 $xmm0 = VFMADDSUB231PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1444 ; CHECK: $xmm0 = VFMADDSUB231PDr $xmm0, $xmm1, $xmm2
1445 $xmm0 = VFMADDSUB231PDZ128r $xmm0, $xmm1, $xmm2
1446 ; CHECK: $xmm0 = VFMADDSUB231PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1447 $xmm0 = VFMADDSUB231PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1448 ; CHECK: $xmm0 = VFMADDSUB231PSr $xmm0, $xmm1, $xmm2
1449 $xmm0 = VFMADDSUB231PSZ128r $xmm0, $xmm1, $xmm2
1450 ; CHECK: $xmm0 = VFMSUB132PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1451 $xmm0 = VFMSUB132PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1452 ; CHECK: $xmm0 = VFMSUB132PDr $xmm0, $xmm1, $xmm2
1453 $xmm0 = VFMSUB132PDZ128r $xmm0, $xmm1, $xmm2
1454 ; CHECK: $xmm0 = VFMSUB132PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1455 $xmm0 = VFMSUB132PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1456 ; CHECK: $xmm0 = VFMSUB132PSr $xmm0, $xmm1, $xmm2
1457 $xmm0 = VFMSUB132PSZ128r $xmm0, $xmm1, $xmm2
1458 ; CHECK: $xmm0 = VFMSUB213PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1459 $xmm0 = VFMSUB213PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1460 ; CHECK: $xmm0 = VFMSUB213PDr $xmm0, $xmm1, $xmm2
1461 $xmm0 = VFMSUB213PDZ128r $xmm0, $xmm1, $xmm2
1462 ; CHECK: $xmm0 = VFMSUB213PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1463 $xmm0 = VFMSUB213PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1464 ; CHECK: $xmm0 = VFMSUB213PSr $xmm0, $xmm1, $xmm2
1465 $xmm0 = VFMSUB213PSZ128r $xmm0, $xmm1, $xmm2
1466 ; CHECK: $xmm0 = VFMSUB231PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1467 $xmm0 = VFMSUB231PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1468 ; CHECK: $xmm0 = VFMSUB231PDr $xmm0, $xmm1, $xmm2
1469 $xmm0 = VFMSUB231PDZ128r $xmm0, $xmm1, $xmm2
1470 ; CHECK: $xmm0 = VFMSUB231PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1471 $xmm0 = VFMSUB231PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1472 ; CHECK: $xmm0 = VFMSUB231PSr $xmm0, $xmm1, $xmm2
1473 $xmm0 = VFMSUB231PSZ128r $xmm0, $xmm1, $xmm2
1474 ; CHECK: $xmm0 = VFMSUBADD132PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1475 $xmm0 = VFMSUBADD132PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1476 ; CHECK: $xmm0 = VFMSUBADD132PDr $xmm0, $xmm1, $xmm2
1477 $xmm0 = VFMSUBADD132PDZ128r $xmm0, $xmm1, $xmm2
1478 ; CHECK: $xmm0 = VFMSUBADD132PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1479 $xmm0 = VFMSUBADD132PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1480 ; CHECK: $xmm0 = VFMSUBADD132PSr $xmm0, $xmm1, $xmm2
1481 $xmm0 = VFMSUBADD132PSZ128r $xmm0, $xmm1, $xmm2
1482 ; CHECK: $xmm0 = VFMSUBADD213PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1483 $xmm0 = VFMSUBADD213PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1484 ; CHECK: $xmm0 = VFMSUBADD213PDr $xmm0, $xmm1, $xmm2
1485 $xmm0 = VFMSUBADD213PDZ128r $xmm0, $xmm1, $xmm2
1486 ; CHECK: $xmm0 = VFMSUBADD213PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1487 $xmm0 = VFMSUBADD213PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1488 ; CHECK: $xmm0 = VFMSUBADD213PSr $xmm0, $xmm1, $xmm2
1489 $xmm0 = VFMSUBADD213PSZ128r $xmm0, $xmm1, $xmm2
1490 ; CHECK: $xmm0 = VFMSUBADD231PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1491 $xmm0 = VFMSUBADD231PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1492 ; CHECK: $xmm0 = VFMSUBADD231PDr $xmm0, $xmm1, $xmm2
1493 $xmm0 = VFMSUBADD231PDZ128r $xmm0, $xmm1, $xmm2
1494 ; CHECK: $xmm0 = VFMSUBADD231PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1495 $xmm0 = VFMSUBADD231PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1496 ; CHECK: $xmm0 = VFMSUBADD231PSr $xmm0, $xmm1, $xmm2
1497 $xmm0 = VFMSUBADD231PSZ128r $xmm0, $xmm1, $xmm2
1498 ; CHECK: $xmm0 = VFNMADD132PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1499 $xmm0 = VFNMADD132PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1500 ; CHECK: $xmm0 = VFNMADD132PDr $xmm0, $xmm1, $xmm2
1501 $xmm0 = VFNMADD132PDZ128r $xmm0, $xmm1, $xmm2
1502 ; CHECK: $xmm0 = VFNMADD132PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1503 $xmm0 = VFNMADD132PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1504 ; CHECK: $xmm0 = VFNMADD132PSr $xmm0, $xmm1, $xmm2
1505 $xmm0 = VFNMADD132PSZ128r $xmm0, $xmm1, $xmm2
1506 ; CHECK: $xmm0 = VFNMADD213PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1507 $xmm0 = VFNMADD213PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1508 ; CHECK: $xmm0 = VFNMADD213PDr $xmm0, $xmm1, $xmm2
1509 $xmm0 = VFNMADD213PDZ128r $xmm0, $xmm1, $xmm2
1510 ; CHECK: $xmm0 = VFNMADD213PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1511 $xmm0 = VFNMADD213PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1512 ; CHECK: $xmm0 = VFNMADD213PSr $xmm0, $xmm1, $xmm2
1513 $xmm0 = VFNMADD213PSZ128r $xmm0, $xmm1, $xmm2
1514 ; CHECK: $xmm0 = VFNMADD231PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1515 $xmm0 = VFNMADD231PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1516 ; CHECK: $xmm0 = VFNMADD231PDr $xmm0, $xmm1, $xmm2
1517 $xmm0 = VFNMADD231PDZ128r $xmm0, $xmm1, $xmm2
1518 ; CHECK: $xmm0 = VFNMADD231PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1519 $xmm0 = VFNMADD231PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1520 ; CHECK: $xmm0 = VFNMADD231PSr $xmm0, $xmm1, $xmm2
1521 $xmm0 = VFNMADD231PSZ128r $xmm0, $xmm1, $xmm2
1522 ; CHECK: $xmm0 = VFNMSUB132PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1523 $xmm0 = VFNMSUB132PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1524 ; CHECK: $xmm0 = VFNMSUB132PDr $xmm0, $xmm1, $xmm2
1525 $xmm0 = VFNMSUB132PDZ128r $xmm0, $xmm1, $xmm2
1526 ; CHECK: $xmm0 = VFNMSUB132PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1527 $xmm0 = VFNMSUB132PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1528 ; CHECK: $xmm0 = VFNMSUB132PSr $xmm0, $xmm1, $xmm2
1529 $xmm0 = VFNMSUB132PSZ128r $xmm0, $xmm1, $xmm2
1530 ; CHECK: $xmm0 = VFNMSUB213PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1531 $xmm0 = VFNMSUB213PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1532 ; CHECK: $xmm0 = VFNMSUB213PDr $xmm0, $xmm1, $xmm2
1533 $xmm0 = VFNMSUB213PDZ128r $xmm0, $xmm1, $xmm2
1534 ; CHECK: $xmm0 = VFNMSUB213PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1535 $xmm0 = VFNMSUB213PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1536 ; CHECK: $xmm0 = VFNMSUB213PSr $xmm0, $xmm1, $xmm2
1537 $xmm0 = VFNMSUB213PSZ128r $xmm0, $xmm1, $xmm2
1538 ; CHECK: $xmm0 = VFNMSUB231PDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1539 $xmm0 = VFNMSUB231PDZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1540 ; CHECK: $xmm0 = VFNMSUB231PDr $xmm0, $xmm1, $xmm2
1541 $xmm0 = VFNMSUB231PDZ128r $xmm0, $xmm1, $xmm2
1542 ; CHECK: $xmm0 = VFNMSUB231PSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1543 $xmm0 = VFNMSUB231PSZ128m $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1544 ; CHECK: $xmm0 = VFNMSUB231PSr $xmm0, $xmm1, $xmm2
1545 $xmm0 = VFNMSUB231PSZ128r $xmm0, $xmm1, $xmm2
1546 ; CHECK: $xmm0 = VPSLLDri $xmm0, 7
1547 $xmm0 = VPSLLDZ128ri $xmm0, 7
1548 ; CHECK: $xmm0 = VPSLLDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1549 $xmm0 = VPSLLDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1550 ; CHECK: $xmm0 = VPSLLDrr $xmm0, 14
1551 $xmm0 = VPSLLDZ128rr $xmm0, 14
1552 ; CHECK: $xmm0 = VPSLLQri $xmm0, 7
1553 $xmm0 = VPSLLQZ128ri $xmm0, 7
1554 ; CHECK: $xmm0 = VPSLLQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1555 $xmm0 = VPSLLQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1556 ; CHECK: $xmm0 = VPSLLQrr $xmm0, 14
1557 $xmm0 = VPSLLQZ128rr $xmm0, 14
1558 ; CHECK: $xmm0 = VPSLLVDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1559 $xmm0 = VPSLLVDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1560 ; CHECK: $xmm0 = VPSLLVDrr $xmm0, 14
1561 $xmm0 = VPSLLVDZ128rr $xmm0, 14
1562 ; CHECK: $xmm0 = VPSLLVQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1563 $xmm0 = VPSLLVQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1564 ; CHECK: $xmm0 = VPSLLVQrr $xmm0, 14
1565 $xmm0 = VPSLLVQZ128rr $xmm0, 14
1566 ; CHECK: $xmm0 = VPSLLWri $xmm0, 7
1567 $xmm0 = VPSLLWZ128ri $xmm0, 7
1568 ; CHECK: $xmm0 = VPSLLWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1569 $xmm0 = VPSLLWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1570 ; CHECK: $xmm0 = VPSLLWrr $xmm0, 14
1571 $xmm0 = VPSLLWZ128rr $xmm0, 14
1572 ; CHECK: $xmm0 = VPSRADri $xmm0, 7
1573 $xmm0 = VPSRADZ128ri $xmm0, 7
1574 ; CHECK: $xmm0 = VPSRADrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1575 $xmm0 = VPSRADZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1576 ; CHECK: $xmm0 = VPSRADrr $xmm0, 14
1577 $xmm0 = VPSRADZ128rr $xmm0, 14
1578 ; CHECK: $xmm0 = VPSRAVDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1579 $xmm0 = VPSRAVDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1580 ; CHECK: $xmm0 = VPSRAVDrr $xmm0, 14
1581 $xmm0 = VPSRAVDZ128rr $xmm0, 14
1582 ; CHECK: $xmm0 = VPSRAWri $xmm0, 7
1583 $xmm0 = VPSRAWZ128ri $xmm0, 7
1584 ; CHECK: $xmm0 = VPSRAWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1585 $xmm0 = VPSRAWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1586 ; CHECK: $xmm0 = VPSRAWrr $xmm0, 14
1587 $xmm0 = VPSRAWZ128rr $xmm0, 14
1588 ; CHECK: $xmm0 = VPSRLDQri $xmm0, 14
1589 $xmm0 = VPSRLDQZ128rr $xmm0, 14
1590 ; CHECK: $xmm0 = VPSRLDri $xmm0, 7
1591 $xmm0 = VPSRLDZ128ri $xmm0, 7
1592 ; CHECK: $xmm0 = VPSRLDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1593 $xmm0 = VPSRLDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1594 ; CHECK: $xmm0 = VPSRLDrr $xmm0, 14
1595 $xmm0 = VPSRLDZ128rr $xmm0, 14
1596 ; CHECK: $xmm0 = VPSRLQri $xmm0, 7
1597 $xmm0 = VPSRLQZ128ri $xmm0, 7
1598 ; CHECK: $xmm0 = VPSRLQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1599 $xmm0 = VPSRLQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1600 ; CHECK: $xmm0 = VPSRLQrr $xmm0, 14
1601 $xmm0 = VPSRLQZ128rr $xmm0, 14
1602 ; CHECK: $xmm0 = VPSRLVDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1603 $xmm0 = VPSRLVDZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1604 ; CHECK: $xmm0 = VPSRLVDrr $xmm0, 14
1605 $xmm0 = VPSRLVDZ128rr $xmm0, 14
1606 ; CHECK: $xmm0 = VPSRLVQrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1607 $xmm0 = VPSRLVQZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1608 ; CHECK: $xmm0 = VPSRLVQrr $xmm0, 14
1609 $xmm0 = VPSRLVQZ128rr $xmm0, 14
1610 ; CHECK: $xmm0 = VPSRLWri $xmm0, 7
1611 $xmm0 = VPSRLWZ128ri $xmm0, 7
1612 ; CHECK: $xmm0 = VPSRLWrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1613 $xmm0 = VPSRLWZ128rm $xmm0, $rip, 1, $noreg, $rax, $noreg
1614 ; CHECK: $xmm0 = VPSRLWrr $xmm0, 14
1615 $xmm0 = VPSRLWZ128rr $xmm0, 14
1616 ; CHECK: $xmm0 = VPERMILPDmi $rdi, 1, $noreg, 0, $noreg, $noreg
1617 $xmm0 = VPERMILPDZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
1618 ; CHECK: $xmm0 = VPERMILPDri $xmm0, 9
1619 $xmm0 = VPERMILPDZ128ri $xmm0, 9
1620 ; CHECK: $xmm0 = VPERMILPDrm $xmm0, $rdi, 1, $noreg, 0, $noreg
1621 $xmm0 = VPERMILPDZ128rm $xmm0, $rdi, 1, $noreg, 0, $noreg
1622 ; CHECK: $xmm0 = VPERMILPDrr $xmm0, $xmm1
1623 $xmm0 = VPERMILPDZ128rr $xmm0, $xmm1
1624 ; CHECK: $xmm0 = VPERMILPSmi $rdi, 1, $noreg, 0, $noreg, $noreg
1625 $xmm0 = VPERMILPSZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
1626 ; CHECK: $xmm0 = VPERMILPSri $xmm0, 9
1627 $xmm0 = VPERMILPSZ128ri $xmm0, 9
1628 ; CHECK: $xmm0 = VPERMILPSrm $xmm0, $rdi, 1, $noreg, 0, $noreg
1629 $xmm0 = VPERMILPSZ128rm $xmm0, $rdi, 1, $noreg, 0, $noreg
1630 ; CHECK: $xmm0 = VPERMILPSrr $xmm0, $xmm1
1631 $xmm0 = VPERMILPSZ128rr $xmm0, $xmm1
1632 ; CHECK: $xmm0 = VCVTPH2PSrm $rdi, $xmm0, 1, $noreg, 0
1633 $xmm0 = VCVTPH2PSZ128rm $rdi, $xmm0, 1, $noreg, 0
1634 ; CHECK: $xmm0 = VCVTPH2PSrr $xmm0
1635 $xmm0 = VCVTPH2PSZ128rr $xmm0
1636 ; CHECK: $xmm0 = VCVTDQ2PDrm $rdi, $xmm0, 1, $noreg, 0
1637 $xmm0 = VCVTDQ2PDZ128rm $rdi, $xmm0, 1, $noreg, 0
1638 ; CHECK: $xmm0 = VCVTDQ2PDrr $xmm0
1639 $xmm0 = VCVTDQ2PDZ128rr $xmm0
1640 ; CHECK: $xmm0 = VCVTDQ2PSrm $rdi, $xmm0, 1, $noreg, 0
1641 $xmm0 = VCVTDQ2PSZ128rm $rdi, $xmm0, 1, $noreg, 0
1642 ; CHECK: $xmm0 = VCVTDQ2PSrr $xmm0
1643 $xmm0 = VCVTDQ2PSZ128rr $xmm0
1644 ; CHECK: $xmm0 = VCVTPD2DQrm $rdi, $xmm0, 1, $noreg, 0
1645 $xmm0 = VCVTPD2DQZ128rm $rdi, $xmm0, 1, $noreg, 0
1646 ; CHECK: $xmm0 = VCVTPD2DQrr $xmm0
1647 $xmm0 = VCVTPD2DQZ128rr $xmm0
1648 ; CHECK: $xmm0 = VCVTPD2PSrm $rdi, $xmm0, 1, $noreg, 0
1649 $xmm0 = VCVTPD2PSZ128rm $rdi, $xmm0, 1, $noreg, 0
1650 ; CHECK: $xmm0 = VCVTPD2PSrr $xmm0
1651 $xmm0 = VCVTPD2PSZ128rr $xmm0
1652 ; CHECK: $xmm0 = VCVTPS2DQrm $rdi, $xmm0, 1, $noreg, 0
1653 $xmm0 = VCVTPS2DQZ128rm $rdi, $xmm0, 1, $noreg, 0
1654 ; CHECK: $xmm0 = VCVTPS2DQrr $xmm0
1655 $xmm0 = VCVTPS2DQZ128rr $xmm0
1656 ; CHECK: $xmm0 = VCVTPS2PDrm $rdi, $xmm0, 1, $noreg, 0
1657 $xmm0 = VCVTPS2PDZ128rm $rdi, $xmm0, 1, $noreg, 0
1658 ; CHECK: $xmm0 = VCVTPS2PDrr $xmm0
1659 $xmm0 = VCVTPS2PDZ128rr $xmm0
1660 ; CHECK: $xmm0 = VCVTTPD2DQrm $rdi, $xmm0, 1, $noreg, 0
1661 $xmm0 = VCVTTPD2DQZ128rm $rdi, $xmm0, 1, $noreg, 0
1662 ; CHECK: $xmm0 = VCVTTPD2DQrr $xmm0
1663 $xmm0 = VCVTTPD2DQZ128rr $xmm0
1664 ; CHECK: $xmm0 = VCVTTPS2DQrm $rdi, $xmm0, 1, $noreg, 0
1665 $xmm0 = VCVTTPS2DQZ128rm $rdi, $xmm0, 1, $noreg, 0
1666 ; CHECK: $xmm0 = VCVTTPS2DQrr $xmm0
1667 $xmm0 = VCVTTPS2DQZ128rr $xmm0
1668 ; CHECK: $xmm0 = VSQRTPDm $rdi, $noreg, $noreg, $noreg, $noreg
1669 $xmm0 = VSQRTPDZ128m $rdi, $noreg, $noreg, $noreg, $noreg
1670 ; CHECK: $xmm0 = VSQRTPDr $xmm0
1671 $xmm0 = VSQRTPDZ128r $xmm0
1672 ; CHECK: $xmm0 = VSQRTPSm $rdi, $noreg, $noreg, $noreg, $noreg
1673 $xmm0 = VSQRTPSZ128m $rdi, $noreg, $noreg, $noreg, $noreg
1674 ; CHECK: $xmm0 = VSQRTPSr $xmm0
1675 $xmm0 = VSQRTPSZ128r $xmm0
1676 ; CHECK: $xmm0 = VMOVDDUPrm $rdi, 1, $noreg, 0, $noreg
1677 $xmm0 = VMOVDDUPZ128rm $rdi, 1, $noreg, 0, $noreg
1678 ; CHECK: $xmm0 = VMOVDDUPrr $xmm0
1679 $xmm0 = VMOVDDUPZ128rr $xmm0
1680 ; CHECK: $xmm0 = VMOVSHDUPrm $rdi, 1, $noreg, 0, $noreg
1681 $xmm0 = VMOVSHDUPZ128rm $rdi, 1, $noreg, 0, $noreg
1682 ; CHECK: $xmm0 = VMOVSHDUPrr $xmm0
1683 $xmm0 = VMOVSHDUPZ128rr $xmm0
1684 ; CHECK: $xmm0 = VMOVSLDUPrm $rdi, 1, $noreg, 0, $noreg
1685 $xmm0 = VMOVSLDUPZ128rm $rdi, 1, $noreg, 0, $noreg
1686 ; CHECK: $xmm0 = VMOVSLDUPrr $xmm0
1687 $xmm0 = VMOVSLDUPZ128rr $xmm0
1688 ; CHECK: $xmm0 = VPSHUFBrm $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
1689 $xmm0 = VPSHUFBZ128rm $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
1690 ; CHECK: $xmm0 = VPSHUFBrr $xmm0, $xmm1
1691 $xmm0 = VPSHUFBZ128rr $xmm0, $xmm1
1692 ; CHECK: $xmm0 = VPSHUFDmi $rdi, 1, $noreg, 0, $noreg, $noreg
1693 $xmm0 = VPSHUFDZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
1694 ; CHECK: $xmm0 = VPSHUFDri $xmm0, -24
1695 $xmm0 = VPSHUFDZ128ri $xmm0, -24
1696 ; CHECK: $xmm0 = VPSHUFHWmi $rdi, 1, $noreg, 0, $noreg, $noreg
1697 $xmm0 = VPSHUFHWZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
1698 ; CHECK: $xmm0 = VPSHUFHWri $xmm0, -24
1699 $xmm0 = VPSHUFHWZ128ri $xmm0, -24
1700 ; CHECK: $xmm0 = VPSHUFLWmi $rdi, 1, $noreg, 0, $noreg, $noreg
1701 $xmm0 = VPSHUFLWZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
1702 ; CHECK: $xmm0 = VPSHUFLWri $xmm0, -24
1703 $xmm0 = VPSHUFLWZ128ri $xmm0, -24
1704 ; CHECK: $xmm0 = VPSLLDQri $xmm0, $xmm1
1705 $xmm0 = VPSLLDQZ128rr $xmm0, $xmm1
1706 ; CHECK: $xmm0 = VSHUFPDrmi $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
1707 $xmm0 = VSHUFPDZ128rmi $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
1708 ; CHECK: $xmm0 = VSHUFPDrri $xmm0, $noreg, $noreg
1709 $xmm0 = VSHUFPDZ128rri $xmm0, $noreg, $noreg
1710 ; CHECK: $xmm0 = VSHUFPSrmi $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
1711 $xmm0 = VSHUFPSZ128rmi $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
1712 ; CHECK: $xmm0 = VSHUFPSrri $xmm0, $noreg, $noreg
1713 $xmm0 = VSHUFPSZ128rri $xmm0, $noreg, $noreg
1714 ; CHECK: $xmm0 = VPSADBWrm $xmm0, 1, $noreg, $rax, $noreg, $noreg
1715 $xmm0 = VPSADBWZ128rm $xmm0, 1, $noreg, $rax, $noreg, $noreg
1716 ; CHECK: $xmm0 = VPSADBWrr $xmm0, $xmm1
1717 $xmm0 = VPSADBWZ128rr $xmm0, $xmm1
1718 ; CHECK: $xmm0 = VBROADCASTSSrm $rip, $noreg, $noreg, $noreg, $noreg
1719 $xmm0 = VBROADCASTSSZ128m $rip, $noreg, $noreg, $noreg, $noreg
1720 ; CHECK: $xmm0 = VBROADCASTSSrr $xmm0
1721 $xmm0 = VBROADCASTSSZ128r $xmm0
1722 ; CHECK: $xmm0 = VPBROADCASTBrm $rip, $noreg, $noreg, $noreg, $noreg
1723 $xmm0 = VPBROADCASTBZ128m $rip, $noreg, $noreg, $noreg, $noreg
1724 ; CHECK: $xmm0 = VPBROADCASTBrr $xmm0
1725 $xmm0 = VPBROADCASTBZ128r $xmm0
1726 ; CHECK: $xmm0 = VPBROADCASTDrm $rip, $noreg, $noreg, $noreg, $noreg
1727 $xmm0 = VPBROADCASTDZ128m $rip, $noreg, $noreg, $noreg, $noreg
1728 ; CHECK: $xmm0 = VPBROADCASTDrr $xmm0
1729 $xmm0 = VPBROADCASTDZ128r $xmm0
1730 ; CHECK: $xmm0 = VPBROADCASTQrm $rip, $noreg, $noreg, $noreg, $noreg
1731 $xmm0 = VPBROADCASTQZ128m $rip, $noreg, $noreg, $noreg, $noreg
1732 ; CHECK: $xmm0 = VPBROADCASTQrr $xmm0
1733 $xmm0 = VPBROADCASTQZ128r $xmm0
1734 ; CHECK: $xmm0 = VPBROADCASTWrm $rip, $noreg, $noreg, $noreg, $noreg
1735 $xmm0 = VPBROADCASTWZ128m $rip, $noreg, $noreg, $noreg, $noreg
1736 ; CHECK: $xmm0 = VPBROADCASTWrr $xmm0
1737 $xmm0 = VPBROADCASTWZ128r $xmm0
1738 ; CHECK: $xmm0 = VPBROADCASTQrm $rip, $noreg, $noreg, $noreg, $noreg
1739 $xmm0 = VBROADCASTI32X2Z128m $rip, $noreg, $noreg, $noreg, $noreg
1740 ; CHECK: $xmm0 = VPBROADCASTQrr $xmm0
1741 $xmm0 = VBROADCASTI32X2Z128r $xmm0
1742 ; CHECK: $xmm0 = VCVTPS2PHrr $xmm0, 2
1743 $xmm0 = VCVTPS2PHZ128rr $xmm0, 2
1744 ; CHECK: VCVTPS2PHmr $rdi, $xmm0, 1, $noreg, 0, $noreg, $noreg
1745 VCVTPS2PHZ128mr $rdi, $xmm0, 1, $noreg, 0, $noreg, $noreg
1746 ; CHECK: $xmm0 = VPABSBrm $rip, 1, $noreg, $rax, $noreg
1747 $xmm0 = VPABSBZ128rm $rip, 1, $noreg, $rax, $noreg
1748 ; CHECK: $xmm0 = VPABSBrr $xmm0
1749 $xmm0 = VPABSBZ128rr $xmm0
1750 ; CHECK: $xmm0 = VPABSDrm $rip, 1, $noreg, $rax, $noreg
1751 $xmm0 = VPABSDZ128rm $rip, 1, $noreg, $rax, $noreg
1752 ; CHECK: $xmm0 = VPABSDrr $xmm0
1753 $xmm0 = VPABSDZ128rr $xmm0
1754 ; CHECK: $xmm0 = VPABSWrm $rip, 1, $noreg, $rax, $noreg
1755 $xmm0 = VPABSWZ128rm $rip, 1, $noreg, $rax, $noreg
1756 ; CHECK: $xmm0 = VPABSWrr $xmm0
1757 $xmm0 = VPABSWZ128rr $xmm0
1758 ; CHECK: $xmm0 = VPALIGNRrmi $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
1759 $xmm0 = VPALIGNRZ128rmi $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
1760 ; CHECK: $xmm0 = VPALIGNRrri $xmm0, $xmm1, 15
1761 $xmm0 = VPALIGNRZ128rri $xmm0, $xmm1, 15
1763 RET 0, $zmm0, $zmm1
1764 ...
1765 ---
1766 # CHECK-LABEL: name: evex_scalar_to_vex_test
1767 # CHECK: bb.0:
1769 name: evex_scalar_to_vex_test
1770 body: |
1771 bb.0:
1773 ; CHECK: $xmm0 = VADDSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1774 $xmm0 = VADDSDZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1775 ; CHECK: $xmm0 = VADDSDrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1776 $xmm0 = VADDSDZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1777 ; CHECK: $xmm0 = VADDSDrr $xmm0, $xmm1
1778 $xmm0 = VADDSDZrr $xmm0, $xmm1
1779 ; CHECK: $xmm0 = VADDSDrr_Int $xmm0, $xmm1
1780 $xmm0 = VADDSDZrr_Int $xmm0, $xmm1
1781 ; CHECK: $xmm0 = VADDSSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1782 $xmm0 = VADDSSZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1783 ; CHECK: $xmm0 = VADDSSrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1784 $xmm0 = VADDSSZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1785 ; CHECK: $xmm0 = VADDSSrr $xmm0, $xmm1
1786 $xmm0 = VADDSSZrr $xmm0, $xmm1
1787 ; CHECK: $xmm0 = VADDSSrr_Int $xmm0, $xmm1
1788 $xmm0 = VADDSSZrr_Int $xmm0, $xmm1
1789 ; CHECK: $xmm0 = VDIVSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1790 $xmm0 = VDIVSDZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1791 ; CHECK: $xmm0 = VDIVSDrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1792 $xmm0 = VDIVSDZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1793 ; CHECK: $xmm0 = VDIVSDrr $xmm0, $xmm1
1794 $xmm0 = VDIVSDZrr $xmm0, $xmm1
1795 ; CHECK: $xmm0 = VDIVSDrr_Int $xmm0, $xmm1
1796 $xmm0 = VDIVSDZrr_Int $xmm0, $xmm1
1797 ; CHECK: $xmm0 = VDIVSSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1798 $xmm0 = VDIVSSZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1799 ; CHECK: $xmm0 = VDIVSSrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1800 $xmm0 = VDIVSSZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1801 ; CHECK: $xmm0 = VDIVSSrr $xmm0, $xmm1
1802 $xmm0 = VDIVSSZrr $xmm0, $xmm1
1803 ; CHECK: $xmm0 = VDIVSSrr_Int $xmm0, $xmm1
1804 $xmm0 = VDIVSSZrr_Int $xmm0, $xmm1
1805 ; CHECK: $xmm0 = VMAXCSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1806 $xmm0 = VMAXCSDZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1807 ; CHECK: $xmm0 = VMAXCSDrr $xmm0, $xmm1
1808 $xmm0 = VMAXCSDZrr $xmm0, $xmm1
1809 ; CHECK: $xmm0 = VMAXCSSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1810 $xmm0 = VMAXCSSZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1811 ; CHECK: $xmm0 = VMAXCSSrr $xmm0, $xmm1
1812 $xmm0 = VMAXCSSZrr $xmm0, $xmm1
1813 ; CHECK: $xmm0 = VMAXCSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1814 $xmm0 = VMAXSDZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1815 ; CHECK: $xmm0 = VMAXSDrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1816 $xmm0 = VMAXSDZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1817 ; CHECK: $xmm0 = VMAXCSDrr $xmm0, $xmm1
1818 $xmm0 = VMAXSDZrr $xmm0, $xmm1
1819 ; CHECK: $xmm0 = VMAXSDrr_Int $xmm0, $xmm1
1820 $xmm0 = VMAXSDZrr_Int $xmm0, $xmm1
1821 ; CHECK: $xmm0 = VMAXCSSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1822 $xmm0 = VMAXSSZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1823 ; CHECK: $xmm0 = VMAXSSrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1824 $xmm0 = VMAXSSZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1825 ; CHECK: $xmm0 = VMAXCSSrr $xmm0, $xmm1
1826 $xmm0 = VMAXSSZrr $xmm0, $xmm1
1827 ; CHECK: $xmm0 = VMAXSSrr_Int $xmm0, $xmm1
1828 $xmm0 = VMAXSSZrr_Int $xmm0, $xmm1
1829 ; CHECK: $xmm0 = VMINCSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1830 $xmm0 = VMINCSDZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1831 ; CHECK: $xmm0 = VMINCSDrr $xmm0, $xmm1
1832 $xmm0 = VMINCSDZrr $xmm0, $xmm1
1833 ; CHECK: $xmm0 = VMINCSSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1834 $xmm0 = VMINCSSZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1835 ; CHECK: $xmm0 = VMINCSSrr $xmm0, $xmm1
1836 $xmm0 = VMINCSSZrr $xmm0, $xmm1
1837 ; CHECK: $xmm0 = VMINCSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1838 $xmm0 = VMINSDZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1839 ; CHECK: $xmm0 = VMINSDrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1840 $xmm0 = VMINSDZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1841 ; CHECK: $xmm0 = VMINCSDrr $xmm0, $xmm1
1842 $xmm0 = VMINSDZrr $xmm0, $xmm1
1843 ; CHECK: $xmm0 = VMINSDrr_Int $xmm0, $xmm1
1844 $xmm0 = VMINSDZrr_Int $xmm0, $xmm1
1845 ; CHECK: $xmm0 = VMINCSSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1846 $xmm0 = VMINSSZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1847 ; CHECK: $xmm0 = VMINSSrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1848 $xmm0 = VMINSSZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1849 ; CHECK: $xmm0 = VMINCSSrr $xmm0, $xmm1
1850 $xmm0 = VMINSSZrr $xmm0, $xmm1
1851 ; CHECK: $xmm0 = VMINSSrr_Int $xmm0, $xmm1
1852 $xmm0 = VMINSSZrr_Int $xmm0, $xmm1
1853 ; CHECK: $xmm0 = VMULSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1854 $xmm0 = VMULSDZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1855 ; CHECK: $xmm0 = VMULSDrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1856 $xmm0 = VMULSDZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1857 ; CHECK: $xmm0 = VMULSDrr $xmm0, $xmm1
1858 $xmm0 = VMULSDZrr $xmm0, $xmm1
1859 ; CHECK: $xmm0 = VMULSDrr_Int $xmm0, $xmm1
1860 $xmm0 = VMULSDZrr_Int $xmm0, $xmm1
1861 ; CHECK: $xmm0 = VMULSSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1862 $xmm0 = VMULSSZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1863 ; CHECK: $xmm0 = VMULSSrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1864 $xmm0 = VMULSSZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1865 ; CHECK: $xmm0 = VMULSSrr $xmm0, $xmm1
1866 $xmm0 = VMULSSZrr $xmm0, $xmm1
1867 ; CHECK: $xmm0 = VMULSSrr_Int $xmm0, $xmm1
1868 $xmm0 = VMULSSZrr_Int $xmm0, $xmm1
1869 ; CHECK: $xmm0 = VSUBSDrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1870 $xmm0 = VSUBSDZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1871 ; CHECK: $xmm0 = VSUBSDrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1872 $xmm0 = VSUBSDZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1873 ; CHECK: $xmm0 = VSUBSDrr $xmm0, $xmm1
1874 $xmm0 = VSUBSDZrr $xmm0, $xmm1
1875 ; CHECK: $xmm0 = VSUBSDrr_Int $xmm0, $xmm1
1876 $xmm0 = VSUBSDZrr_Int $xmm0, $xmm1
1877 ; CHECK: $xmm0 = VSUBSSrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1878 $xmm0 = VSUBSSZrm $xmm0, $rip, 1, $noreg, $rax, $noreg
1879 ; CHECK: $xmm0 = VSUBSSrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1880 $xmm0 = VSUBSSZrm_Int $xmm0, $rip, 1, $noreg, $rax, $noreg
1881 ; CHECK: $xmm0 = VSUBSSrr $xmm0, $xmm1
1882 $xmm0 = VSUBSSZrr $xmm0, $xmm1
1883 ; CHECK: $xmm0 = VSUBSSrr_Int $xmm0, $xmm1
1884 $xmm0 = VSUBSSZrr_Int $xmm0, $xmm1
1885 ; CHECK: $xmm0 = VFMADD132SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1886 $xmm0 = VFMADD132SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1887 ; CHECK: $xmm0 = VFMADD132SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1888 $xmm0 = VFMADD132SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1889 ; CHECK: $xmm0 = VFMADD132SDr $xmm0, $xmm1, $xmm2
1890 $xmm0 = VFMADD132SDZr $xmm0, $xmm1, $xmm2
1891 ; CHECK: $xmm0 = VFMADD132SDr_Int $xmm0, $xmm1, $xmm2
1892 $xmm0 = VFMADD132SDZr_Int $xmm0, $xmm1, $xmm2
1893 ; CHECK: $xmm0 = VFMADD132SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1894 $xmm0 = VFMADD132SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1895 ; CHECK: $xmm0 = VFMADD132SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1896 $xmm0 = VFMADD132SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1897 ; CHECK: $xmm0 = VFMADD132SSr $xmm0, $xmm1, $xmm2
1898 $xmm0 = VFMADD132SSZr $xmm0, $xmm1, $xmm2
1899 ; CHECK: $xmm0 = VFMADD132SSr_Int $xmm0, $xmm1, $xmm2
1900 $xmm0 = VFMADD132SSZr_Int $xmm0, $xmm1, $xmm2
1901 ; CHECK: $xmm0 = VFMADD213SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1902 $xmm0 = VFMADD213SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1903 ; CHECK: $xmm0 = VFMADD213SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1904 $xmm0 = VFMADD213SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1905 ; CHECK: $xmm0 = VFMADD213SDr $xmm0, $xmm1, $xmm2
1906 $xmm0 = VFMADD213SDZr $xmm0, $xmm1, $xmm2
1907 ; CHECK: $xmm0 = VFMADD213SDr_Int $xmm0, $xmm1, $xmm2
1908 $xmm0 = VFMADD213SDZr_Int $xmm0, $xmm1, $xmm2
1909 ; CHECK: $xmm0 = VFMADD213SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1910 $xmm0 = VFMADD213SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1911 ; CHECK: $xmm0 = VFMADD213SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1912 $xmm0 = VFMADD213SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1913 ; CHECK: $xmm0 = VFMADD213SSr $xmm0, $xmm1, $xmm2
1914 $xmm0 = VFMADD213SSZr $xmm0, $xmm1, $xmm2
1915 ; CHECK: $xmm0 = VFMADD213SSr_Int $xmm0, $xmm1, $xmm2
1916 $xmm0 = VFMADD213SSZr_Int $xmm0, $xmm1, $xmm2
1917 ; CHECK: $xmm0 = VFMADD231SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1918 $xmm0 = VFMADD231SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1919 ; CHECK: $xmm0 = VFMADD231SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1920 $xmm0 = VFMADD231SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1921 ; CHECK: $xmm0 = VFMADD231SDr $xmm0, $xmm1, $xmm2
1922 $xmm0 = VFMADD231SDZr $xmm0, $xmm1, $xmm2
1923 ; CHECK: $xmm0 = VFMADD231SDr_Int $xmm0, $xmm1, $xmm2
1924 $xmm0 = VFMADD231SDZr_Int $xmm0, $xmm1, $xmm2
1925 ; CHECK: $xmm0 = VFMADD231SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1926 $xmm0 = VFMADD231SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1927 ; CHECK: $xmm0 = VFMADD231SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1928 $xmm0 = VFMADD231SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1929 ; CHECK: $xmm0 = VFMADD231SSr $xmm0, $xmm1, $xmm2
1930 $xmm0 = VFMADD231SSZr $xmm0, $xmm1, $xmm2
1931 ; CHECK: $xmm0 = VFMADD231SSr_Int $xmm0, $xmm1, $xmm2
1932 $xmm0 = VFMADD231SSZr_Int $xmm0, $xmm1, $xmm2
1933 ; CHECK: $xmm0 = VFMSUB132SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1934 $xmm0 = VFMSUB132SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1935 ; CHECK: $xmm0 = VFMSUB132SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1936 $xmm0 = VFMSUB132SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1937 ; CHECK: $xmm0 = VFMSUB132SDr $xmm0, $xmm1, $xmm2
1938 $xmm0 = VFMSUB132SDZr $xmm0, $xmm1, $xmm2
1939 ; CHECK: $xmm0 = VFMSUB132SDr_Int $xmm0, $xmm1, $xmm2
1940 $xmm0 = VFMSUB132SDZr_Int $xmm0, $xmm1, $xmm2
1941 ; CHECK: $xmm0 = VFMSUB132SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1942 $xmm0 = VFMSUB132SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1943 ; CHECK: $xmm0 = VFMSUB132SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1944 $xmm0 = VFMSUB132SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1945 ; CHECK: $xmm0 = VFMSUB132SSr $xmm0, $xmm1, $xmm2
1946 $xmm0 = VFMSUB132SSZr $xmm0, $xmm1, $xmm2
1947 ; CHECK: $xmm0 = VFMSUB132SSr_Int $xmm0, $xmm1, $xmm2
1948 $xmm0 = VFMSUB132SSZr_Int $xmm0, $xmm1, $xmm2
1949 ; CHECK: $xmm0 = VFMSUB213SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1950 $xmm0 = VFMSUB213SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1951 ; CHECK: $xmm0 = VFMSUB213SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1952 $xmm0 = VFMSUB213SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1953 ; CHECK: $xmm0 = VFMSUB213SDr $xmm0, $xmm1, $xmm2
1954 $xmm0 = VFMSUB213SDZr $xmm0, $xmm1, $xmm2
1955 ; CHECK: $xmm0 = VFMSUB213SDr_Int $xmm0, $xmm1, $xmm2
1956 $xmm0 = VFMSUB213SDZr_Int $xmm0, $xmm1, $xmm2
1957 ; CHECK: $xmm0 = VFMSUB213SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1958 $xmm0 = VFMSUB213SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1959 ; CHECK: $xmm0 = VFMSUB213SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1960 $xmm0 = VFMSUB213SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1961 ; CHECK: $xmm0 = VFMSUB213SSr $xmm0, $xmm1, $xmm2
1962 $xmm0 = VFMSUB213SSZr $xmm0, $xmm1, $xmm2
1963 ; CHECK: $xmm0 = VFMSUB213SSr_Int $xmm0, $xmm1, $xmm2
1964 $xmm0 = VFMSUB213SSZr_Int $xmm0, $xmm1, $xmm2
1965 ; CHECK: $xmm0 = VFMSUB231SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1966 $xmm0 = VFMSUB231SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1967 ; CHECK: $xmm0 = VFMSUB231SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1968 $xmm0 = VFMSUB231SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1969 ; CHECK: $xmm0 = VFMSUB231SDr $xmm0, $xmm1, $xmm2
1970 $xmm0 = VFMSUB231SDZr $xmm0, $xmm1, $xmm2
1971 ; CHECK: $xmm0 = VFMSUB231SDr_Int $xmm0, $xmm1, $xmm2
1972 $xmm0 = VFMSUB231SDZr_Int $xmm0, $xmm1, $xmm2
1973 ; CHECK: $xmm0 = VFMSUB231SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1974 $xmm0 = VFMSUB231SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1975 ; CHECK: $xmm0 = VFMSUB231SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1976 $xmm0 = VFMSUB231SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1977 ; CHECK: $xmm0 = VFMSUB231SSr $xmm0, $xmm1, $xmm2
1978 $xmm0 = VFMSUB231SSZr $xmm0, $xmm1, $xmm2
1979 ; CHECK: $xmm0 = VFMSUB231SSr_Int $xmm0, $xmm1, $xmm2
1980 $xmm0 = VFMSUB231SSZr_Int $xmm0, $xmm1, $xmm2
1981 ; CHECK: $xmm0 = VFNMADD132SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1982 $xmm0 = VFNMADD132SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1983 ; CHECK: $xmm0 = VFNMADD132SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1984 $xmm0 = VFNMADD132SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1985 ; CHECK: $xmm0 = VFNMADD132SDr $xmm0, $xmm1, $xmm2
1986 $xmm0 = VFNMADD132SDZr $xmm0, $xmm1, $xmm2
1987 ; CHECK: $xmm0 = VFNMADD132SDr_Int $xmm0, $xmm1, $xmm2
1988 $xmm0 = VFNMADD132SDZr_Int $xmm0, $xmm1, $xmm2
1989 ; CHECK: $xmm0 = VFNMADD132SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1990 $xmm0 = VFNMADD132SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1991 ; CHECK: $xmm0 = VFNMADD132SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1992 $xmm0 = VFNMADD132SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1993 ; CHECK: $xmm0 = VFNMADD132SSr $xmm0, $xmm1, $xmm2
1994 $xmm0 = VFNMADD132SSZr $xmm0, $xmm1, $xmm2
1995 ; CHECK: $xmm0 = VFNMADD132SSr_Int $xmm0, $xmm1, $xmm2
1996 $xmm0 = VFNMADD132SSZr_Int $xmm0, $xmm1, $xmm2
1997 ; CHECK: $xmm0 = VFNMADD213SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1998 $xmm0 = VFNMADD213SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
1999 ; CHECK: $xmm0 = VFNMADD213SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2000 $xmm0 = VFNMADD213SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2001 ; CHECK: $xmm0 = VFNMADD213SDr $xmm0, $xmm1, $xmm2
2002 $xmm0 = VFNMADD213SDZr $xmm0, $xmm1, $xmm2
2003 ; CHECK: $xmm0 = VFNMADD213SDr_Int $xmm0, $xmm1, $xmm2
2004 $xmm0 = VFNMADD213SDZr_Int $xmm0, $xmm1, $xmm2
2005 ; CHECK: $xmm0 = VFNMADD213SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2006 $xmm0 = VFNMADD213SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2007 ; CHECK: $xmm0 = VFNMADD213SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2008 $xmm0 = VFNMADD213SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2009 ; CHECK: $xmm0 = VFNMADD213SSr $xmm0, $xmm1, $xmm2
2010 $xmm0 = VFNMADD213SSZr $xmm0, $xmm1, $xmm2
2011 ; CHECK: $xmm0 = VFNMADD213SSr_Int $xmm0, $xmm1, $xmm2
2012 $xmm0 = VFNMADD213SSZr_Int $xmm0, $xmm1, $xmm2
2013 ; CHECK: $xmm0 = VFNMADD231SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2014 $xmm0 = VFNMADD231SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2015 ; CHECK: $xmm0 = VFNMADD231SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2016 $xmm0 = VFNMADD231SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2017 ; CHECK: $xmm0 = VFNMADD231SDr $xmm0, $xmm1, $xmm2
2018 $xmm0 = VFNMADD231SDZr $xmm0, $xmm1, $xmm2
2019 ; CHECK: $xmm0 = VFNMADD231SDr_Int $xmm0, $xmm1, $xmm2
2020 $xmm0 = VFNMADD231SDZr_Int $xmm0, $xmm1, $xmm2
2021 ; CHECK: $xmm0 = VFNMADD231SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2022 $xmm0 = VFNMADD231SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2023 ; CHECK: $xmm0 = VFNMADD231SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2024 $xmm0 = VFNMADD231SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2025 ; CHECK: $xmm0 = VFNMADD231SSr $xmm0, $xmm1, $xmm2
2026 $xmm0 = VFNMADD231SSZr $xmm0, $xmm1, $xmm2
2027 ; CHECK: $xmm0 = VFNMADD231SSr_Int $xmm0, $xmm1, $xmm2
2028 $xmm0 = VFNMADD231SSZr_Int $xmm0, $xmm1, $xmm2
2029 ; CHECK: $xmm0 = VFNMSUB132SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2030 $xmm0 = VFNMSUB132SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2031 ; CHECK: $xmm0 = VFNMSUB132SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2032 $xmm0 = VFNMSUB132SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2033 ; CHECK: $xmm0 = VFNMSUB132SDr $xmm0, $xmm1, $xmm2
2034 $xmm0 = VFNMSUB132SDZr $xmm0, $xmm1, $xmm2
2035 ; CHECK: $xmm0 = VFNMSUB132SDr_Int $xmm0, $xmm1, $xmm2
2036 $xmm0 = VFNMSUB132SDZr_Int $xmm0, $xmm1, $xmm2
2037 ; CHECK: $xmm0 = VFNMSUB132SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2038 $xmm0 = VFNMSUB132SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2039 ; CHECK: $xmm0 = VFNMSUB132SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2040 $xmm0 = VFNMSUB132SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2041 ; CHECK: $xmm0 = VFNMSUB132SSr $xmm0, $xmm1, $xmm2
2042 $xmm0 = VFNMSUB132SSZr $xmm0, $xmm1, $xmm2
2043 ; CHECK: $xmm0 = VFNMSUB132SSr_Int $xmm0, $xmm1, $xmm2
2044 $xmm0 = VFNMSUB132SSZr_Int $xmm0, $xmm1, $xmm2
2045 ; CHECK: $xmm0 = VFNMSUB213SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2046 $xmm0 = VFNMSUB213SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2047 ; CHECK: $xmm0 = VFNMSUB213SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2048 $xmm0 = VFNMSUB213SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2049 ; CHECK: $xmm0 = VFNMSUB213SDr $xmm0, $xmm1, $xmm2
2050 $xmm0 = VFNMSUB213SDZr $xmm0, $xmm1, $xmm2
2051 ; CHECK: $xmm0 = VFNMSUB213SDr_Int $xmm0, $xmm1, $xmm2
2052 $xmm0 = VFNMSUB213SDZr_Int $xmm0, $xmm1, $xmm2
2053 ; CHECK: $xmm0 = VFNMSUB213SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2054 $xmm0 = VFNMSUB213SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2055 ; CHECK: $xmm0 = VFNMSUB213SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2056 $xmm0 = VFNMSUB213SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2057 ; CHECK: $xmm0 = VFNMSUB213SSr $xmm0, $xmm1, $xmm2
2058 $xmm0 = VFNMSUB213SSZr $xmm0, $xmm1, $xmm2
2059 ; CHECK: $xmm0 = VFNMSUB213SSr_Int $xmm0, $xmm1, $xmm2
2060 $xmm0 = VFNMSUB213SSZr_Int $xmm0, $xmm1, $xmm2
2061 ; CHECK: $xmm0 = VFNMSUB231SDm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2062 $xmm0 = VFNMSUB231SDZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2063 ; CHECK: $xmm0 = VFNMSUB231SDm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2064 $xmm0 = VFNMSUB231SDZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2065 ; CHECK: $xmm0 = VFNMSUB231SDr $xmm0, $xmm1, $xmm2
2066 $xmm0 = VFNMSUB231SDZr $xmm0, $xmm1, $xmm2
2067 ; CHECK: $xmm0 = VFNMSUB231SDr_Int $xmm0, $xmm1, $xmm2
2068 $xmm0 = VFNMSUB231SDZr_Int $xmm0, $xmm1, $xmm2
2069 ; CHECK: $xmm0 = VFNMSUB231SSm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2070 $xmm0 = VFNMSUB231SSZm $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2071 ; CHECK: $xmm0 = VFNMSUB231SSm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2072 $xmm0 = VFNMSUB231SSZm_Int $xmm0, $xmm0, $rsi, 1, $noreg, 0, $noreg
2073 ; CHECK: $xmm0 = VFNMSUB231SSr $xmm0, $xmm1, $xmm2
2074 $xmm0 = VFNMSUB231SSZr $xmm0, $xmm1, $xmm2
2075 ; CHECK: $xmm0 = VFNMSUB231SSr_Int $xmm0, $xmm1, $xmm2
2076 $xmm0 = VFNMSUB231SSZr_Int $xmm0, $xmm1, $xmm2
2077 ; CHECK: VPEXTRBmr $rdi, 1, $noreg, 0, $noreg, $xmm0, 3
2078 VPEXTRBZmr $rdi, 1, $noreg, 0, $noreg, $xmm0, 3
2079 ; CHECK: $eax = VPEXTRBrr $xmm0, 1
2080 $eax = VPEXTRBZrr $xmm0, 1
2081 ; CHECK: VPEXTRDmr $rdi, 1, $noreg, 0, $noreg, $xmm0, 3
2082 VPEXTRDZmr $rdi, 1, $noreg, 0, $noreg, $xmm0, 3
2083 ; CHECK: $eax = VPEXTRDrr $xmm0, 1
2084 $eax = VPEXTRDZrr $xmm0, 1
2085 ; CHECK: VPEXTRQmr $rdi, 1, $noreg, 0, $noreg, $xmm0, 3
2086 VPEXTRQZmr $rdi, 1, $noreg, 0, $noreg, $xmm0, 3
2087 ; CHECK: $rax = VPEXTRQrr $xmm0, 1
2088 $rax = VPEXTRQZrr $xmm0, 1
2089 ; CHECK: VPEXTRWmr $rdi, 1, $noreg, 0, $noreg, $xmm0, 3
2090 VPEXTRWZmr $rdi, 1, $noreg, 0, $noreg, $xmm0, 3
2091 ; CHECK: $eax = VPEXTRWrr $xmm0, 1
2092 $eax = VPEXTRWZrr $xmm0, 1
2093 ; CHECK: $eax = VPEXTRWrr_REV $xmm0, 1
2094 $eax = VPEXTRWZrr_REV $xmm0, 1
2095 ; CHECK: $xmm0 = VPINSRBrm $xmm0, $rsi, 1, $noreg, 0, $noreg, 3
2096 $xmm0 = VPINSRBZrm $xmm0, $rsi, 1, $noreg, 0, $noreg, 3
2097 ; CHECK: $xmm0 = VPINSRBrr $xmm0, $edi, 5
2098 $xmm0 = VPINSRBZrr $xmm0, $edi, 5
2099 ; CHECK: $xmm0 = VPINSRDrm $xmm0, $rsi, 1, $noreg, 0, $noreg, 3
2100 $xmm0 = VPINSRDZrm $xmm0, $rsi, 1, $noreg, 0, $noreg, 3
2101 ; CHECK: $xmm0 = VPINSRDrr $xmm0, $edi, 5
2102 $xmm0 = VPINSRDZrr $xmm0, $edi, 5
2103 ; CHECK: $xmm0 = VPINSRQrm $xmm0, $rsi, 1, $noreg, 0, $noreg, 3
2104 $xmm0 = VPINSRQZrm $xmm0, $rsi, 1, $noreg, 0, $noreg, 3
2105 ; CHECK: $xmm0 = VPINSRQrr $xmm0, $rdi, 5
2106 $xmm0 = VPINSRQZrr $xmm0, $rdi, 5
2107 ; CHECK: $xmm0 = VPINSRWrm $xmm0, $rsi, 1, $noreg, 0, $noreg, 3
2108 $xmm0 = VPINSRWZrm $xmm0, $rsi, 1, $noreg, 0, $noreg, 3
2109 ; CHECK: $xmm0 = VPINSRWrr $xmm0, $edi, 5
2110 $xmm0 = VPINSRWZrr $xmm0, $edi, 5
2111 ; CHECK: $xmm0 = VSQRTSDm $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
2112 $xmm0 = VSQRTSDZm $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
2113 ; CHECK: $xmm0 = VSQRTSDm_Int $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
2114 $xmm0 = VSQRTSDZm_Int $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
2115 ; CHECK: $xmm0 = VSQRTSDr $xmm0, $noreg
2116 $xmm0 = VSQRTSDZr $xmm0, $noreg
2117 ; CHECK: $xmm0 = VSQRTSDr_Int $xmm0, $noreg
2118 $xmm0 = VSQRTSDZr_Int $xmm0, $noreg
2119 ; CHECK: $xmm0 = VSQRTSSm $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
2120 $xmm0 = VSQRTSSZm $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
2121 ; CHECK: $xmm0 = VSQRTSSm_Int $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
2122 $xmm0 = VSQRTSSZm_Int $xmm0, $noreg, $noreg, $noreg, $noreg, $noreg
2123 ; CHECK: $xmm0 = VSQRTSSr $xmm0, $noreg
2124 $xmm0 = VSQRTSSZr $xmm0, $noreg
2125 ; CHECK: $xmm0 = VSQRTSSr_Int $xmm0, $noreg
2126 $xmm0 = VSQRTSSZr_Int $xmm0, $noreg
2127 ; CHECK: $rdi = VCVTSD2SI64rr_Int $xmm0
2128 $rdi = VCVTSD2SI64Zrr_Int $xmm0
2129 ; CHECK: $edi = VCVTSD2SIrr_Int $xmm0
2130 $edi = VCVTSD2SIZrr_Int $xmm0
2131 ; CHECK: $xmm0 = VCVTSD2SSrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2132 $xmm0 = VCVTSD2SSZrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2133 ; CHECK: $xmm0 = VCVTSD2SSrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2134 $xmm0 = VCVTSD2SSZrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2135 ; CHECK: $xmm0 = VCVTSD2SSrr $xmm0, $noreg
2136 $xmm0 = VCVTSD2SSZrr $xmm0, $noreg
2137 ; CHECK: $xmm0 = VCVTSD2SSrr_Int $xmm0, $noreg
2138 $xmm0 = VCVTSD2SSZrr_Int $xmm0, $noreg
2139 ; CHECK: $xmm0 = VCVTSI2SDrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2140 $xmm0 = VCVTSI2SDZrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2141 ; CHECK: $xmm0 = VCVTSI2SDrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2142 $xmm0 = VCVTSI2SDZrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2143 ; CHECK: $xmm0 = VCVTSI2SDrr $xmm0, $noreg
2144 $xmm0 = VCVTSI2SDZrr $xmm0, $noreg
2145 ; CHECK: $xmm0 = VCVTSI2SDrr_Int $xmm0, $noreg
2146 $xmm0 = VCVTSI2SDZrr_Int $xmm0, $noreg
2147 ; CHECK: $xmm0 = VCVTSI2SSrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2148 $xmm0 = VCVTSI2SSZrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2149 ; CHECK: $xmm0 = VCVTSI2SSrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2150 $xmm0 = VCVTSI2SSZrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2151 ; CHECK: $xmm0 = VCVTSI2SSrr $xmm0, $noreg
2152 $xmm0 = VCVTSI2SSZrr $xmm0, $noreg
2153 ; CHECK: $xmm0 = VCVTSI2SSrr_Int $xmm0, $noreg
2154 $xmm0 = VCVTSI2SSZrr_Int $xmm0, $noreg
2155 ; CHECK: $xmm0 = VCVTSI642SDrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2156 $xmm0 = VCVTSI642SDZrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2157 ; CHECK: $xmm0 = VCVTSI642SDrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2158 $xmm0 = VCVTSI642SDZrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2159 ; CHECK: $xmm0 = VCVTSI642SDrr $xmm0, $noreg
2160 $xmm0 = VCVTSI642SDZrr $xmm0, $noreg
2161 ; CHECK: $xmm0 = VCVTSI642SDrr_Int $xmm0, $noreg
2162 $xmm0 = VCVTSI642SDZrr_Int $xmm0, $noreg
2163 ; CHECK: $xmm0 = VCVTSI642SSrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2164 $xmm0 = VCVTSI642SSZrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2165 ; CHECK: $xmm0 = VCVTSI642SSrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2166 $xmm0 = VCVTSI642SSZrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2167 ; CHECK: $xmm0 = VCVTSI642SSrr $xmm0, $noreg
2168 $xmm0 = VCVTSI642SSZrr $xmm0, $noreg
2169 ; CHECK: $xmm0 = VCVTSI642SSrr_Int $xmm0, $noreg
2170 $xmm0 = VCVTSI642SSZrr_Int $xmm0, $noreg
2171 ; CHECK: $xmm0 = VCVTSS2SDrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2172 $xmm0 = VCVTSS2SDZrm $xmm0, $rdi, 1, $noreg, 0, $noreg
2173 ; CHECK: $xmm0 = VCVTSS2SDrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2174 $xmm0 = VCVTSS2SDZrm_Int $xmm0, $rdi, 1, $noreg, 0, $noreg
2175 ; CHECK: $xmm0 = VCVTSS2SDrr $xmm0, $noreg
2176 $xmm0 = VCVTSS2SDZrr $xmm0, $noreg
2177 ; CHECK: $xmm0 = VCVTSS2SDrr_Int $xmm0, $noreg
2178 $xmm0 = VCVTSS2SDZrr_Int $xmm0, $noreg
2179 ; CHECK: $rdi = VCVTSS2SI64rm_Int $rdi, $xmm0, 1, $noreg, 0
2180 $rdi = VCVTSS2SI64Zrm_Int $rdi, $xmm0, 1, $noreg, 0
2181 ; CHECK: $rdi = VCVTSS2SI64rr_Int $xmm0
2182 $rdi = VCVTSS2SI64Zrr_Int $xmm0
2183 ; CHECK: $edi = VCVTSS2SIrm_Int $rdi, $xmm0, 1, $noreg, 0
2184 $edi = VCVTSS2SIZrm_Int $rdi, $xmm0, 1, $noreg, 0
2185 ; CHECK: $edi = VCVTSS2SIrr_Int $xmm0
2186 $edi = VCVTSS2SIZrr_Int $xmm0
2187 ; CHECK: $rdi = VCVTTSD2SI64rm $rdi, $xmm0, 1, $noreg, 0
2188 $rdi = VCVTTSD2SI64Zrm $rdi, $xmm0, 1, $noreg, 0
2189 ; CHECK: $rdi = VCVTTSD2SI64rm_Int $rdi, $xmm0, 1, $noreg, 0
2190 $rdi = VCVTTSD2SI64Zrm_Int $rdi, $xmm0, 1, $noreg, 0
2191 ; CHECK: $rdi = VCVTTSD2SI64rr $xmm0
2192 $rdi = VCVTTSD2SI64Zrr $xmm0
2193 ; CHECK: $rdi = VCVTTSD2SI64rr_Int $xmm0
2194 $rdi = VCVTTSD2SI64Zrr_Int $xmm0
2195 ; CHECK: $edi = VCVTTSD2SIrm $rdi, $xmm0, 1, $noreg, 0
2196 $edi = VCVTTSD2SIZrm $rdi, $xmm0, 1, $noreg, 0
2197 ; CHECK: $edi = VCVTTSD2SIrm_Int $rdi, $xmm0, 1, $noreg, 0
2198 $edi = VCVTTSD2SIZrm_Int $rdi, $xmm0, 1, $noreg, 0
2199 ; CHECK: $edi = VCVTTSD2SIrr $xmm0
2200 $edi = VCVTTSD2SIZrr $xmm0
2201 ; CHECK: $edi = VCVTTSD2SIrr_Int $xmm0
2202 $edi = VCVTTSD2SIZrr_Int $xmm0
2203 ; CHECK: $rdi = VCVTTSS2SI64rm $rdi, $xmm0, 1, $noreg, 0
2204 $rdi = VCVTTSS2SI64Zrm $rdi, $xmm0, 1, $noreg, 0
2205 ; CHECK: $rdi = VCVTTSS2SI64rm_Int $rdi, $xmm0, 1, $noreg, 0
2206 $rdi = VCVTTSS2SI64Zrm_Int $rdi, $xmm0, 1, $noreg, 0
2207 ; CHECK: $rdi = VCVTTSS2SI64rr $xmm0
2208 $rdi = VCVTTSS2SI64Zrr $xmm0
2209 ; CHECK: $rdi = VCVTTSS2SI64rr_Int $xmm0
2210 $rdi = VCVTTSS2SI64Zrr_Int $xmm0
2211 ; CHECK: $edi = VCVTTSS2SIrm $rdi, $xmm0, 1, $noreg, 0
2212 $edi = VCVTTSS2SIZrm $rdi, $xmm0, 1, $noreg, 0
2213 ; CHECK: $edi = VCVTTSS2SIrm_Int $rdi, $xmm0, 1, $noreg, 0
2214 $edi = VCVTTSS2SIZrm_Int $rdi, $xmm0, 1, $noreg, 0
2215 ; CHECK: $edi = VCVTTSS2SIrr $xmm0
2216 $edi = VCVTTSS2SIZrr $xmm0
2217 ; CHECK: $edi = VCVTTSS2SIrr_Int $xmm0
2218 $edi = VCVTTSS2SIZrr_Int $xmm0
2219 ; CHECK: $xmm0 = VMOV64toSDrr $rdi
2220 $xmm0 = VMOV64toSDZrr $rdi
2221 ; CHECK: $xmm0 = VMOVDI2SSrm $rip, $noreg, $noreg, $noreg, $noreg
2222 $xmm0 = VMOVDI2SSZrm $rip, $noreg, $noreg, $noreg, $noreg
2223 ; CHECK: $xmm0 = VMOVDI2SSrr $eax
2224 $xmm0 = VMOVDI2SSZrr $eax
2225 ; CHECK: VMOVSDmr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2226 VMOVSDZmr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2227 ; CHECK: $xmm0 = VMOVSDrm $rip, $noreg, $noreg, $noreg, $noreg
2228 $xmm0 = VMOVSDZrm $rip, $noreg, $noreg, $noreg, $noreg
2229 ; CHECK: $xmm0 = VMOVSDrr $xmm0, $noreg
2230 $xmm0 = VMOVSDZrr $xmm0, $noreg
2231 ; CHECK: $xmm0 = VMOVSDrr_REV $xmm0, $noreg
2232 $xmm0 = VMOVSDZrr_REV $xmm0, $noreg
2233 ; CHECK: $rax = VMOVSDto64rr $xmm0
2234 $rax = VMOVSDto64Zrr $xmm0
2235 ; CHECK: VMOVSDto64mr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2236 VMOVSDto64Zmr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2237 ; CHECK: VMOVSSmr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2238 VMOVSSZmr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2239 ; CHECK: $xmm0 = VMOVSSrm $rip, $noreg, $noreg, $noreg, $noreg
2240 $xmm0 = VMOVSSZrm $rip, $noreg, $noreg, $noreg, $noreg
2241 ; CHECK: $xmm0 = VMOVSSrr $xmm0, $noreg
2242 $xmm0 = VMOVSSZrr $xmm0, $noreg
2243 ; CHECK: $xmm0 = VMOVSSrr_REV $xmm0, $noreg
2244 $xmm0 = VMOVSSZrr_REV $xmm0, $noreg
2245 ; CHECK: VMOVSS2DImr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2246 VMOVSS2DIZmr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2247 ; CHECK: $eax = VMOVSS2DIrr $xmm0
2248 $eax = VMOVSS2DIZrr $xmm0
2249 ; CHECK: $xmm0 = VMOV64toPQIrr $rdi
2250 $xmm0 = VMOV64toPQIZrr $rdi
2251 ; CHECK: $xmm0 = VMOV64toPQIrm $rdi, $noreg, $noreg, $noreg, $noreg
2252 $xmm0 = VMOV64toPQIZrm $rdi, $noreg, $noreg, $noreg, $noreg
2253 ; CHECK: $xmm0 = VMOV64toSDrr $rdi
2254 $xmm0 = VMOV64toSDZrr $rdi
2255 ; CHECK: $xmm0 = VMOVDI2PDIrm $rip, $noreg, $noreg, $noreg, $noreg
2256 $xmm0 = VMOVDI2PDIZrm $rip, $noreg, $noreg, $noreg, $noreg
2257 ; CHECK: $xmm0 = VMOVDI2PDIrr $edi
2258 $xmm0 = VMOVDI2PDIZrr $edi
2259 ; CHECK: $xmm0 = VMOVLHPSrr $xmm0, $noreg
2260 $xmm0 = VMOVLHPSZrr $xmm0, $noreg
2261 ; CHECK: $xmm0 = VMOVHLPSrr $xmm0, $noreg
2262 $xmm0 = VMOVHLPSZrr $xmm0, $noreg
2263 ; CHECK: VMOVPDI2DImr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2264 VMOVPDI2DIZmr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2265 ; CHECK: $edi = VMOVPDI2DIrr $xmm0
2266 $edi = VMOVPDI2DIZrr $xmm0
2267 ; CHECK: $xmm0 = VMOVPQI2QIrr $xmm0
2268 $xmm0 = VMOVPQI2QIZrr $xmm0
2269 ; CHECK: VMOVPQI2QImr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2270 VMOVPQI2QIZmr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2271 ; CHECK: $rdi = VMOVPQIto64rr $xmm0
2272 $rdi = VMOVPQIto64Zrr $xmm0
2273 ; CHECK: VMOVPQIto64mr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2274 VMOVPQIto64Zmr $rdi, $xmm0, $noreg, $noreg, $noreg, $noreg
2275 ; CHECK: $xmm0 = VMOVQI2PQIrm $rip, $noreg, $noreg, $noreg, $noreg
2276 $xmm0 = VMOVQI2PQIZrm $rip, $noreg, $noreg, $noreg, $noreg
2277 ; CHECK: $xmm0 = VMOVZPQILo2PQIrr $xmm0
2278 $xmm0 = VMOVZPQILo2PQIZrr $xmm0
2279 ; CHECK: VCOMISDrm_Int $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2280 VCOMISDZrm_Int $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2281 ; CHECK: VCOMISDrr_Int $xmm0, $xmm1, implicit-def $eflags
2282 VCOMISDZrr_Int $xmm0, $xmm1, implicit-def $eflags
2283 ; CHECK: VCOMISSrm_Int $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2284 VCOMISSZrm_Int $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2285 ; CHECK: VCOMISSrr_Int $xmm0, $xmm1, implicit-def $eflags
2286 VCOMISSZrr_Int $xmm0, $xmm1, implicit-def $eflags
2287 ; CHECK: VUCOMISDrm_Int $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2288 VUCOMISDZrm_Int $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2289 ; CHECK: VUCOMISDrr_Int $xmm0, $xmm1, implicit-def $eflags
2290 VUCOMISDZrr_Int $xmm0, $xmm1, implicit-def $eflags
2291 ; CHECK: VUCOMISSrm_Int $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2292 VUCOMISSZrm_Int $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2293 ; CHECK: VUCOMISSrr_Int $xmm0, $xmm1, implicit-def $eflags
2294 VUCOMISSZrr_Int $xmm0, $xmm1, implicit-def $eflags
2295 ; CHECK: VCOMISDrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2296 VCOMISDZrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2297 ; CHECK: VCOMISDrr $xmm0, $xmm1, implicit-def $eflags
2298 VCOMISDZrr $xmm0, $xmm1, implicit-def $eflags
2299 ; CHECK: VCOMISSrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2300 VCOMISSZrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2301 ; CHECK: VCOMISSrr $xmm0, $xmm1, implicit-def $eflags
2302 VCOMISSZrr $xmm0, $xmm1, implicit-def $eflags
2303 ; CHECK: VUCOMISDrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2304 VUCOMISDZrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2305 ; CHECK: VUCOMISDrr $xmm0, $xmm1, implicit-def $eflags
2306 VUCOMISDZrr $xmm0, $xmm1, implicit-def $eflags
2307 ; CHECK: VUCOMISSrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2308 VUCOMISSZrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
2309 ; CHECK: VUCOMISSrr $xmm0, $xmm1, implicit-def $eflags
2310 VUCOMISSZrr $xmm0, $xmm1, implicit-def $eflags
2311 ; CHECK: VEXTRACTPSmr $rdi, 1, $noreg, 0, $noreg, $xmm0, $noreg
2312 VEXTRACTPSZmr $rdi, 1, $noreg, 0, $noreg, $xmm0, $noreg
2313 ; CHECK: $eax = VEXTRACTPSrr $xmm0, $noreg
2314 $eax = VEXTRACTPSZrr $xmm0, $noreg
2315 ; CHECK: $xmm0 = VINSERTPSrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, $noreg
2316 $xmm0 = VINSERTPSZrm $xmm0, $rdi, $noreg, $noreg, $noreg, $noreg, $noreg
2317 ; CHECK: $xmm0 = VINSERTPSrr $xmm0, $xmm0, $noreg
2318 $xmm0 = VINSERTPSZrr $xmm0, $xmm0, $noreg
2320 RET 0, $zmm0, $zmm1
2321 ...
2322 ---
2323 # CHECK-LABEL: name: evex_z256_to_evex_test
2324 # CHECK: bb.0:
2326 name: evex_z256_to_evex_test
2327 body: |
2328 bb.0:
2329 ; CHECK: VMOVAPDZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2330 VMOVAPDZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2331 ; CHECK: $ymm16 = VMOVAPDZ256rm $rip, 1, $noreg, $rax, $noreg
2332 $ymm16 = VMOVAPDZ256rm $rip, 1, $noreg, $rax, $noreg
2333 ; CHECK: $ymm16 = VMOVAPDZ256rr $ymm16
2334 $ymm16 = VMOVAPDZ256rr $ymm16
2335 ; CHECK: $ymm16 = VMOVAPDZ256rr_REV $ymm16
2336 $ymm16 = VMOVAPDZ256rr_REV $ymm16
2337 ; CHECK: VMOVAPSZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2338 VMOVAPSZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2339 ; CHECK: $ymm16 = VMOVAPSZ256rm $rip, 1, $noreg, $rax, $noreg
2340 $ymm16 = VMOVAPSZ256rm $rip, 1, $noreg, $rax, $noreg
2341 ; CHECK: $ymm16 = VMOVAPSZ256rr $ymm16
2342 $ymm16 = VMOVAPSZ256rr $ymm16
2343 ; CHECK: $ymm16 = VMOVAPSZ256rr_REV $ymm16
2344 $ymm16 = VMOVAPSZ256rr_REV $ymm16
2345 ; CHECK: $ymm16 = VMOVDDUPZ256rm $rip, 1, $noreg, $rax, $noreg
2346 $ymm16 = VMOVDDUPZ256rm $rip, 1, $noreg, $rax, $noreg
2347 ; CHECK: $ymm16 = VMOVDDUPZ256rr $ymm16
2348 $ymm16 = VMOVDDUPZ256rr $ymm16
2349 ; CHECK: VMOVDQA32Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2350 VMOVDQA32Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2351 ; CHECK: $ymm16 = VMOVDQA32Z256rm $rip, 1, $noreg, $rax, $noreg
2352 $ymm16 = VMOVDQA32Z256rm $rip, 1, $noreg, $rax, $noreg
2353 ; CHECK: $ymm16 = VMOVDQA32Z256rr $ymm16
2354 $ymm16 = VMOVDQA32Z256rr $ymm16
2355 ; CHECK: $ymm16 = VMOVDQA32Z256rr_REV $ymm16
2356 $ymm16 = VMOVDQA32Z256rr_REV $ymm16
2357 ; CHECK: VMOVDQA64Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2358 VMOVDQA64Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2359 ; CHECK: $ymm16 = VMOVDQA64Z256rm $rip, 1, $noreg, $rax, $noreg
2360 $ymm16 = VMOVDQA64Z256rm $rip, 1, $noreg, $rax, $noreg
2361 ; CHECK: $ymm16 = VMOVDQA64Z256rr $ymm16
2362 $ymm16 = VMOVDQA64Z256rr $ymm16
2363 ; CHECK: $ymm16 = VMOVDQA64Z256rr_REV $ymm16
2364 $ymm16 = VMOVDQA64Z256rr_REV $ymm16
2365 ; CHECK: VMOVDQU16Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2366 VMOVDQU16Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2367 ; CHECK: $ymm16 = VMOVDQU16Z256rm $rip, 1, $noreg, $rax, $noreg
2368 $ymm16 = VMOVDQU16Z256rm $rip, 1, $noreg, $rax, $noreg
2369 ; CHECK: $ymm16 = VMOVDQU16Z256rr $ymm16
2370 $ymm16 = VMOVDQU16Z256rr $ymm16
2371 ; CHECK: $ymm16 = VMOVDQU16Z256rr_REV $ymm16
2372 $ymm16 = VMOVDQU16Z256rr_REV $ymm16
2373 ; CHECK: VMOVDQU32Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2374 VMOVDQU32Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2375 ; CHECK: $ymm16 = VMOVDQU32Z256rm $rip, 1, $noreg, $rax, $noreg
2376 $ymm16 = VMOVDQU32Z256rm $rip, 1, $noreg, $rax, $noreg
2377 ; CHECK: $ymm16 = VMOVDQU32Z256rr $ymm16
2378 $ymm16 = VMOVDQU32Z256rr $ymm16
2379 ; CHECK: $ymm16 = VMOVDQU32Z256rr_REV $ymm16
2380 $ymm16 = VMOVDQU32Z256rr_REV $ymm16
2381 ; CHECK: VMOVDQU64Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2382 VMOVDQU64Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2383 ; CHECK: $ymm16 = VMOVDQU64Z256rm $rip, 1, $noreg, $rax, $noreg
2384 $ymm16 = VMOVDQU64Z256rm $rip, 1, $noreg, $rax, $noreg
2385 ; CHECK: $ymm16 = VMOVDQU64Z256rr $ymm16
2386 $ymm16 = VMOVDQU64Z256rr $ymm16
2387 ; CHECK: $ymm16 = VMOVDQU64Z256rr_REV $ymm16
2388 $ymm16 = VMOVDQU64Z256rr_REV $ymm16
2389 ; CHECK: VMOVDQU8Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2390 VMOVDQU8Z256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2391 ; CHECK: $ymm16 = VMOVDQU8Z256rm $rip, 1, $noreg, $rax, $noreg
2392 $ymm16 = VMOVDQU8Z256rm $rip, 1, $noreg, $rax, $noreg
2393 ; CHECK: $ymm16 = VMOVDQU8Z256rr $ymm16
2394 $ymm16 = VMOVDQU8Z256rr $ymm16
2395 ; CHECK: $ymm16 = VMOVDQU8Z256rr_REV $ymm16
2396 $ymm16 = VMOVDQU8Z256rr_REV $ymm16
2397 ; CHECK: $ymm16 = VMOVNTDQAZ256rm $rip, 1, $noreg, $rax, $noreg
2398 $ymm16 = VMOVNTDQAZ256rm $rip, 1, $noreg, $rax, $noreg
2399 ; CHECK: VMOVNTDQZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2400 VMOVNTDQZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2401 ; CHECK: VMOVNTPDZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2402 VMOVNTPDZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2403 ; CHECK: VMOVNTPSZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2404 VMOVNTPSZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2405 ; CHECK: $ymm16 = VMOVSHDUPZ256rm $rip, 1, $noreg, $rax, $noreg
2406 $ymm16 = VMOVSHDUPZ256rm $rip, 1, $noreg, $rax, $noreg
2407 ; CHECK: $ymm16 = VMOVSHDUPZ256rr $ymm16
2408 $ymm16 = VMOVSHDUPZ256rr $ymm16
2409 ; CHECK: $ymm16 = VMOVSLDUPZ256rm $rip, 1, $noreg, $rax, $noreg
2410 $ymm16 = VMOVSLDUPZ256rm $rip, 1, $noreg, $rax, $noreg
2411 ; CHECK: $ymm16 = VMOVSLDUPZ256rr $ymm16
2412 $ymm16 = VMOVSLDUPZ256rr $ymm16
2413 ; CHECK: VMOVUPDZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2414 VMOVUPDZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2415 ; CHECK: $ymm16 = VMOVUPDZ256rm $rip, 1, $noreg, $rax, $noreg
2416 $ymm16 = VMOVUPDZ256rm $rip, 1, $noreg, $rax, $noreg
2417 ; CHECK: $ymm16 = VMOVUPDZ256rr $ymm16
2418 $ymm16 = VMOVUPDZ256rr $ymm16
2419 ; CHECK: $ymm16 = VMOVUPDZ256rr_REV $ymm16
2420 $ymm16 = VMOVUPDZ256rr_REV $ymm16
2421 ; CHECK: VMOVUPSZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2422 VMOVUPSZ256mr $rdi, 1, $noreg, 0, $noreg, $ymm16
2423 ; CHECK: $ymm16 = VPANDDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2424 $ymm16 = VPANDDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2425 ; CHECK: $ymm16 = VPANDDZ256rr $ymm16, $ymm1
2426 $ymm16 = VPANDDZ256rr $ymm16, $ymm1
2427 ; CHECK: $ymm16 = VPANDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2428 $ymm16 = VPANDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2429 ; CHECK: $ymm16 = VPANDQZ256rr $ymm16, $ymm1
2430 $ymm16 = VPANDQZ256rr $ymm16, $ymm1
2431 ; CHECK: $ymm16 = VPANDNDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2432 $ymm16 = VPANDNDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2433 ; CHECK: $ymm16 = VPANDNDZ256rr $ymm16, $ymm1
2434 $ymm16 = VPANDNDZ256rr $ymm16, $ymm1
2435 ; CHECK: $ymm16 = VPANDNQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2436 $ymm16 = VPANDNQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2437 ; CHECK: $ymm16 = VPANDNQZ256rr $ymm16, $ymm1
2438 $ymm16 = VPANDNQZ256rr $ymm16, $ymm1
2439 ; CHECK: $ymm16 = VPAVGBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2440 $ymm16 = VPAVGBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2441 ; CHECK: $ymm16 = VPAVGBZ256rr $ymm16, $ymm1
2442 $ymm16 = VPAVGBZ256rr $ymm16, $ymm1
2443 ; CHECK: $ymm16 = VPAVGWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2444 $ymm16 = VPAVGWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2445 ; CHECK: $ymm16 = VPAVGWZ256rr $ymm16, $ymm1
2446 $ymm16 = VPAVGWZ256rr $ymm16, $ymm1
2447 ; CHECK: $ymm16 = VPADDBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2448 $ymm16 = VPADDBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2449 ; CHECK: $ymm16 = VPADDBZ256rr $ymm16, $ymm1
2450 $ymm16 = VPADDBZ256rr $ymm16, $ymm1
2451 ; CHECK: $ymm16 = VPADDDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2452 $ymm16 = VPADDDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2453 ; CHECK: $ymm16 = VPADDDZ256rr $ymm16, $ymm1
2454 $ymm16 = VPADDDZ256rr $ymm16, $ymm1
2455 ; CHECK: $ymm16 = VPADDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2456 $ymm16 = VPADDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2457 ; CHECK: $ymm16 = VPADDQZ256rr $ymm16, $ymm1
2458 $ymm16 = VPADDQZ256rr $ymm16, $ymm1
2459 ; CHECK: $ymm16 = VPADDSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2460 $ymm16 = VPADDSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2461 ; CHECK: $ymm16 = VPADDSBZ256rr $ymm16, $ymm1
2462 $ymm16 = VPADDSBZ256rr $ymm16, $ymm1
2463 ; CHECK: $ymm16 = VPADDSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2464 $ymm16 = VPADDSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2465 ; CHECK: $ymm16 = VPADDSWZ256rr $ymm16, $ymm1
2466 $ymm16 = VPADDSWZ256rr $ymm16, $ymm1
2467 ; CHECK: $ymm16 = VPADDUSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2468 $ymm16 = VPADDUSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2469 ; CHECK: $ymm16 = VPADDUSBZ256rr $ymm16, $ymm1
2470 $ymm16 = VPADDUSBZ256rr $ymm16, $ymm1
2471 ; CHECK: $ymm16 = VPADDUSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2472 $ymm16 = VPADDUSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2473 ; CHECK: $ymm16 = VPADDUSWZ256rr $ymm16, $ymm1
2474 $ymm16 = VPADDUSWZ256rr $ymm16, $ymm1
2475 ; CHECK: $ymm16 = VPADDWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2476 $ymm16 = VPADDWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2477 ; CHECK: $ymm16 = VPADDWZ256rr $ymm16, $ymm1
2478 $ymm16 = VPADDWZ256rr $ymm16, $ymm1
2479 ; CHECK: $ymm16 = VMULPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2480 $ymm16 = VMULPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2481 ; CHECK: $ymm16 = VMULPDZ256rr $ymm16, $ymm1
2482 $ymm16 = VMULPDZ256rr $ymm16, $ymm1
2483 ; CHECK: $ymm16 = VMULPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2484 $ymm16 = VMULPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2485 ; CHECK: $ymm16 = VMULPSZ256rr $ymm16, $ymm1
2486 $ymm16 = VMULPSZ256rr $ymm16, $ymm1
2487 ; CHECK: $ymm16 = VORPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2488 $ymm16 = VORPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2489 ; CHECK: $ymm16 = VORPDZ256rr $ymm16, $ymm1
2490 $ymm16 = VORPDZ256rr $ymm16, $ymm1
2491 ; CHECK: $ymm16 = VORPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2492 $ymm16 = VORPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2493 ; CHECK: $ymm16 = VORPSZ256rr $ymm16, $ymm1
2494 $ymm16 = VORPSZ256rr $ymm16, $ymm1
2495 ; CHECK: $ymm16 = VPMADDUBSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2496 $ymm16 = VPMADDUBSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2497 ; CHECK: $ymm16 = VPMADDUBSWZ256rr $ymm16, $ymm1
2498 $ymm16 = VPMADDUBSWZ256rr $ymm16, $ymm1
2499 ; CHECK: $ymm16 = VPMADDWDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2500 $ymm16 = VPMADDWDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2501 ; CHECK: $ymm16 = VPMADDWDZ256rr $ymm16, $ymm1
2502 $ymm16 = VPMADDWDZ256rr $ymm16, $ymm1
2503 ; CHECK: $ymm16 = VPMAXSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2504 $ymm16 = VPMAXSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2505 ; CHECK: $ymm16 = VPMAXSBZ256rr $ymm16, $ymm1
2506 $ymm16 = VPMAXSBZ256rr $ymm16, $ymm1
2507 ; CHECK: $ymm16 = VPMAXSDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2508 $ymm16 = VPMAXSDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2509 ; CHECK: $ymm16 = VPMAXSDZ256rr $ymm16, $ymm1
2510 $ymm16 = VPMAXSDZ256rr $ymm16, $ymm1
2511 ; CHECK: $ymm16 = VPMAXSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2512 $ymm16 = VPMAXSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2513 ; CHECK: $ymm16 = VPMAXSWZ256rr $ymm16, $ymm1
2514 $ymm16 = VPMAXSWZ256rr $ymm16, $ymm1
2515 ; CHECK: $ymm16 = VPMAXUBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2516 $ymm16 = VPMAXUBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2517 ; CHECK: $ymm16 = VPMAXUBZ256rr $ymm16, $ymm1
2518 $ymm16 = VPMAXUBZ256rr $ymm16, $ymm1
2519 ; CHECK: $ymm16 = VPMAXUDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2520 $ymm16 = VPMAXUDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2521 ; CHECK: $ymm16 = VPMAXUDZ256rr $ymm16, $ymm1
2522 $ymm16 = VPMAXUDZ256rr $ymm16, $ymm1
2523 ; CHECK: $ymm16 = VPMAXUWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2524 $ymm16 = VPMAXUWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2525 ; CHECK: $ymm16 = VPMAXUWZ256rr $ymm16, $ymm1
2526 $ymm16 = VPMAXUWZ256rr $ymm16, $ymm1
2527 ; CHECK: $ymm16 = VPMINSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2528 $ymm16 = VPMINSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2529 ; CHECK: $ymm16 = VPMINSBZ256rr $ymm16, $ymm1
2530 $ymm16 = VPMINSBZ256rr $ymm16, $ymm1
2531 ; CHECK: $ymm16 = VPMINSDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2532 $ymm16 = VPMINSDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2533 ; CHECK: $ymm16 = VPMINSDZ256rr $ymm16, $ymm1
2534 $ymm16 = VPMINSDZ256rr $ymm16, $ymm1
2535 ; CHECK: $ymm16 = VPMINSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2536 $ymm16 = VPMINSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2537 ; CHECK: $ymm16 = VPMINSWZ256rr $ymm16, $ymm1
2538 $ymm16 = VPMINSWZ256rr $ymm16, $ymm1
2539 ; CHECK: $ymm16 = VPMINUBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2540 $ymm16 = VPMINUBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2541 ; CHECK: $ymm16 = VPMINUBZ256rr $ymm16, $ymm1
2542 $ymm16 = VPMINUBZ256rr $ymm16, $ymm1
2543 ; CHECK: $ymm16 = VPMINUDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2544 $ymm16 = VPMINUDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2545 ; CHECK: $ymm16 = VPMINUDZ256rr $ymm16, $ymm1
2546 $ymm16 = VPMINUDZ256rr $ymm16, $ymm1
2547 ; CHECK: $ymm16 = VPMINUWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2548 $ymm16 = VPMINUWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2549 ; CHECK: $ymm16 = VPMINUWZ256rr $ymm16, $ymm1
2550 $ymm16 = VPMINUWZ256rr $ymm16, $ymm1
2551 ; CHECK: $ymm16 = VPMULDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2552 $ymm16 = VPMULDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2553 ; CHECK: $ymm16 = VPMULDQZ256rr $ymm16, $ymm1
2554 $ymm16 = VPMULDQZ256rr $ymm16, $ymm1
2555 ; CHECK: $ymm16 = VPMULHRSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2556 $ymm16 = VPMULHRSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2557 ; CHECK: $ymm16 = VPMULHRSWZ256rr $ymm16, $ymm1
2558 $ymm16 = VPMULHRSWZ256rr $ymm16, $ymm1
2559 ; CHECK: $ymm16 = VPMULHUWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2560 $ymm16 = VPMULHUWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2561 ; CHECK: $ymm16 = VPMULHUWZ256rr $ymm16, $ymm1
2562 $ymm16 = VPMULHUWZ256rr $ymm16, $ymm1
2563 ; CHECK: $ymm16 = VPMULHWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2564 $ymm16 = VPMULHWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2565 ; CHECK: $ymm16 = VPMULHWZ256rr $ymm16, $ymm1
2566 $ymm16 = VPMULHWZ256rr $ymm16, $ymm1
2567 ; CHECK: $ymm16 = VPMULLDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2568 $ymm16 = VPMULLDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2569 ; CHECK: $ymm16 = VPMULLDZ256rr $ymm16, $ymm1
2570 $ymm16 = VPMULLDZ256rr $ymm16, $ymm1
2571 ; CHECK: $ymm16 = VPMULLWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2572 $ymm16 = VPMULLWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2573 ; CHECK: $ymm16 = VPMULLWZ256rr $ymm16, $ymm1
2574 $ymm16 = VPMULLWZ256rr $ymm16, $ymm1
2575 ; CHECK: $ymm16 = VPMULUDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2576 $ymm16 = VPMULUDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2577 ; CHECK: $ymm16 = VPMULUDQZ256rr $ymm16, $ymm1
2578 $ymm16 = VPMULUDQZ256rr $ymm16, $ymm1
2579 ; CHECK: $ymm16 = VPORDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2580 $ymm16 = VPORDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2581 ; CHECK: $ymm16 = VPORDZ256rr $ymm16, $ymm1
2582 $ymm16 = VPORDZ256rr $ymm16, $ymm1
2583 ; CHECK: $ymm16 = VPORQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2584 $ymm16 = VPORQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2585 ; CHECK: $ymm16 = VPORQZ256rr $ymm16, $ymm1
2586 $ymm16 = VPORQZ256rr $ymm16, $ymm1
2587 ; CHECK: $ymm16 = VPSUBBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2588 $ymm16 = VPSUBBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2589 ; CHECK: $ymm16 = VPSUBBZ256rr $ymm16, $ymm1
2590 $ymm16 = VPSUBBZ256rr $ymm16, $ymm1
2591 ; CHECK: $ymm16 = VPSUBDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2592 $ymm16 = VPSUBDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2593 ; CHECK: $ymm16 = VPSUBDZ256rr $ymm16, $ymm1
2594 $ymm16 = VPSUBDZ256rr $ymm16, $ymm1
2595 ; CHECK: $ymm16 = VPSUBQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2596 $ymm16 = VPSUBQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2597 ; CHECK: $ymm16 = VPSUBQZ256rr $ymm16, $ymm1
2598 $ymm16 = VPSUBQZ256rr $ymm16, $ymm1
2599 ; CHECK: $ymm16 = VPSUBSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2600 $ymm16 = VPSUBSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2601 ; CHECK: $ymm16 = VPSUBSBZ256rr $ymm16, $ymm1
2602 $ymm16 = VPSUBSBZ256rr $ymm16, $ymm1
2603 ; CHECK: $ymm16 = VPSUBSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2604 $ymm16 = VPSUBSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2605 ; CHECK: $ymm16 = VPSUBSWZ256rr $ymm16, $ymm1
2606 $ymm16 = VPSUBSWZ256rr $ymm16, $ymm1
2607 ; CHECK: $ymm16 = VPSUBUSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2608 $ymm16 = VPSUBUSBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2609 ; CHECK: $ymm16 = VPSUBUSBZ256rr $ymm16, $ymm1
2610 $ymm16 = VPSUBUSBZ256rr $ymm16, $ymm1
2611 ; CHECK: $ymm16 = VPSUBUSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2612 $ymm16 = VPSUBUSWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2613 ; CHECK: $ymm16 = VPSUBUSWZ256rr $ymm16, $ymm1
2614 $ymm16 = VPSUBUSWZ256rr $ymm16, $ymm1
2615 ; CHECK: $ymm16 = VPSUBWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2616 $ymm16 = VPSUBWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2617 ; CHECK: $ymm16 = VPSUBWZ256rr $ymm16, $ymm1
2618 $ymm16 = VPSUBWZ256rr $ymm16, $ymm1
2619 ; CHECK: $ymm16 = VPXORDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2620 $ymm16 = VPXORDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2621 ; CHECK: $ymm16 = VPXORDZ256rr $ymm16, $ymm1
2622 $ymm16 = VPXORDZ256rr $ymm16, $ymm1
2623 ; CHECK: $ymm16 = VPXORQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2624 $ymm16 = VPXORQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2625 ; CHECK: $ymm16 = VPXORQZ256rr $ymm16, $ymm1
2626 $ymm16 = VPXORQZ256rr $ymm16, $ymm1
2627 ; CHECK: $ymm16 = VADDPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2628 $ymm16 = VADDPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2629 ; CHECK: $ymm16 = VADDPDZ256rr $ymm16, $ymm1
2630 $ymm16 = VADDPDZ256rr $ymm16, $ymm1
2631 ; CHECK: $ymm16 = VADDPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2632 $ymm16 = VADDPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2633 ; CHECK: $ymm16 = VADDPSZ256rr $ymm16, $ymm1
2634 $ymm16 = VADDPSZ256rr $ymm16, $ymm1
2635 ; CHECK: $ymm16 = VANDNPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2636 $ymm16 = VANDNPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2637 ; CHECK: $ymm16 = VANDNPDZ256rr $ymm16, $ymm1
2638 $ymm16 = VANDNPDZ256rr $ymm16, $ymm1
2639 ; CHECK: $ymm16 = VANDNPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2640 $ymm16 = VANDNPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2641 ; CHECK: $ymm16 = VANDNPSZ256rr $ymm16, $ymm1
2642 $ymm16 = VANDNPSZ256rr $ymm16, $ymm1
2643 ; CHECK: $ymm16 = VANDPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2644 $ymm16 = VANDPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2645 ; CHECK: $ymm16 = VANDPDZ256rr $ymm16, $ymm1
2646 $ymm16 = VANDPDZ256rr $ymm16, $ymm1
2647 ; CHECK: $ymm16 = VANDPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2648 $ymm16 = VANDPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2649 ; CHECK: $ymm16 = VANDPSZ256rr $ymm16, $ymm1
2650 $ymm16 = VANDPSZ256rr $ymm16, $ymm1
2651 ; CHECK: $ymm16 = VDIVPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2652 $ymm16 = VDIVPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2653 ; CHECK: $ymm16 = VDIVPDZ256rr $ymm16, $ymm1
2654 $ymm16 = VDIVPDZ256rr $ymm16, $ymm1
2655 ; CHECK: $ymm16 = VDIVPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2656 $ymm16 = VDIVPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2657 ; CHECK: $ymm16 = VDIVPSZ256rr $ymm16, $ymm1
2658 $ymm16 = VDIVPSZ256rr $ymm16, $ymm1
2659 ; CHECK: $ymm16 = VMAXCPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2660 $ymm16 = VMAXCPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2661 ; CHECK: $ymm16 = VMAXCPDZ256rr $ymm16, $ymm1
2662 $ymm16 = VMAXCPDZ256rr $ymm16, $ymm1
2663 ; CHECK: $ymm16 = VMAXCPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2664 $ymm16 = VMAXCPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2665 ; CHECK: $ymm16 = VMAXCPSZ256rr $ymm16, $ymm1
2666 $ymm16 = VMAXCPSZ256rr $ymm16, $ymm1
2667 ; CHECK: $ymm16 = VMAXPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2668 $ymm16 = VMAXPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2669 ; CHECK: $ymm16 = VMAXPDZ256rr $ymm16, $ymm1
2670 $ymm16 = VMAXPDZ256rr $ymm16, $ymm1
2671 ; CHECK: $ymm16 = VMAXPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2672 $ymm16 = VMAXPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2673 ; CHECK: $ymm16 = VMAXPSZ256rr $ymm16, $ymm1
2674 $ymm16 = VMAXPSZ256rr $ymm16, $ymm1
2675 ; CHECK: $ymm16 = VMINCPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2676 $ymm16 = VMINCPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2677 ; CHECK: $ymm16 = VMINCPDZ256rr $ymm16, $ymm1
2678 $ymm16 = VMINCPDZ256rr $ymm16, $ymm1
2679 ; CHECK: $ymm16 = VMINCPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2680 $ymm16 = VMINCPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2681 ; CHECK: $ymm16 = VMINCPSZ256rr $ymm16, $ymm1
2682 $ymm16 = VMINCPSZ256rr $ymm16, $ymm1
2683 ; CHECK: $ymm16 = VMINPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2684 $ymm16 = VMINPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2685 ; CHECK: $ymm16 = VMINPDZ256rr $ymm16, $ymm1
2686 $ymm16 = VMINPDZ256rr $ymm16, $ymm1
2687 ; CHECK: $ymm16 = VMINPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2688 $ymm16 = VMINPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2689 ; CHECK: $ymm16 = VMINPSZ256rr $ymm16, $ymm1
2690 $ymm16 = VMINPSZ256rr $ymm16, $ymm1
2691 ; CHECK: $ymm16 = VXORPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2692 $ymm16 = VXORPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2693 ; CHECK: $ymm16 = VXORPDZ256rr $ymm16, $ymm1
2694 $ymm16 = VXORPDZ256rr $ymm16, $ymm1
2695 ; CHECK: $ymm16 = VXORPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2696 $ymm16 = VXORPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2697 ; CHECK: $ymm16 = VXORPSZ256rr $ymm16, $ymm1
2698 $ymm16 = VXORPSZ256rr $ymm16, $ymm1
2699 ; CHECK: $ymm16 = VPACKSSDWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2700 $ymm16 = VPACKSSDWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2701 ; CHECK: $ymm16 = VPACKSSDWZ256rr $ymm16, $ymm1
2702 $ymm16 = VPACKSSDWZ256rr $ymm16, $ymm1
2703 ; CHECK: $ymm16 = VPACKSSWBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2704 $ymm16 = VPACKSSWBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2705 ; CHECK: $ymm16 = VPACKSSWBZ256rr $ymm16, $ymm1
2706 $ymm16 = VPACKSSWBZ256rr $ymm16, $ymm1
2707 ; CHECK: $ymm16 = VPACKUSDWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2708 $ymm16 = VPACKUSDWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2709 ; CHECK: $ymm16 = VPACKUSDWZ256rr $ymm16, $ymm1
2710 $ymm16 = VPACKUSDWZ256rr $ymm16, $ymm1
2711 ; CHECK: $ymm16 = VPACKUSWBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2712 $ymm16 = VPACKUSWBZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2713 ; CHECK: $ymm16 = VPACKUSWBZ256rr $ymm16, $ymm1
2714 $ymm16 = VPACKUSWBZ256rr $ymm16, $ymm1
2715 ; CHECK: $ymm16 = VUNPCKHPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2716 $ymm16 = VUNPCKHPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2717 ; CHECK: $ymm16 = VUNPCKHPDZ256rr $ymm16, $ymm1
2718 $ymm16 = VUNPCKHPDZ256rr $ymm16, $ymm1
2719 ; CHECK: $ymm16 = VUNPCKHPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2720 $ymm16 = VUNPCKHPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2721 ; CHECK: $ymm16 = VUNPCKHPSZ256rr $ymm16, $ymm1
2722 $ymm16 = VUNPCKHPSZ256rr $ymm16, $ymm1
2723 ; CHECK: $ymm16 = VUNPCKLPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2724 $ymm16 = VUNPCKLPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2725 ; CHECK: $ymm16 = VUNPCKLPDZ256rr $ymm16, $ymm1
2726 $ymm16 = VUNPCKLPDZ256rr $ymm16, $ymm1
2727 ; CHECK: $ymm16 = VUNPCKLPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2728 $ymm16 = VUNPCKLPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2729 ; CHECK: $ymm16 = VUNPCKLPSZ256rr $ymm16, $ymm1
2730 $ymm16 = VUNPCKLPSZ256rr $ymm16, $ymm1
2731 ; CHECK: $ymm16 = VSUBPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2732 $ymm16 = VSUBPDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2733 ; CHECK: $ymm16 = VSUBPDZ256rr $ymm16, $ymm1
2734 $ymm16 = VSUBPDZ256rr $ymm16, $ymm1
2735 ; CHECK: $ymm16 = VSUBPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2736 $ymm16 = VSUBPSZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2737 ; CHECK: $ymm16 = VSUBPSZ256rr $ymm16, $ymm1
2738 $ymm16 = VSUBPSZ256rr $ymm16, $ymm1
2739 ; CHECK: $ymm16 = VPUNPCKHBWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2740 $ymm16 = VPUNPCKHBWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2741 ; CHECK: $ymm16 = VPUNPCKHBWZ256rr $ymm16, $ymm1
2742 $ymm16 = VPUNPCKHBWZ256rr $ymm16, $ymm1
2743 ; CHECK: $ymm16 = VPUNPCKHDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2744 $ymm16 = VPUNPCKHDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2745 ; CHECK: $ymm16 = VPUNPCKHDQZ256rr $ymm16, $ymm1
2746 $ymm16 = VPUNPCKHDQZ256rr $ymm16, $ymm1
2747 ; CHECK: $ymm16 = VPUNPCKHQDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2748 $ymm16 = VPUNPCKHQDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2749 ; CHECK: $ymm16 = VPUNPCKHQDQZ256rr $ymm16, $ymm1
2750 $ymm16 = VPUNPCKHQDQZ256rr $ymm16, $ymm1
2751 ; CHECK: $ymm16 = VPUNPCKHWDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2752 $ymm16 = VPUNPCKHWDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2753 ; CHECK: $ymm16 = VPUNPCKHWDZ256rr $ymm16, $ymm1
2754 $ymm16 = VPUNPCKHWDZ256rr $ymm16, $ymm1
2755 ; CHECK: $ymm16 = VPUNPCKLBWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2756 $ymm16 = VPUNPCKLBWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2757 ; CHECK: $ymm16 = VPUNPCKLBWZ256rr $ymm16, $ymm1
2758 $ymm16 = VPUNPCKLBWZ256rr $ymm16, $ymm1
2759 ; CHECK: $ymm16 = VPUNPCKLDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2760 $ymm16 = VPUNPCKLDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2761 ; CHECK: $ymm16 = VPUNPCKLDQZ256rr $ymm16, $ymm1
2762 $ymm16 = VPUNPCKLDQZ256rr $ymm16, $ymm1
2763 ; CHECK: $ymm16 = VPUNPCKLQDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2764 $ymm16 = VPUNPCKLQDQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2765 ; CHECK: $ymm16 = VPUNPCKLQDQZ256rr $ymm16, $ymm1
2766 $ymm16 = VPUNPCKLQDQZ256rr $ymm16, $ymm1
2767 ; CHECK: $ymm16 = VPUNPCKLWDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2768 $ymm16 = VPUNPCKLWDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2769 ; CHECK: $ymm16 = VPUNPCKLWDZ256rr $ymm16, $ymm1
2770 $ymm16 = VPUNPCKLWDZ256rr $ymm16, $ymm1
2771 ; CHECK: $ymm16 = VFMADD132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2772 $ymm16 = VFMADD132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2773 ; CHECK: $ymm16 = VFMADD132PDZ256r $ymm16, $ymm1, $ymm2
2774 $ymm16 = VFMADD132PDZ256r $ymm16, $ymm1, $ymm2
2775 ; CHECK: $ymm16 = VFMADD132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2776 $ymm16 = VFMADD132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2777 ; CHECK: $ymm16 = VFMADD132PSZ256r $ymm16, $ymm1, $ymm2
2778 $ymm16 = VFMADD132PSZ256r $ymm16, $ymm1, $ymm2
2779 ; CHECK: $ymm16 = VFMADD213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2780 $ymm16 = VFMADD213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2781 ; CHECK: $ymm16 = VFMADD213PDZ256r $ymm16, $ymm1, $ymm2
2782 $ymm16 = VFMADD213PDZ256r $ymm16, $ymm1, $ymm2
2783 ; CHECK: $ymm16 = VFMADD213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2784 $ymm16 = VFMADD213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2785 ; CHECK: $ymm16 = VFMADD213PSZ256r $ymm16, $ymm1, $ymm2
2786 $ymm16 = VFMADD213PSZ256r $ymm16, $ymm1, $ymm2
2787 ; CHECK: $ymm16 = VFMADD231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2788 $ymm16 = VFMADD231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2789 ; CHECK: $ymm16 = VFMADD231PDZ256r $ymm16, $ymm1, $ymm2
2790 $ymm16 = VFMADD231PDZ256r $ymm16, $ymm1, $ymm2
2791 ; CHECK: $ymm16 = VFMADD231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2792 $ymm16 = VFMADD231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2793 ; CHECK: $ymm16 = VFMADD231PSZ256r $ymm16, $ymm1, $ymm2
2794 $ymm16 = VFMADD231PSZ256r $ymm16, $ymm1, $ymm2
2795 ; CHECK: $ymm16 = VFMADDSUB132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2796 $ymm16 = VFMADDSUB132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2797 ; CHECK: $ymm16 = VFMADDSUB132PDZ256r $ymm16, $ymm1, $ymm2
2798 $ymm16 = VFMADDSUB132PDZ256r $ymm16, $ymm1, $ymm2
2799 ; CHECK: $ymm16 = VFMADDSUB132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2800 $ymm16 = VFMADDSUB132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2801 ; CHECK: $ymm16 = VFMADDSUB132PSZ256r $ymm16, $ymm1, $ymm2
2802 $ymm16 = VFMADDSUB132PSZ256r $ymm16, $ymm1, $ymm2
2803 ; CHECK: $ymm16 = VFMADDSUB213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2804 $ymm16 = VFMADDSUB213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2805 ; CHECK: $ymm16 = VFMADDSUB213PDZ256r $ymm16, $ymm1, $ymm2
2806 $ymm16 = VFMADDSUB213PDZ256r $ymm16, $ymm1, $ymm2
2807 ; CHECK: $ymm16 = VFMADDSUB213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2808 $ymm16 = VFMADDSUB213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2809 ; CHECK: $ymm16 = VFMADDSUB213PSZ256r $ymm16, $ymm1, $ymm2
2810 $ymm16 = VFMADDSUB213PSZ256r $ymm16, $ymm1, $ymm2
2811 ; CHECK: $ymm16 = VFMADDSUB231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2812 $ymm16 = VFMADDSUB231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2813 ; CHECK: $ymm16 = VFMADDSUB231PDZ256r $ymm16, $ymm1, $ymm2
2814 $ymm16 = VFMADDSUB231PDZ256r $ymm16, $ymm1, $ymm2
2815 ; CHECK: $ymm16 = VFMADDSUB231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2816 $ymm16 = VFMADDSUB231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2817 ; CHECK: $ymm16 = VFMADDSUB231PSZ256r $ymm16, $ymm1, $ymm2
2818 $ymm16 = VFMADDSUB231PSZ256r $ymm16, $ymm1, $ymm2
2819 ; CHECK: $ymm16 = VFMSUB132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2820 $ymm16 = VFMSUB132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2821 ; CHECK: $ymm16 = VFMSUB132PDZ256r $ymm16, $ymm1, $ymm2
2822 $ymm16 = VFMSUB132PDZ256r $ymm16, $ymm1, $ymm2
2823 ; CHECK: $ymm16 = VFMSUB132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2824 $ymm16 = VFMSUB132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2825 ; CHECK: $ymm16 = VFMSUB132PSZ256r $ymm16, $ymm1, $ymm2
2826 $ymm16 = VFMSUB132PSZ256r $ymm16, $ymm1, $ymm2
2827 ; CHECK: $ymm16 = VFMSUB213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2828 $ymm16 = VFMSUB213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2829 ; CHECK: $ymm16 = VFMSUB213PDZ256r $ymm16, $ymm1, $ymm2
2830 $ymm16 = VFMSUB213PDZ256r $ymm16, $ymm1, $ymm2
2831 ; CHECK: $ymm16 = VFMSUB213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2832 $ymm16 = VFMSUB213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2833 ; CHECK: $ymm16 = VFMSUB213PSZ256r $ymm16, $ymm1, $ymm2
2834 $ymm16 = VFMSUB213PSZ256r $ymm16, $ymm1, $ymm2
2835 ; CHECK: $ymm16 = VFMSUB231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2836 $ymm16 = VFMSUB231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2837 ; CHECK: $ymm16 = VFMSUB231PDZ256r $ymm16, $ymm1, $ymm2
2838 $ymm16 = VFMSUB231PDZ256r $ymm16, $ymm1, $ymm2
2839 ; CHECK: $ymm16 = VFMSUB231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2840 $ymm16 = VFMSUB231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2841 ; CHECK: $ymm16 = VFMSUB231PSZ256r $ymm16, $ymm1, $ymm2
2842 $ymm16 = VFMSUB231PSZ256r $ymm16, $ymm1, $ymm2
2843 ; CHECK: $ymm16 = VFMSUBADD132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2844 $ymm16 = VFMSUBADD132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2845 ; CHECK: $ymm16 = VFMSUBADD132PDZ256r $ymm16, $ymm1, $ymm2
2846 $ymm16 = VFMSUBADD132PDZ256r $ymm16, $ymm1, $ymm2
2847 ; CHECK: $ymm16 = VFMSUBADD132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2848 $ymm16 = VFMSUBADD132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2849 ; CHECK: $ymm16 = VFMSUBADD132PSZ256r $ymm16, $ymm1, $ymm2
2850 $ymm16 = VFMSUBADD132PSZ256r $ymm16, $ymm1, $ymm2
2851 ; CHECK: $ymm16 = VFMSUBADD213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2852 $ymm16 = VFMSUBADD213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2853 ; CHECK: $ymm16 = VFMSUBADD213PDZ256r $ymm16, $ymm1, $ymm2
2854 $ymm16 = VFMSUBADD213PDZ256r $ymm16, $ymm1, $ymm2
2855 ; CHECK: $ymm16 = VFMSUBADD213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2856 $ymm16 = VFMSUBADD213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2857 ; CHECK: $ymm16 = VFMSUBADD213PSZ256r $ymm16, $ymm1, $ymm2
2858 $ymm16 = VFMSUBADD213PSZ256r $ymm16, $ymm1, $ymm2
2859 ; CHECK: $ymm16 = VFMSUBADD231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2860 $ymm16 = VFMSUBADD231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2861 ; CHECK: $ymm16 = VFMSUBADD231PDZ256r $ymm16, $ymm1, $ymm2
2862 $ymm16 = VFMSUBADD231PDZ256r $ymm16, $ymm1, $ymm2
2863 ; CHECK: $ymm16 = VFMSUBADD231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2864 $ymm16 = VFMSUBADD231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2865 ; CHECK: $ymm16 = VFMSUBADD231PSZ256r $ymm16, $ymm1, $ymm2
2866 $ymm16 = VFMSUBADD231PSZ256r $ymm16, $ymm1, $ymm2
2867 ; CHECK: $ymm16 = VFNMADD132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2868 $ymm16 = VFNMADD132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2869 ; CHECK: $ymm16 = VFNMADD132PDZ256r $ymm16, $ymm1, $ymm2
2870 $ymm16 = VFNMADD132PDZ256r $ymm16, $ymm1, $ymm2
2871 ; CHECK: $ymm16 = VFNMADD132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2872 $ymm16 = VFNMADD132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2873 ; CHECK: $ymm16 = VFNMADD132PSZ256r $ymm16, $ymm1, $ymm2
2874 $ymm16 = VFNMADD132PSZ256r $ymm16, $ymm1, $ymm2
2875 ; CHECK: $ymm16 = VFNMADD213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2876 $ymm16 = VFNMADD213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2877 ; CHECK: $ymm16 = VFNMADD213PDZ256r $ymm16, $ymm1, $ymm2
2878 $ymm16 = VFNMADD213PDZ256r $ymm16, $ymm1, $ymm2
2879 ; CHECK: $ymm16 = VFNMADD213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2880 $ymm16 = VFNMADD213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2881 ; CHECK: $ymm16 = VFNMADD213PSZ256r $ymm16, $ymm1, $ymm2
2882 $ymm16 = VFNMADD213PSZ256r $ymm16, $ymm1, $ymm2
2883 ; CHECK: $ymm16 = VFNMADD231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2884 $ymm16 = VFNMADD231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2885 ; CHECK: $ymm16 = VFNMADD231PDZ256r $ymm16, $ymm1, $ymm2
2886 $ymm16 = VFNMADD231PDZ256r $ymm16, $ymm1, $ymm2
2887 ; CHECK: $ymm16 = VFNMADD231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2888 $ymm16 = VFNMADD231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2889 ; CHECK: $ymm16 = VFNMADD231PSZ256r $ymm16, $ymm1, $ymm2
2890 $ymm16 = VFNMADD231PSZ256r $ymm16, $ymm1, $ymm2
2891 ; CHECK: $ymm16 = VFNMSUB132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2892 $ymm16 = VFNMSUB132PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2893 ; CHECK: $ymm16 = VFNMSUB132PDZ256r $ymm16, $ymm1, $ymm2
2894 $ymm16 = VFNMSUB132PDZ256r $ymm16, $ymm1, $ymm2
2895 ; CHECK: $ymm16 = VFNMSUB132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2896 $ymm16 = VFNMSUB132PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2897 ; CHECK: $ymm16 = VFNMSUB132PSZ256r $ymm16, $ymm1, $ymm2
2898 $ymm16 = VFNMSUB132PSZ256r $ymm16, $ymm1, $ymm2
2899 ; CHECK: $ymm16 = VFNMSUB213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2900 $ymm16 = VFNMSUB213PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2901 ; CHECK: $ymm16 = VFNMSUB213PDZ256r $ymm16, $ymm1, $ymm2
2902 $ymm16 = VFNMSUB213PDZ256r $ymm16, $ymm1, $ymm2
2903 ; CHECK: $ymm16 = VFNMSUB213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2904 $ymm16 = VFNMSUB213PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2905 ; CHECK: $ymm16 = VFNMSUB213PSZ256r $ymm16, $ymm1, $ymm2
2906 $ymm16 = VFNMSUB213PSZ256r $ymm16, $ymm1, $ymm2
2907 ; CHECK: $ymm16 = VFNMSUB231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2908 $ymm16 = VFNMSUB231PDZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2909 ; CHECK: $ymm16 = VFNMSUB231PDZ256r $ymm16, $ymm1, $ymm2
2910 $ymm16 = VFNMSUB231PDZ256r $ymm16, $ymm1, $ymm2
2911 ; CHECK: $ymm16 = VFNMSUB231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2912 $ymm16 = VFNMSUB231PSZ256m $ymm16, $ymm16, $rsi, 1, $noreg, 0, $noreg
2913 ; CHECK: $ymm16 = VFNMSUB231PSZ256r $ymm16, $ymm1, $ymm2
2914 $ymm16 = VFNMSUB231PSZ256r $ymm16, $ymm1, $ymm2
2915 ; CHECK: $ymm16 = VPSRADZ256ri $ymm16, 7
2916 $ymm16 = VPSRADZ256ri $ymm16, 7
2917 ; CHECK: $ymm16 = VPSRADZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2918 $ymm16 = VPSRADZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2919 ; CHECK: $ymm16 = VPSRADZ256rr $ymm16, $xmm1
2920 $ymm16 = VPSRADZ256rr $ymm16, $xmm1
2921 ; CHECK: $ymm16 = VPSRAVDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2922 $ymm16 = VPSRAVDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2923 ; CHECK: $ymm16 = VPSRAVDZ256rr $ymm16, $ymm1
2924 $ymm16 = VPSRAVDZ256rr $ymm16, $ymm1
2925 ; CHECK: $ymm16 = VPSRAWZ256ri $ymm16, 7
2926 $ymm16 = VPSRAWZ256ri $ymm16, 7
2927 ; CHECK: $ymm16 = VPSRAWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2928 $ymm16 = VPSRAWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2929 ; CHECK: $ymm16 = VPSRAWZ256rr $ymm16, $xmm1
2930 $ymm16 = VPSRAWZ256rr $ymm16, $xmm1
2931 ; CHECK: $ymm16 = VPSRLDQZ256rr $ymm16, $ymm1
2932 $ymm16 = VPSRLDQZ256rr $ymm16, $ymm1
2933 ; CHECK: $ymm16 = VPSRLDZ256ri $ymm16, 7
2934 $ymm16 = VPSRLDZ256ri $ymm16, 7
2935 ; CHECK: $ymm16 = VPSRLDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2936 $ymm16 = VPSRLDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2937 ; CHECK: $ymm16 = VPSRLDZ256rr $ymm16, $xmm1
2938 $ymm16 = VPSRLDZ256rr $ymm16, $xmm1
2939 ; CHECK: $ymm16 = VPSRLQZ256ri $ymm16, 7
2940 $ymm16 = VPSRLQZ256ri $ymm16, 7
2941 ; CHECK: $ymm16 = VPSRLQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2942 $ymm16 = VPSRLQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2943 ; CHECK: $ymm16 = VPSRLQZ256rr $ymm16, $xmm1
2944 $ymm16 = VPSRLQZ256rr $ymm16, $xmm1
2945 ; CHECK: $ymm16 = VPSRLVDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2946 $ymm16 = VPSRLVDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2947 ; CHECK: $ymm16 = VPSRLVDZ256rr $ymm16, $ymm1
2948 $ymm16 = VPSRLVDZ256rr $ymm16, $ymm1
2949 ; CHECK: $ymm16 = VPSRLVQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2950 $ymm16 = VPSRLVQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2951 ; CHECK: $ymm16 = VPSRLVQZ256rr $ymm16, $ymm1
2952 $ymm16 = VPSRLVQZ256rr $ymm16, $ymm1
2953 ; CHECK: $ymm16 = VPSRLWZ256ri $ymm16, 7
2954 $ymm16 = VPSRLWZ256ri $ymm16, 7
2955 ; CHECK: $ymm16 = VPSRLWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2956 $ymm16 = VPSRLWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
2957 ; CHECK: $ymm16 = VPSRLWZ256rr $ymm16, $xmm1
2958 $ymm16 = VPSRLWZ256rr $ymm16, $xmm1
2959 ; CHECK: $ymm16 = VPMOVSXBDZ256rm $rip, 1, $noreg, $rax, $noreg
2960 $ymm16 = VPMOVSXBDZ256rm $rip, 1, $noreg, $rax, $noreg
2961 ; CHECK: $ymm16 = VPMOVSXBDZ256rr $xmm0
2962 $ymm16 = VPMOVSXBDZ256rr $xmm0
2963 ; CHECK: $ymm16 = VPMOVSXBQZ256rm $rip, 1, $noreg, $rax, $noreg
2964 $ymm16 = VPMOVSXBQZ256rm $rip, 1, $noreg, $rax, $noreg
2965 ; CHECK: $ymm16 = VPMOVSXBQZ256rr $xmm0
2966 $ymm16 = VPMOVSXBQZ256rr $xmm0
2967 ; CHECK: $ymm16 = VPMOVSXBWZ256rm $rip, 1, $noreg, $rax, $noreg
2968 $ymm16 = VPMOVSXBWZ256rm $rip, 1, $noreg, $rax, $noreg
2969 ; CHECK: $ymm16 = VPMOVSXBWZ256rr $xmm0
2970 $ymm16 = VPMOVSXBWZ256rr $xmm0
2971 ; CHECK: $ymm16 = VPMOVSXDQZ256rm $rip, 1, $noreg, $rax, $noreg
2972 $ymm16 = VPMOVSXDQZ256rm $rip, 1, $noreg, $rax, $noreg
2973 ; CHECK: $ymm16 = VPMOVSXDQZ256rr $xmm0
2974 $ymm16 = VPMOVSXDQZ256rr $xmm0
2975 ; CHECK: $ymm16 = VPMOVSXWDZ256rm $rip, 1, $noreg, $rax, $noreg
2976 $ymm16 = VPMOVSXWDZ256rm $rip, 1, $noreg, $rax, $noreg
2977 ; CHECK: $ymm16 = VPMOVSXWDZ256rr $xmm0
2978 $ymm16 = VPMOVSXWDZ256rr $xmm0
2979 ; CHECK: $ymm16 = VPMOVSXWQZ256rm $rip, 1, $noreg, $rax, $noreg
2980 $ymm16 = VPMOVSXWQZ256rm $rip, 1, $noreg, $rax, $noreg
2981 ; CHECK: $ymm16 = VPMOVSXWQZ256rr $xmm0
2982 $ymm16 = VPMOVSXWQZ256rr $xmm0
2983 ; CHECK: $ymm16 = VPMOVZXBDZ256rm $rip, 1, $noreg, $rax, $noreg
2984 $ymm16 = VPMOVZXBDZ256rm $rip, 1, $noreg, $rax, $noreg
2985 ; CHECK: $ymm16 = VPMOVZXBDZ256rr $xmm0
2986 $ymm16 = VPMOVZXBDZ256rr $xmm0
2987 ; CHECK: $ymm16 = VPMOVZXBQZ256rm $rip, 1, $noreg, $rax, $noreg
2988 $ymm16 = VPMOVZXBQZ256rm $rip, 1, $noreg, $rax, $noreg
2989 ; CHECK: $ymm16 = VPMOVZXBQZ256rr $xmm0
2990 $ymm16 = VPMOVZXBQZ256rr $xmm0
2991 ; CHECK: $ymm16 = VPMOVZXBWZ256rm $rip, 1, $noreg, $rax, $noreg
2992 $ymm16 = VPMOVZXBWZ256rm $rip, 1, $noreg, $rax, $noreg
2993 ; CHECK: $ymm16 = VPMOVZXBWZ256rr $xmm0
2994 $ymm16 = VPMOVZXBWZ256rr $xmm0
2995 ; CHECK: $ymm16 = VPMOVZXDQZ256rm $rip, 1, $noreg, $rax, $noreg
2996 $ymm16 = VPMOVZXDQZ256rm $rip, 1, $noreg, $rax, $noreg
2997 ; CHECK: $ymm16 = VPMOVZXDQZ256rr $xmm0
2998 $ymm16 = VPMOVZXDQZ256rr $xmm0
2999 ; CHECK: $ymm16 = VPMOVZXWDZ256rm $rip, 1, $noreg, $rax, $noreg
3000 $ymm16 = VPMOVZXWDZ256rm $rip, 1, $noreg, $rax, $noreg
3001 ; CHECK: $ymm16 = VPMOVZXWDZ256rr $xmm0
3002 $ymm16 = VPMOVZXWDZ256rr $xmm0
3003 ; CHECK: $ymm16 = VPMOVZXWQZ256rm $rip, 1, $noreg, $rax, $noreg
3004 $ymm16 = VPMOVZXWQZ256rm $rip, 1, $noreg, $rax, $noreg
3005 ; CHECK: $ymm16 = VPMOVZXWQZ256rr $xmm0
3006 $ymm16 = VPMOVZXWQZ256rr $xmm0
3007 ; CHECK: $ymm16 = VBROADCASTF32X2Z256m $rip, 1, $noreg, $rax, $noreg
3008 $ymm16 = VBROADCASTF32X2Z256m $rip, 1, $noreg, $rax, $noreg
3009 ; CHECK: $ymm16 = VBROADCASTF32X2Z256r $xmm16
3010 $ymm16 = VBROADCASTF32X2Z256r $xmm16
3011 ; CHECK: $ymm16 = VBROADCASTF32X4Z256rm $rip, 1, $noreg, $rax, $noreg
3012 $ymm16 = VBROADCASTF32X4Z256rm $rip, 1, $noreg, $rax, $noreg
3013 ; CHECK: $ymm16 = VBROADCASTSDZ256m $rip, 1, $noreg, $rax, $noreg
3014 $ymm16 = VBROADCASTSDZ256m $rip, 1, $noreg, $rax, $noreg
3015 ; CHECK: $ymm16 = VBROADCASTSDZ256r $xmm0
3016 $ymm16 = VBROADCASTSDZ256r $xmm0
3017 ; CHECK: $ymm16 = VBROADCASTSSZ256m $rip, 1, $noreg, $rax, $noreg
3018 $ymm16 = VBROADCASTSSZ256m $rip, 1, $noreg, $rax, $noreg
3019 ; CHECK: $ymm16 = VBROADCASTSSZ256r $xmm0
3020 $ymm16 = VBROADCASTSSZ256r $xmm0
3021 ; CHECK: $ymm16 = VPBROADCASTBZ256m $rip, 1, $noreg, $rax, $noreg
3022 $ymm16 = VPBROADCASTBZ256m $rip, 1, $noreg, $rax, $noreg
3023 ; CHECK: $ymm16 = VPBROADCASTBZ256r $xmm0
3024 $ymm16 = VPBROADCASTBZ256r $xmm0
3025 ; CHECK: $ymm16 = VPBROADCASTDZ256m $rip, 1, $noreg, $rax, $noreg
3026 $ymm16 = VPBROADCASTDZ256m $rip, 1, $noreg, $rax, $noreg
3027 ; CHECK: $ymm16 = VPBROADCASTDZ256r $xmm0
3028 $ymm16 = VPBROADCASTDZ256r $xmm0
3029 ; CHECK: $ymm16 = VPBROADCASTWZ256m $rip, 1, $noreg, $rax, $noreg
3030 $ymm16 = VPBROADCASTWZ256m $rip, 1, $noreg, $rax, $noreg
3031 ; CHECK: $ymm16 = VPBROADCASTWZ256r $xmm0
3032 $ymm16 = VPBROADCASTWZ256r $xmm0
3033 ; CHECK: $ymm16 = VBROADCASTI32X4Z256rm $rip, 1, $noreg, $rax, $noreg
3034 $ymm16 = VBROADCASTI32X4Z256rm $rip, 1, $noreg, $rax, $noreg
3035 ; CHECK: $ymm16 = VBROADCASTI32X2Z256m $rip, 1, $noreg, $rax, $noreg
3036 $ymm16 = VBROADCASTI32X2Z256m $rip, 1, $noreg, $rax, $noreg
3037 ; CHECK: $ymm16 = VBROADCASTI32X2Z256r $xmm16
3038 $ymm16 = VBROADCASTI32X2Z256r $xmm16
3039 ; CHECK: $ymm16 = VPBROADCASTQZ256m $rip, 1, $noreg, $rax, $noreg
3040 $ymm16 = VPBROADCASTQZ256m $rip, 1, $noreg, $rax, $noreg
3041 ; CHECK: $ymm16 = VPBROADCASTQZ256r $xmm0
3042 $ymm16 = VPBROADCASTQZ256r $xmm0
3043 ; CHECK: $ymm16 = VPABSBZ256rm $rip, 1, $noreg, $rax, $noreg
3044 $ymm16 = VPABSBZ256rm $rip, 1, $noreg, $rax, $noreg
3045 ; CHECK: $ymm16 = VPABSBZ256rr $ymm16
3046 $ymm16 = VPABSBZ256rr $ymm16
3047 ; CHECK: $ymm16 = VPABSDZ256rm $rip, 1, $noreg, $rax, $noreg
3048 $ymm16 = VPABSDZ256rm $rip, 1, $noreg, $rax, $noreg
3049 ; CHECK: $ymm16 = VPABSDZ256rr $ymm16
3050 $ymm16 = VPABSDZ256rr $ymm16
3051 ; CHECK: $ymm16 = VPABSWZ256rm $rip, 1, $noreg, $rax, $noreg
3052 $ymm16 = VPABSWZ256rm $rip, 1, $noreg, $rax, $noreg
3053 ; CHECK: $ymm16 = VPABSWZ256rr $ymm16
3054 $ymm16 = VPABSWZ256rr $ymm16
3055 ; CHECK: $ymm16 = VPSADBWZ256rm $ymm16, 1, $noreg, $rax, $noreg, $noreg
3056 $ymm16 = VPSADBWZ256rm $ymm16, 1, $noreg, $rax, $noreg, $noreg
3057 ; CHECK: $ymm16 = VPSADBWZ256rr $ymm16, $ymm1
3058 $ymm16 = VPSADBWZ256rr $ymm16, $ymm1
3059 ; CHECK: $ymm16 = VPERMDZ256rm $ymm16, $rdi, 1, $noreg, 0, $noreg
3060 $ymm16 = VPERMDZ256rm $ymm16, $rdi, 1, $noreg, 0, $noreg
3061 ; CHECK: $ymm16 = VPERMDZ256rr $ymm1, $ymm16
3062 $ymm16 = VPERMDZ256rr $ymm1, $ymm16
3063 ; CHECK: $ymm16 = VPERMILPDZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3064 $ymm16 = VPERMILPDZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3065 ; CHECK: $ymm16 = VPERMILPDZ256ri $ymm16, 7
3066 $ymm16 = VPERMILPDZ256ri $ymm16, 7
3067 ; CHECK: $ymm16 = VPERMILPDZ256rm $ymm16, $rdi, 1, $noreg, 0, $noreg
3068 $ymm16 = VPERMILPDZ256rm $ymm16, $rdi, 1, $noreg, 0, $noreg
3069 ; CHECK: $ymm16 = VPERMILPDZ256rr $ymm1, $ymm16
3070 $ymm16 = VPERMILPDZ256rr $ymm1, $ymm16
3071 ; CHECK: $ymm16 = VPERMILPSZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3072 $ymm16 = VPERMILPSZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3073 ; CHECK: $ymm16 = VPERMILPSZ256ri $ymm16, 7
3074 $ymm16 = VPERMILPSZ256ri $ymm16, 7
3075 ; CHECK: $ymm16 = VPERMILPSZ256rm $ymm16, $rdi, 1, $noreg, 0, $noreg
3076 $ymm16 = VPERMILPSZ256rm $ymm16, $rdi, 1, $noreg, 0, $noreg
3077 ; CHECK: $ymm16 = VPERMILPSZ256rr $ymm1, $ymm16
3078 $ymm16 = VPERMILPSZ256rr $ymm1, $ymm16
3079 ; CHECK: $ymm16 = VPERMPDZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3080 $ymm16 = VPERMPDZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3081 ; CHECK: $ymm16 = VPERMPDZ256ri $ymm16, 7
3082 $ymm16 = VPERMPDZ256ri $ymm16, 7
3083 ; CHECK: $ymm16 = VPERMPSZ256rm $ymm16, $rdi, 1, $noreg, 0, $noreg
3084 $ymm16 = VPERMPSZ256rm $ymm16, $rdi, 1, $noreg, 0, $noreg
3085 ; CHECK: $ymm16 = VPERMPSZ256rr $ymm1, $ymm16
3086 $ymm16 = VPERMPSZ256rr $ymm1, $ymm16
3087 ; CHECK: $ymm16 = VPERMQZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3088 $ymm16 = VPERMQZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3089 ; CHECK: $ymm16 = VPERMQZ256ri $ymm16, 7
3090 $ymm16 = VPERMQZ256ri $ymm16, 7
3091 ; CHECK: $ymm16 = VPSLLDQZ256rr $ymm16, 14
3092 $ymm16 = VPSLLDQZ256rr $ymm16, 14
3093 ; CHECK: $ymm16 = VPSLLDZ256ri $ymm16, 7
3094 $ymm16 = VPSLLDZ256ri $ymm16, 7
3095 ; CHECK: $ymm16 = VPSLLDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3096 $ymm16 = VPSLLDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3097 ; CHECK: $ymm16 = VPSLLDZ256rr $ymm16, 14
3098 $ymm16 = VPSLLDZ256rr $ymm16, 14
3099 ; CHECK: $ymm16 = VPSLLQZ256ri $ymm16, 7
3100 $ymm16 = VPSLLQZ256ri $ymm16, 7
3101 ; CHECK: $ymm16 = VPSLLQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3102 $ymm16 = VPSLLQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3103 ; CHECK: $ymm16 = VPSLLQZ256rr $ymm16, 14
3104 $ymm16 = VPSLLQZ256rr $ymm16, 14
3105 ; CHECK: $ymm16 = VPSLLVDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3106 $ymm16 = VPSLLVDZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3107 ; CHECK: $ymm16 = VPSLLVDZ256rr $ymm16, 14
3108 $ymm16 = VPSLLVDZ256rr $ymm16, 14
3109 ; CHECK: $ymm16 = VPSLLVQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3110 $ymm16 = VPSLLVQZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3111 ; CHECK: $ymm16 = VPSLLVQZ256rr $ymm16, 14
3112 $ymm16 = VPSLLVQZ256rr $ymm16, 14
3113 ; CHECK: $ymm16 = VPSLLWZ256ri $ymm16, 7
3114 $ymm16 = VPSLLWZ256ri $ymm16, 7
3115 ; CHECK: $ymm16 = VPSLLWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3116 $ymm16 = VPSLLWZ256rm $ymm16, $rip, 1, $noreg, $rax, $noreg
3117 ; CHECK: $ymm16 = VPSLLWZ256rr $ymm16, 14
3118 $ymm16 = VPSLLWZ256rr $ymm16, 14
3119 ; CHECK: $ymm16 = VCVTDQ2PDZ256rm $rdi, $ymm16, 1, $noreg, 0
3120 $ymm16 = VCVTDQ2PDZ256rm $rdi, $ymm16, 1, $noreg, 0
3121 ; CHECK: $ymm16 = VCVTDQ2PDZ256rr $xmm0
3122 $ymm16 = VCVTDQ2PDZ256rr $xmm0
3123 ; CHECK: $ymm16 = VCVTDQ2PSZ256rm $rdi, $ymm16, 1, $noreg, 0
3124 $ymm16 = VCVTDQ2PSZ256rm $rdi, $ymm16, 1, $noreg, 0
3125 ; CHECK: $ymm16 = VCVTDQ2PSZ256rr $ymm16
3126 $ymm16 = VCVTDQ2PSZ256rr $ymm16
3127 ; CHECK: $xmm0 = VCVTPD2DQZ256rm $rdi, $ymm16, 1, $noreg, 0
3128 $xmm0 = VCVTPD2DQZ256rm $rdi, $ymm16, 1, $noreg, 0
3129 ; CHECK: $xmm0 = VCVTPD2DQZ256rr $ymm16
3130 $xmm0 = VCVTPD2DQZ256rr $ymm16
3131 ; CHECK: $xmm0 = VCVTPD2PSZ256rm $rdi, $ymm16, 1, $noreg, 0
3132 $xmm0 = VCVTPD2PSZ256rm $rdi, $ymm16, 1, $noreg, 0
3133 ; CHECK: $xmm0 = VCVTPD2PSZ256rr $ymm16
3134 $xmm0 = VCVTPD2PSZ256rr $ymm16
3135 ; CHECK: $ymm16 = VCVTPS2DQZ256rm $rdi, $ymm16, 1, $noreg, 0
3136 $ymm16 = VCVTPS2DQZ256rm $rdi, $ymm16, 1, $noreg, 0
3137 ; CHECK: $ymm16 = VCVTPS2DQZ256rr $ymm16
3138 $ymm16 = VCVTPS2DQZ256rr $ymm16
3139 ; CHECK: $ymm16 = VCVTPS2PDZ256rm $rdi, $ymm16, 1, $noreg, 0
3140 $ymm16 = VCVTPS2PDZ256rm $rdi, $ymm16, 1, $noreg, 0
3141 ; CHECK: $ymm16 = VCVTPS2PDZ256rr $xmm0
3142 $ymm16 = VCVTPS2PDZ256rr $xmm0
3143 ; CHECK: VCVTPS2PHZ256mr $rdi, $ymm16, 1, $noreg, 0, $noreg, $noreg
3144 VCVTPS2PHZ256mr $rdi, $ymm16, 1, $noreg, 0, $noreg, $noreg
3145 ; CHECK: $xmm0 = VCVTPS2PHZ256rr $ymm16, $noreg
3146 $xmm0 = VCVTPS2PHZ256rr $ymm16, $noreg
3147 ; CHECK: $ymm16 = VCVTPH2PSZ256rm $rdi, $ymm16, 1, $noreg, 0
3148 $ymm16 = VCVTPH2PSZ256rm $rdi, $ymm16, 1, $noreg, 0
3149 ; CHECK: $ymm16 = VCVTPH2PSZ256rr $xmm0
3150 $ymm16 = VCVTPH2PSZ256rr $xmm0
3151 ; CHECK: $xmm0 = VCVTTPD2DQZ256rm $rdi, $ymm16, 1, $noreg, 0
3152 $xmm0 = VCVTTPD2DQZ256rm $rdi, $ymm16, 1, $noreg, 0
3153 ; CHECK: $xmm0 = VCVTTPD2DQZ256rr $ymm16
3154 $xmm0 = VCVTTPD2DQZ256rr $ymm16
3155 ; CHECK: $ymm16 = VCVTTPS2DQZ256rm $rdi, $ymm16, 1, $noreg, 0
3156 $ymm16 = VCVTTPS2DQZ256rm $rdi, $ymm16, 1, $noreg, 0
3157 ; CHECK: $ymm16 = VCVTTPS2DQZ256rr $ymm16
3158 $ymm16 = VCVTTPS2DQZ256rr $ymm16
3159 ; CHECK: $ymm16 = VSQRTPDZ256m $rdi, $noreg, $noreg, $noreg, $noreg
3160 $ymm16 = VSQRTPDZ256m $rdi, $noreg, $noreg, $noreg, $noreg
3161 ; CHECK: $ymm16 = VSQRTPDZ256r $ymm16
3162 $ymm16 = VSQRTPDZ256r $ymm16
3163 ; CHECK: $ymm16 = VSQRTPSZ256m $rdi, $noreg, $noreg, $noreg, $noreg
3164 $ymm16 = VSQRTPSZ256m $rdi, $noreg, $noreg, $noreg, $noreg
3165 ; CHECK: $ymm16 = VSQRTPSZ256r $ymm16
3166 $ymm16 = VSQRTPSZ256r $ymm16
3167 ; CHECK: $ymm16 = VPALIGNRZ256rmi $ymm16, $rdi, $noreg, $noreg, $noreg, $noreg, $noreg
3168 $ymm16 = VPALIGNRZ256rmi $ymm16, $rdi, $noreg, $noreg, $noreg, $noreg, $noreg
3169 ; CHECK: $ymm16 = VPALIGNRZ256rri $ymm16, $ymm1, $noreg
3170 $ymm16 = VPALIGNRZ256rri $ymm16, $ymm1, $noreg
3171 ; CHECK: $ymm16 = VMOVUPSZ256rm $rdi, 1, $noreg, 0, $noreg
3172 $ymm16 = VMOVUPSZ256rm $rdi, 1, $noreg, 0, $noreg
3173 ; CHECK: $ymm16 = VMOVUPSZ256rr $ymm16
3174 $ymm16 = VMOVUPSZ256rr $ymm16
3175 ; CHECK: $ymm16 = VMOVUPSZ256rr_REV $ymm16
3176 $ymm16 = VMOVUPSZ256rr_REV $ymm16
3177 ; CHECK: $ymm16 = VPSHUFBZ256rm $ymm16, $noreg, $noreg, $noreg, $noreg, $noreg
3178 $ymm16 = VPSHUFBZ256rm $ymm16, $noreg, $noreg, $noreg, $noreg, $noreg
3179 ; CHECK: $ymm16 = VPSHUFBZ256rr $ymm16, $ymm1
3180 $ymm16 = VPSHUFBZ256rr $ymm16, $ymm1
3181 ; CHECK: $ymm16 = VPSHUFDZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3182 $ymm16 = VPSHUFDZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3183 ; CHECK: $ymm16 = VPSHUFDZ256ri $ymm16, -24
3184 $ymm16 = VPSHUFDZ256ri $ymm16, -24
3185 ; CHECK: $ymm16 = VPSHUFHWZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3186 $ymm16 = VPSHUFHWZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3187 ; CHECK: $ymm16 = VPSHUFHWZ256ri $ymm16, -24
3188 $ymm16 = VPSHUFHWZ256ri $ymm16, -24
3189 ; CHECK: $ymm16 = VPSHUFLWZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3190 $ymm16 = VPSHUFLWZ256mi $rdi, 1, $noreg, 0, $noreg, $noreg
3191 ; CHECK: $ymm16 = VPSHUFLWZ256ri $ymm16, -24
3192 $ymm16 = VPSHUFLWZ256ri $ymm16, -24
3193 ; CHECK: $ymm16 = VSHUFPDZ256rmi $ymm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
3194 $ymm16 = VSHUFPDZ256rmi $ymm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
3195 ; CHECK: $ymm16 = VSHUFPDZ256rri $ymm16, $noreg, $noreg
3196 $ymm16 = VSHUFPDZ256rri $ymm16, $noreg, $noreg
3197 ; CHECK: $ymm16 = VSHUFPSZ256rmi $ymm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
3198 $ymm16 = VSHUFPSZ256rmi $ymm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
3199 ; CHECK: $ymm16 = VSHUFPSZ256rri $ymm16, $noreg, $noreg
3200 $ymm16 = VSHUFPSZ256rri $ymm16, $noreg, $noreg
3202 RET 0, $zmm0, $zmm1
3203 ...
3204 ---
3205 # CHECK-LABEL: name: evex_z128_to_evex_test
3206 # CHECK: bb.0:
3208 name: evex_z128_to_evex_test
3209 body: |
3210 bb.0:
3211 ; CHECK: VMOVAPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3212 VMOVAPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3213 ; CHECK: $xmm16 = VMOVAPDZ128rm $rip, 1, $noreg, $rax, $noreg
3214 $xmm16 = VMOVAPDZ128rm $rip, 1, $noreg, $rax, $noreg
3215 ; CHECK: $xmm16 = VMOVAPDZ128rr $xmm16
3216 $xmm16 = VMOVAPDZ128rr $xmm16
3217 ; CHECK: VMOVAPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3218 VMOVAPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3219 ; CHECK: $xmm16 = VMOVAPSZ128rm $rip, 1, $noreg, $rax, $noreg
3220 $xmm16 = VMOVAPSZ128rm $rip, 1, $noreg, $rax, $noreg
3221 ; CHECK: $xmm16 = VMOVAPSZ128rr $xmm16
3222 $xmm16 = VMOVAPSZ128rr $xmm16
3223 ; CHECK: VMOVDQA32Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3224 VMOVDQA32Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3225 ; CHECK: $xmm16 = VMOVDQA32Z128rm $rip, 1, $noreg, $rax, $noreg
3226 $xmm16 = VMOVDQA32Z128rm $rip, 1, $noreg, $rax, $noreg
3227 ; CHECK: $xmm16 = VMOVDQA32Z128rr $xmm16
3228 $xmm16 = VMOVDQA32Z128rr $xmm16
3229 ; CHECK: VMOVDQA64Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3230 VMOVDQA64Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3231 ; CHECK: $xmm16 = VMOVDQA64Z128rm $rip, 1, $noreg, $rax, $noreg
3232 $xmm16 = VMOVDQA64Z128rm $rip, 1, $noreg, $rax, $noreg
3233 ; CHECK: $xmm16 = VMOVDQA64Z128rr $xmm16
3234 $xmm16 = VMOVDQA64Z128rr $xmm16
3235 ; CHECK: VMOVDQU16Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3236 VMOVDQU16Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3237 ; CHECK: $xmm16 = VMOVDQU16Z128rm $rip, 1, $noreg, $rax, $noreg
3238 $xmm16 = VMOVDQU16Z128rm $rip, 1, $noreg, $rax, $noreg
3239 ; CHECK: $xmm16 = VMOVDQU16Z128rr $xmm16
3240 $xmm16 = VMOVDQU16Z128rr $xmm16
3241 ; CHECK: VMOVDQU32Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3242 VMOVDQU32Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3243 ; CHECK: $xmm16 = VMOVDQU32Z128rm $rip, 1, $noreg, $rax, $noreg
3244 $xmm16 = VMOVDQU32Z128rm $rip, 1, $noreg, $rax, $noreg
3245 ; CHECK: $xmm16 = VMOVDQU32Z128rr $xmm16
3246 $xmm16 = VMOVDQU32Z128rr $xmm16
3247 ; CHECK: VMOVDQU64Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3248 VMOVDQU64Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3249 ; CHECK: $xmm16 = VMOVDQU64Z128rm $rip, 1, $noreg, $rax, $noreg
3250 $xmm16 = VMOVDQU64Z128rm $rip, 1, $noreg, $rax, $noreg
3251 ; CHECK: $xmm16 = VMOVDQU64Z128rr $xmm16
3252 $xmm16 = VMOVDQU64Z128rr $xmm16
3253 ; CHECK: VMOVDQU8Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3254 VMOVDQU8Z128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3255 ; CHECK: $xmm16 = VMOVDQU8Z128rm $rip, 1, $noreg, $rax, $noreg
3256 $xmm16 = VMOVDQU8Z128rm $rip, 1, $noreg, $rax, $noreg
3257 ; CHECK: $xmm16 = VMOVDQU8Z128rr $xmm16
3258 $xmm16 = VMOVDQU8Z128rr $xmm16
3259 ; CHECK: $xmm16 = VMOVDQU8Z128rr_REV $xmm16
3260 $xmm16 = VMOVDQU8Z128rr_REV $xmm16
3261 ; CHECK: $xmm16 = VMOVNTDQAZ128rm $rip, 1, $noreg, $rax, $noreg
3262 $xmm16 = VMOVNTDQAZ128rm $rip, 1, $noreg, $rax, $noreg
3263 ; CHECK: VMOVUPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3264 VMOVUPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3265 ; CHECK: $xmm16 = VMOVUPDZ128rm $rip, 1, $noreg, $rax, $noreg
3266 $xmm16 = VMOVUPDZ128rm $rip, 1, $noreg, $rax, $noreg
3267 ; CHECK: $xmm16 = VMOVUPDZ128rr $xmm16
3268 $xmm16 = VMOVUPDZ128rr $xmm16
3269 ; CHECK: $xmm16 = VMOVUPDZ128rr_REV $xmm16
3270 $xmm16 = VMOVUPDZ128rr_REV $xmm16
3271 ; CHECK: VMOVUPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3272 VMOVUPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3273 ; CHECK: $xmm16 = VMOVUPSZ128rm $rip, 1, $noreg, $rax, $noreg
3274 $xmm16 = VMOVUPSZ128rm $rip, 1, $noreg, $rax, $noreg
3275 ; CHECK: $xmm16 = VMOVUPSZ128rr $xmm16
3276 $xmm16 = VMOVUPSZ128rr $xmm16
3277 ; CHECK: $xmm16 = VMOVUPSZ128rr_REV $xmm16
3278 $xmm16 = VMOVUPSZ128rr_REV $xmm16
3279 ; CHECK: VMOVNTDQZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3280 VMOVNTDQZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3281 ; CHECK: VMOVNTPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3282 VMOVNTPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3283 ; CHECK: VMOVNTPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3284 VMOVNTPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3285 ; CHECK: $xmm16 = VMOVAPDZ128rr_REV $xmm16
3286 $xmm16 = VMOVAPDZ128rr_REV $xmm16
3287 ; CHECK: $xmm16 = VMOVAPSZ128rr_REV $xmm16
3288 $xmm16 = VMOVAPSZ128rr_REV $xmm16
3289 ; CHECK: $xmm16 = VMOVDQA32Z128rr_REV $xmm16
3290 $xmm16 = VMOVDQA32Z128rr_REV $xmm16
3291 ; CHECK: $xmm16 = VMOVDQA64Z128rr_REV $xmm16
3292 $xmm16 = VMOVDQA64Z128rr_REV $xmm16
3293 ; CHECK: $xmm16 = VMOVDQU16Z128rr_REV $xmm16
3294 $xmm16 = VMOVDQU16Z128rr_REV $xmm16
3295 ; CHECK: $xmm16 = VMOVDQU32Z128rr_REV $xmm16
3296 $xmm16 = VMOVDQU32Z128rr_REV $xmm16
3297 ; CHECK: $xmm16 = VMOVDQU64Z128rr_REV $xmm16
3298 $xmm16 = VMOVDQU64Z128rr_REV $xmm16
3299 ; CHECK: $xmm16 = VPMOVSXBDZ128rm $rip, 1, $noreg, $rax, $noreg
3300 $xmm16 = VPMOVSXBDZ128rm $rip, 1, $noreg, $rax, $noreg
3301 ; CHECK: $xmm16 = VPMOVSXBDZ128rr $xmm16
3302 $xmm16 = VPMOVSXBDZ128rr $xmm16
3303 ; CHECK: $xmm16 = VPMOVSXBQZ128rm $rip, 1, $noreg, $rax, $noreg
3304 $xmm16 = VPMOVSXBQZ128rm $rip, 1, $noreg, $rax, $noreg
3305 ; CHECK: $xmm16 = VPMOVSXBQZ128rr $xmm16
3306 $xmm16 = VPMOVSXBQZ128rr $xmm16
3307 ; CHECK: $xmm16 = VPMOVSXBWZ128rm $rip, 1, $noreg, $rax, $noreg
3308 $xmm16 = VPMOVSXBWZ128rm $rip, 1, $noreg, $rax, $noreg
3309 ; CHECK: $xmm16 = VPMOVSXBWZ128rr $xmm16
3310 $xmm16 = VPMOVSXBWZ128rr $xmm16
3311 ; CHECK: $xmm16 = VPMOVSXDQZ128rm $rip, 1, $noreg, $rax, $noreg
3312 $xmm16 = VPMOVSXDQZ128rm $rip, 1, $noreg, $rax, $noreg
3313 ; CHECK: $xmm16 = VPMOVSXDQZ128rr $xmm16
3314 $xmm16 = VPMOVSXDQZ128rr $xmm16
3315 ; CHECK: $xmm16 = VPMOVSXWDZ128rm $rip, 1, $noreg, $rax, $noreg
3316 $xmm16 = VPMOVSXWDZ128rm $rip, 1, $noreg, $rax, $noreg
3317 ; CHECK: $xmm16 = VPMOVSXWDZ128rr $xmm16
3318 $xmm16 = VPMOVSXWDZ128rr $xmm16
3319 ; CHECK: $xmm16 = VPMOVSXWQZ128rm $rip, 1, $noreg, $rax, $noreg
3320 $xmm16 = VPMOVSXWQZ128rm $rip, 1, $noreg, $rax, $noreg
3321 ; CHECK: $xmm16 = VPMOVSXWQZ128rr $xmm16
3322 $xmm16 = VPMOVSXWQZ128rr $xmm16
3323 ; CHECK: $xmm16 = VPMOVZXBDZ128rm $rip, 1, $noreg, $rax, $noreg
3324 $xmm16 = VPMOVZXBDZ128rm $rip, 1, $noreg, $rax, $noreg
3325 ; CHECK: $xmm16 = VPMOVZXBDZ128rr $xmm16
3326 $xmm16 = VPMOVZXBDZ128rr $xmm16
3327 ; CHECK: $xmm16 = VPMOVZXBQZ128rm $rip, 1, $noreg, $rax, $noreg
3328 $xmm16 = VPMOVZXBQZ128rm $rip, 1, $noreg, $rax, $noreg
3329 ; CHECK: $xmm16 = VPMOVZXBQZ128rr $xmm16
3330 $xmm16 = VPMOVZXBQZ128rr $xmm16
3331 ; CHECK: $xmm16 = VPMOVZXBWZ128rm $rip, 1, $noreg, $rax, $noreg
3332 $xmm16 = VPMOVZXBWZ128rm $rip, 1, $noreg, $rax, $noreg
3333 ; CHECK: $xmm16 = VPMOVZXBWZ128rr $xmm16
3334 $xmm16 = VPMOVZXBWZ128rr $xmm16
3335 ; CHECK: $xmm16 = VPMOVZXDQZ128rm $rip, 1, $noreg, $rax, $noreg
3336 $xmm16 = VPMOVZXDQZ128rm $rip, 1, $noreg, $rax, $noreg
3337 ; CHECK: $xmm16 = VPMOVZXDQZ128rr $xmm16
3338 $xmm16 = VPMOVZXDQZ128rr $xmm16
3339 ; CHECK: $xmm16 = VPMOVZXWDZ128rm $rip, 1, $noreg, $rax, $noreg
3340 $xmm16 = VPMOVZXWDZ128rm $rip, 1, $noreg, $rax, $noreg
3341 ; CHECK: $xmm16 = VPMOVZXWDZ128rr $xmm16
3342 $xmm16 = VPMOVZXWDZ128rr $xmm16
3343 ; CHECK: $xmm16 = VPMOVZXWQZ128rm $rip, 1, $noreg, $rax, $noreg
3344 $xmm16 = VPMOVZXWQZ128rm $rip, 1, $noreg, $rax, $noreg
3345 ; CHECK: $xmm16 = VPMOVZXWQZ128rr $xmm16
3346 $xmm16 = VPMOVZXWQZ128rr $xmm16
3347 ; CHECK: VMOVHPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3348 VMOVHPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3349 ; CHECK: $xmm16 = VMOVHPDZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3350 $xmm16 = VMOVHPDZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3351 ; CHECK: VMOVHPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3352 VMOVHPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3353 ; CHECK: $xmm16 = VMOVHPSZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3354 $xmm16 = VMOVHPSZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3355 ; CHECK: VMOVLPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3356 VMOVLPDZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3357 ; CHECK: $xmm16 = VMOVLPDZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3358 $xmm16 = VMOVLPDZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3359 ; CHECK: VMOVLPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3360 VMOVLPSZ128mr $rdi, 1, $noreg, 0, $noreg, $xmm16
3361 ; CHECK: $xmm16 = VMOVLPSZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3362 $xmm16 = VMOVLPSZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3363 ; CHECK: $xmm16 = VMAXCPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3364 $xmm16 = VMAXCPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3365 ; CHECK: $xmm16 = VMAXCPDZ128rr $xmm16, $xmm1
3366 $xmm16 = VMAXCPDZ128rr $xmm16, $xmm1
3367 ; CHECK: $xmm16 = VMAXCPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3368 $xmm16 = VMAXCPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3369 ; CHECK: $xmm16 = VMAXCPSZ128rr $xmm16, $xmm1
3370 $xmm16 = VMAXCPSZ128rr $xmm16, $xmm1
3371 ; CHECK: $xmm16 = VMAXPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3372 $xmm16 = VMAXPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3373 ; CHECK: $xmm16 = VMAXPDZ128rr $xmm16, $xmm1
3374 $xmm16 = VMAXPDZ128rr $xmm16, $xmm1
3375 ; CHECK: $xmm16 = VMAXPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3376 $xmm16 = VMAXPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3377 ; CHECK: $xmm16 = VMAXPSZ128rr $xmm16, $xmm1
3378 $xmm16 = VMAXPSZ128rr $xmm16, $xmm1
3379 ; CHECK: $xmm16 = VMINCPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3380 $xmm16 = VMINCPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3381 ; CHECK: $xmm16 = VMINCPDZ128rr $xmm16, $xmm1
3382 $xmm16 = VMINCPDZ128rr $xmm16, $xmm1
3383 ; CHECK: $xmm16 = VMINCPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3384 $xmm16 = VMINCPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3385 ; CHECK: $xmm16 = VMINCPSZ128rr $xmm16, $xmm1
3386 $xmm16 = VMINCPSZ128rr $xmm16, $xmm1
3387 ; CHECK: $xmm16 = VMINPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3388 $xmm16 = VMINPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3389 ; CHECK: $xmm16 = VMINPDZ128rr $xmm16, $xmm1
3390 $xmm16 = VMINPDZ128rr $xmm16, $xmm1
3391 ; CHECK: $xmm16 = VMINPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3392 $xmm16 = VMINPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3393 ; CHECK: $xmm16 = VMINPSZ128rr $xmm16, $xmm1
3394 $xmm16 = VMINPSZ128rr $xmm16, $xmm1
3395 ; CHECK: $xmm16 = VMULPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3396 $xmm16 = VMULPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3397 ; CHECK: $xmm16 = VMULPDZ128rr $xmm16, $xmm1
3398 $xmm16 = VMULPDZ128rr $xmm16, $xmm1
3399 ; CHECK: $xmm16 = VMULPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3400 $xmm16 = VMULPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3401 ; CHECK: $xmm16 = VMULPSZ128rr $xmm16, $xmm1
3402 $xmm16 = VMULPSZ128rr $xmm16, $xmm1
3403 ; CHECK: $xmm16 = VORPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3404 $xmm16 = VORPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3405 ; CHECK: $xmm16 = VORPDZ128rr $xmm16, $xmm1
3406 $xmm16 = VORPDZ128rr $xmm16, $xmm1
3407 ; CHECK: $xmm16 = VORPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3408 $xmm16 = VORPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3409 ; CHECK: $xmm16 = VORPSZ128rr $xmm16, $xmm1
3410 $xmm16 = VORPSZ128rr $xmm16, $xmm1
3411 ; CHECK: $xmm16 = VPADDBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3412 $xmm16 = VPADDBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3413 ; CHECK: $xmm16 = VPADDBZ128rr $xmm16, $xmm1
3414 $xmm16 = VPADDBZ128rr $xmm16, $xmm1
3415 ; CHECK: $xmm16 = VPADDDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3416 $xmm16 = VPADDDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3417 ; CHECK: $xmm16 = VPADDDZ128rr $xmm16, $xmm1
3418 $xmm16 = VPADDDZ128rr $xmm16, $xmm1
3419 ; CHECK: $xmm16 = VPADDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3420 $xmm16 = VPADDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3421 ; CHECK: $xmm16 = VPADDQZ128rr $xmm16, $xmm1
3422 $xmm16 = VPADDQZ128rr $xmm16, $xmm1
3423 ; CHECK: $xmm16 = VPADDSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3424 $xmm16 = VPADDSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3425 ; CHECK: $xmm16 = VPADDSBZ128rr $xmm16, $xmm1
3426 $xmm16 = VPADDSBZ128rr $xmm16, $xmm1
3427 ; CHECK: $xmm16 = VPADDSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3428 $xmm16 = VPADDSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3429 ; CHECK: $xmm16 = VPADDSWZ128rr $xmm16, $xmm1
3430 $xmm16 = VPADDSWZ128rr $xmm16, $xmm1
3431 ; CHECK: $xmm16 = VPADDUSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3432 $xmm16 = VPADDUSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3433 ; CHECK: $xmm16 = VPADDUSBZ128rr $xmm16, $xmm1
3434 $xmm16 = VPADDUSBZ128rr $xmm16, $xmm1
3435 ; CHECK: $xmm16 = VPADDUSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3436 $xmm16 = VPADDUSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3437 ; CHECK: $xmm16 = VPADDUSWZ128rr $xmm16, $xmm1
3438 $xmm16 = VPADDUSWZ128rr $xmm16, $xmm1
3439 ; CHECK: $xmm16 = VPADDWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3440 $xmm16 = VPADDWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3441 ; CHECK: $xmm16 = VPADDWZ128rr $xmm16, $xmm1
3442 $xmm16 = VPADDWZ128rr $xmm16, $xmm1
3443 ; CHECK: $xmm16 = VPANDDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3444 $xmm16 = VPANDDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3445 ; CHECK: $xmm16 = VPANDDZ128rr $xmm16, $xmm1
3446 $xmm16 = VPANDDZ128rr $xmm16, $xmm1
3447 ; CHECK: $xmm16 = VPANDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3448 $xmm16 = VPANDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3449 ; CHECK: $xmm16 = VPANDQZ128rr $xmm16, $xmm1
3450 $xmm16 = VPANDQZ128rr $xmm16, $xmm1
3451 ; CHECK: $xmm16 = VPANDNDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3452 $xmm16 = VPANDNDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3453 ; CHECK: $xmm16 = VPANDNDZ128rr $xmm16, $xmm1
3454 $xmm16 = VPANDNDZ128rr $xmm16, $xmm1
3455 ; CHECK: $xmm16 = VPANDNQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3456 $xmm16 = VPANDNQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3457 ; CHECK: $xmm16 = VPANDNQZ128rr $xmm16, $xmm1
3458 $xmm16 = VPANDNQZ128rr $xmm16, $xmm1
3459 ; CHECK: $xmm16 = VPAVGBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3460 $xmm16 = VPAVGBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3461 ; CHECK: $xmm16 = VPAVGBZ128rr $xmm16, $xmm1
3462 $xmm16 = VPAVGBZ128rr $xmm16, $xmm1
3463 ; CHECK: $xmm16 = VPAVGWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3464 $xmm16 = VPAVGWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3465 ; CHECK: $xmm16 = VPAVGWZ128rr $xmm16, $xmm1
3466 $xmm16 = VPAVGWZ128rr $xmm16, $xmm1
3467 ; CHECK: $xmm16 = VPMAXSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3468 $xmm16 = VPMAXSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3469 ; CHECK: $xmm16 = VPMAXSBZ128rr $xmm16, $xmm1
3470 $xmm16 = VPMAXSBZ128rr $xmm16, $xmm1
3471 ; CHECK: $xmm16 = VPMAXSDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3472 $xmm16 = VPMAXSDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3473 ; CHECK: $xmm16 = VPMAXSDZ128rr $xmm16, $xmm1
3474 $xmm16 = VPMAXSDZ128rr $xmm16, $xmm1
3475 ; CHECK: $xmm16 = VPMAXSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3476 $xmm16 = VPMAXSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3477 ; CHECK: $xmm16 = VPMAXSWZ128rr $xmm16, $xmm1
3478 $xmm16 = VPMAXSWZ128rr $xmm16, $xmm1
3479 ; CHECK: $xmm16 = VPMAXUBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3480 $xmm16 = VPMAXUBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3481 ; CHECK: $xmm16 = VPMAXUBZ128rr $xmm16, $xmm1
3482 $xmm16 = VPMAXUBZ128rr $xmm16, $xmm1
3483 ; CHECK: $xmm16 = VPMAXUDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3484 $xmm16 = VPMAXUDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3485 ; CHECK: $xmm16 = VPMAXUDZ128rr $xmm16, $xmm1
3486 $xmm16 = VPMAXUDZ128rr $xmm16, $xmm1
3487 ; CHECK: $xmm16 = VPMAXUWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3488 $xmm16 = VPMAXUWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3489 ; CHECK: $xmm16 = VPMAXUWZ128rr $xmm16, $xmm1
3490 $xmm16 = VPMAXUWZ128rr $xmm16, $xmm1
3491 ; CHECK: $xmm16 = VPMINSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3492 $xmm16 = VPMINSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3493 ; CHECK: $xmm16 = VPMINSBZ128rr $xmm16, $xmm1
3494 $xmm16 = VPMINSBZ128rr $xmm16, $xmm1
3495 ; CHECK: $xmm16 = VPMINSDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3496 $xmm16 = VPMINSDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3497 ; CHECK: $xmm16 = VPMINSDZ128rr $xmm16, $xmm1
3498 $xmm16 = VPMINSDZ128rr $xmm16, $xmm1
3499 ; CHECK: $xmm16 = VPMINSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3500 $xmm16 = VPMINSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3501 ; CHECK: $xmm16 = VPMINSWZ128rr $xmm16, $xmm1
3502 $xmm16 = VPMINSWZ128rr $xmm16, $xmm1
3503 ; CHECK: $xmm16 = VPMINUBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3504 $xmm16 = VPMINUBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3505 ; CHECK: $xmm16 = VPMINUBZ128rr $xmm16, $xmm1
3506 $xmm16 = VPMINUBZ128rr $xmm16, $xmm1
3507 ; CHECK: $xmm16 = VPMINUDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3508 $xmm16 = VPMINUDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3509 ; CHECK: $xmm16 = VPMINUDZ128rr $xmm16, $xmm1
3510 $xmm16 = VPMINUDZ128rr $xmm16, $xmm1
3511 ; CHECK: $xmm16 = VPMINUWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3512 $xmm16 = VPMINUWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3513 ; CHECK: $xmm16 = VPMINUWZ128rr $xmm16, $xmm1
3514 $xmm16 = VPMINUWZ128rr $xmm16, $xmm1
3515 ; CHECK: $xmm16 = VPMULDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3516 $xmm16 = VPMULDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3517 ; CHECK: $xmm16 = VPMULDQZ128rr $xmm16, $xmm1
3518 $xmm16 = VPMULDQZ128rr $xmm16, $xmm1
3519 ; CHECK: $xmm16 = VPMULHRSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3520 $xmm16 = VPMULHRSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3521 ; CHECK: $xmm16 = VPMULHRSWZ128rr $xmm16, $xmm1
3522 $xmm16 = VPMULHRSWZ128rr $xmm16, $xmm1
3523 ; CHECK: $xmm16 = VPMULHUWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3524 $xmm16 = VPMULHUWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3525 ; CHECK: $xmm16 = VPMULHUWZ128rr $xmm16, $xmm1
3526 $xmm16 = VPMULHUWZ128rr $xmm16, $xmm1
3527 ; CHECK: $xmm16 = VPMULHWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3528 $xmm16 = VPMULHWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3529 ; CHECK: $xmm16 = VPMULHWZ128rr $xmm16, $xmm1
3530 $xmm16 = VPMULHWZ128rr $xmm16, $xmm1
3531 ; CHECK: $xmm16 = VPMULLDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3532 $xmm16 = VPMULLDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3533 ; CHECK: $xmm16 = VPMULLDZ128rr $xmm16, $xmm1
3534 $xmm16 = VPMULLDZ128rr $xmm16, $xmm1
3535 ; CHECK: $xmm16 = VPMULLWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3536 $xmm16 = VPMULLWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3537 ; CHECK: $xmm16 = VPMULLWZ128rr $xmm16, $xmm1
3538 $xmm16 = VPMULLWZ128rr $xmm16, $xmm1
3539 ; CHECK: $xmm16 = VPMULUDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3540 $xmm16 = VPMULUDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3541 ; CHECK: $xmm16 = VPMULUDQZ128rr $xmm16, $xmm1
3542 $xmm16 = VPMULUDQZ128rr $xmm16, $xmm1
3543 ; CHECK: $xmm16 = VPORDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3544 $xmm16 = VPORDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3545 ; CHECK: $xmm16 = VPORDZ128rr $xmm16, $xmm1
3546 $xmm16 = VPORDZ128rr $xmm16, $xmm1
3547 ; CHECK: $xmm16 = VPORQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3548 $xmm16 = VPORQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3549 ; CHECK: $xmm16 = VPORQZ128rr $xmm16, $xmm1
3550 $xmm16 = VPORQZ128rr $xmm16, $xmm1
3551 ; CHECK: $xmm16 = VPSUBBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3552 $xmm16 = VPSUBBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3553 ; CHECK: $xmm16 = VPSUBBZ128rr $xmm16, $xmm1
3554 $xmm16 = VPSUBBZ128rr $xmm16, $xmm1
3555 ; CHECK: $xmm16 = VPSUBDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3556 $xmm16 = VPSUBDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3557 ; CHECK: $xmm16 = VPSUBDZ128rr $xmm16, $xmm1
3558 $xmm16 = VPSUBDZ128rr $xmm16, $xmm1
3559 ; CHECK: $xmm16 = VPSUBQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3560 $xmm16 = VPSUBQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3561 ; CHECK: $xmm16 = VPSUBQZ128rr $xmm16, $xmm1
3562 $xmm16 = VPSUBQZ128rr $xmm16, $xmm1
3563 ; CHECK: $xmm16 = VPSUBSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3564 $xmm16 = VPSUBSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3565 ; CHECK: $xmm16 = VPSUBSBZ128rr $xmm16, $xmm1
3566 $xmm16 = VPSUBSBZ128rr $xmm16, $xmm1
3567 ; CHECK: $xmm16 = VPSUBSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3568 $xmm16 = VPSUBSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3569 ; CHECK: $xmm16 = VPSUBSWZ128rr $xmm16, $xmm1
3570 $xmm16 = VPSUBSWZ128rr $xmm16, $xmm1
3571 ; CHECK: $xmm16 = VPSUBUSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3572 $xmm16 = VPSUBUSBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3573 ; CHECK: $xmm16 = VPSUBUSBZ128rr $xmm16, $xmm1
3574 $xmm16 = VPSUBUSBZ128rr $xmm16, $xmm1
3575 ; CHECK: $xmm16 = VPSUBUSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3576 $xmm16 = VPSUBUSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3577 ; CHECK: $xmm16 = VPSUBUSWZ128rr $xmm16, $xmm1
3578 $xmm16 = VPSUBUSWZ128rr $xmm16, $xmm1
3579 ; CHECK: $xmm16 = VPSUBWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3580 $xmm16 = VPSUBWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3581 ; CHECK: $xmm16 = VPSUBWZ128rr $xmm16, $xmm1
3582 $xmm16 = VPSUBWZ128rr $xmm16, $xmm1
3583 ; CHECK: $xmm16 = VADDPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3584 $xmm16 = VADDPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3585 ; CHECK: $xmm16 = VADDPDZ128rr $xmm16, $xmm1
3586 $xmm16 = VADDPDZ128rr $xmm16, $xmm1
3587 ; CHECK: $xmm16 = VADDPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3588 $xmm16 = VADDPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3589 ; CHECK: $xmm16 = VADDPSZ128rr $xmm16, $xmm1
3590 $xmm16 = VADDPSZ128rr $xmm16, $xmm1
3591 ; CHECK: $xmm16 = VANDNPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3592 $xmm16 = VANDNPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3593 ; CHECK: $xmm16 = VANDNPDZ128rr $xmm16, $xmm1
3594 $xmm16 = VANDNPDZ128rr $xmm16, $xmm1
3595 ; CHECK: $xmm16 = VANDNPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3596 $xmm16 = VANDNPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3597 ; CHECK: $xmm16 = VANDNPSZ128rr $xmm16, $xmm1
3598 $xmm16 = VANDNPSZ128rr $xmm16, $xmm1
3599 ; CHECK: $xmm16 = VANDPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3600 $xmm16 = VANDPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3601 ; CHECK: $xmm16 = VANDPDZ128rr $xmm16, $xmm1
3602 $xmm16 = VANDPDZ128rr $xmm16, $xmm1
3603 ; CHECK: $xmm16 = VANDPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3604 $xmm16 = VANDPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3605 ; CHECK: $xmm16 = VANDPSZ128rr $xmm16, $xmm1
3606 $xmm16 = VANDPSZ128rr $xmm16, $xmm1
3607 ; CHECK: $xmm16 = VDIVPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3608 $xmm16 = VDIVPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3609 ; CHECK: $xmm16 = VDIVPDZ128rr $xmm16, $xmm1
3610 $xmm16 = VDIVPDZ128rr $xmm16, $xmm1
3611 ; CHECK: $xmm16 = VDIVPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3612 $xmm16 = VDIVPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3613 ; CHECK: $xmm16 = VDIVPSZ128rr $xmm16, $xmm1
3614 $xmm16 = VDIVPSZ128rr $xmm16, $xmm1
3615 ; CHECK: $xmm16 = VPXORDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3616 $xmm16 = VPXORDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3617 ; CHECK: $xmm16 = VPXORDZ128rr $xmm16, $xmm1
3618 $xmm16 = VPXORDZ128rr $xmm16, $xmm1
3619 ; CHECK: $xmm16 = VPXORQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3620 $xmm16 = VPXORQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3621 ; CHECK: $xmm16 = VPXORQZ128rr $xmm16, $xmm1
3622 $xmm16 = VPXORQZ128rr $xmm16, $xmm1
3623 ; CHECK: $xmm16 = VSUBPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3624 $xmm16 = VSUBPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3625 ; CHECK: $xmm16 = VSUBPDZ128rr $xmm16, $xmm1
3626 $xmm16 = VSUBPDZ128rr $xmm16, $xmm1
3627 ; CHECK: $xmm16 = VSUBPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3628 $xmm16 = VSUBPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3629 ; CHECK: $xmm16 = VSUBPSZ128rr $xmm16, $xmm1
3630 $xmm16 = VSUBPSZ128rr $xmm16, $xmm1
3631 ; CHECK: $xmm16 = VXORPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3632 $xmm16 = VXORPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3633 ; CHECK: $xmm16 = VXORPDZ128rr $xmm16, $xmm1
3634 $xmm16 = VXORPDZ128rr $xmm16, $xmm1
3635 ; CHECK: $xmm16 = VXORPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3636 $xmm16 = VXORPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3637 ; CHECK: $xmm16 = VXORPSZ128rr $xmm16, $xmm1
3638 $xmm16 = VXORPSZ128rr $xmm16, $xmm1
3639 ; CHECK: $xmm16 = VPMADDUBSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3640 $xmm16 = VPMADDUBSWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3641 ; CHECK: $xmm16 = VPMADDUBSWZ128rr $xmm16, $xmm1
3642 $xmm16 = VPMADDUBSWZ128rr $xmm16, $xmm1
3643 ; CHECK: $xmm16 = VPMADDWDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3644 $xmm16 = VPMADDWDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3645 ; CHECK: $xmm16 = VPMADDWDZ128rr $xmm16, $xmm1
3646 $xmm16 = VPMADDWDZ128rr $xmm16, $xmm1
3647 ; CHECK: $xmm16 = VPACKSSDWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3648 $xmm16 = VPACKSSDWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3649 ; CHECK: $xmm16 = VPACKSSDWZ128rr $xmm16, $xmm1
3650 $xmm16 = VPACKSSDWZ128rr $xmm16, $xmm1
3651 ; CHECK: $xmm16 = VPACKSSWBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3652 $xmm16 = VPACKSSWBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3653 ; CHECK: $xmm16 = VPACKSSWBZ128rr $xmm16, $xmm1
3654 $xmm16 = VPACKSSWBZ128rr $xmm16, $xmm1
3655 ; CHECK: $xmm16 = VPACKUSDWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3656 $xmm16 = VPACKUSDWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3657 ; CHECK: $xmm16 = VPACKUSDWZ128rr $xmm16, $xmm1
3658 $xmm16 = VPACKUSDWZ128rr $xmm16, $xmm1
3659 ; CHECK: $xmm16 = VPACKUSWBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3660 $xmm16 = VPACKUSWBZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3661 ; CHECK: $xmm16 = VPACKUSWBZ128rr $xmm16, $xmm1
3662 $xmm16 = VPACKUSWBZ128rr $xmm16, $xmm1
3663 ; CHECK: $xmm16 = VPUNPCKHBWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3664 $xmm16 = VPUNPCKHBWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3665 ; CHECK: $xmm16 = VPUNPCKHBWZ128rr $xmm16, $xmm1
3666 $xmm16 = VPUNPCKHBWZ128rr $xmm16, $xmm1
3667 ; CHECK: $xmm16 = VPUNPCKHDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3668 $xmm16 = VPUNPCKHDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3669 ; CHECK: $xmm16 = VPUNPCKHDQZ128rr $xmm16, $xmm1
3670 $xmm16 = VPUNPCKHDQZ128rr $xmm16, $xmm1
3671 ; CHECK: $xmm16 = VPUNPCKHQDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3672 $xmm16 = VPUNPCKHQDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3673 ; CHECK: $xmm16 = VPUNPCKHQDQZ128rr $xmm16, $xmm1
3674 $xmm16 = VPUNPCKHQDQZ128rr $xmm16, $xmm1
3675 ; CHECK: $xmm16 = VPUNPCKHWDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3676 $xmm16 = VPUNPCKHWDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3677 ; CHECK: $xmm16 = VPUNPCKHWDZ128rr $xmm16, $xmm1
3678 $xmm16 = VPUNPCKHWDZ128rr $xmm16, $xmm1
3679 ; CHECK: $xmm16 = VPUNPCKLBWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3680 $xmm16 = VPUNPCKLBWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3681 ; CHECK: $xmm16 = VPUNPCKLBWZ128rr $xmm16, $xmm1
3682 $xmm16 = VPUNPCKLBWZ128rr $xmm16, $xmm1
3683 ; CHECK: $xmm16 = VPUNPCKLDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3684 $xmm16 = VPUNPCKLDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3685 ; CHECK: $xmm16 = VPUNPCKLDQZ128rr $xmm16, $xmm1
3686 $xmm16 = VPUNPCKLDQZ128rr $xmm16, $xmm1
3687 ; CHECK: $xmm16 = VPUNPCKLQDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3688 $xmm16 = VPUNPCKLQDQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3689 ; CHECK: $xmm16 = VPUNPCKLQDQZ128rr $xmm16, $xmm1
3690 $xmm16 = VPUNPCKLQDQZ128rr $xmm16, $xmm1
3691 ; CHECK: $xmm16 = VPUNPCKLWDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3692 $xmm16 = VPUNPCKLWDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3693 ; CHECK: $xmm16 = VPUNPCKLWDZ128rr $xmm16, $xmm1
3694 $xmm16 = VPUNPCKLWDZ128rr $xmm16, $xmm1
3695 ; CHECK: $xmm16 = VUNPCKHPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3696 $xmm16 = VUNPCKHPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3697 ; CHECK: $xmm16 = VUNPCKHPDZ128rr $xmm16, $xmm1
3698 $xmm16 = VUNPCKHPDZ128rr $xmm16, $xmm1
3699 ; CHECK: $xmm16 = VUNPCKHPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3700 $xmm16 = VUNPCKHPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3701 ; CHECK: $xmm16 = VUNPCKHPSZ128rr $xmm16, $xmm1
3702 $xmm16 = VUNPCKHPSZ128rr $xmm16, $xmm1
3703 ; CHECK: $xmm16 = VUNPCKLPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3704 $xmm16 = VUNPCKLPDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3705 ; CHECK: $xmm16 = VUNPCKLPDZ128rr $xmm16, $xmm1
3706 $xmm16 = VUNPCKLPDZ128rr $xmm16, $xmm1
3707 ; CHECK: $xmm16 = VUNPCKLPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3708 $xmm16 = VUNPCKLPSZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3709 ; CHECK: $xmm16 = VUNPCKLPSZ128rr $xmm16, $xmm1
3710 $xmm16 = VUNPCKLPSZ128rr $xmm16, $xmm1
3711 ; CHECK: $xmm16 = VFMADD132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3712 $xmm16 = VFMADD132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3713 ; CHECK: $xmm16 = VFMADD132PDZ128r $xmm16, $xmm1, $xmm2
3714 $xmm16 = VFMADD132PDZ128r $xmm16, $xmm1, $xmm2
3715 ; CHECK: $xmm16 = VFMADD132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3716 $xmm16 = VFMADD132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3717 ; CHECK: $xmm16 = VFMADD132PSZ128r $xmm16, $xmm1, $xmm2
3718 $xmm16 = VFMADD132PSZ128r $xmm16, $xmm1, $xmm2
3719 ; CHECK: $xmm16 = VFMADD213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3720 $xmm16 = VFMADD213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3721 ; CHECK: $xmm16 = VFMADD213PDZ128r $xmm16, $xmm1, $xmm2
3722 $xmm16 = VFMADD213PDZ128r $xmm16, $xmm1, $xmm2
3723 ; CHECK: $xmm16 = VFMADD213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3724 $xmm16 = VFMADD213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3725 ; CHECK: $xmm16 = VFMADD213PSZ128r $xmm16, $xmm1, $xmm2
3726 $xmm16 = VFMADD213PSZ128r $xmm16, $xmm1, $xmm2
3727 ; CHECK: $xmm16 = VFMADD231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3728 $xmm16 = VFMADD231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3729 ; CHECK: $xmm16 = VFMADD231PDZ128r $xmm16, $xmm1, $xmm2
3730 $xmm16 = VFMADD231PDZ128r $xmm16, $xmm1, $xmm2
3731 ; CHECK: $xmm16 = VFMADD231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3732 $xmm16 = VFMADD231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3733 ; CHECK: $xmm16 = VFMADD231PSZ128r $xmm16, $xmm1, $xmm2
3734 $xmm16 = VFMADD231PSZ128r $xmm16, $xmm1, $xmm2
3735 ; CHECK: $xmm16 = VFMADDSUB132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3736 $xmm16 = VFMADDSUB132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3737 ; CHECK: $xmm16 = VFMADDSUB132PDZ128r $xmm16, $xmm1, $xmm2
3738 $xmm16 = VFMADDSUB132PDZ128r $xmm16, $xmm1, $xmm2
3739 ; CHECK: $xmm16 = VFMADDSUB132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3740 $xmm16 = VFMADDSUB132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3741 ; CHECK: $xmm16 = VFMADDSUB132PSZ128r $xmm16, $xmm1, $xmm2
3742 $xmm16 = VFMADDSUB132PSZ128r $xmm16, $xmm1, $xmm2
3743 ; CHECK: $xmm16 = VFMADDSUB213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3744 $xmm16 = VFMADDSUB213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3745 ; CHECK: $xmm16 = VFMADDSUB213PDZ128r $xmm16, $xmm1, $xmm2
3746 $xmm16 = VFMADDSUB213PDZ128r $xmm16, $xmm1, $xmm2
3747 ; CHECK: $xmm16 = VFMADDSUB213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3748 $xmm16 = VFMADDSUB213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3749 ; CHECK: $xmm16 = VFMADDSUB213PSZ128r $xmm16, $xmm1, $xmm2
3750 $xmm16 = VFMADDSUB213PSZ128r $xmm16, $xmm1, $xmm2
3751 ; CHECK: $xmm16 = VFMADDSUB231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3752 $xmm16 = VFMADDSUB231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3753 ; CHECK: $xmm16 = VFMADDSUB231PDZ128r $xmm16, $xmm1, $xmm2
3754 $xmm16 = VFMADDSUB231PDZ128r $xmm16, $xmm1, $xmm2
3755 ; CHECK: $xmm16 = VFMADDSUB231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3756 $xmm16 = VFMADDSUB231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3757 ; CHECK: $xmm16 = VFMADDSUB231PSZ128r $xmm16, $xmm1, $xmm2
3758 $xmm16 = VFMADDSUB231PSZ128r $xmm16, $xmm1, $xmm2
3759 ; CHECK: $xmm16 = VFMSUB132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3760 $xmm16 = VFMSUB132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3761 ; CHECK: $xmm16 = VFMSUB132PDZ128r $xmm16, $xmm1, $xmm2
3762 $xmm16 = VFMSUB132PDZ128r $xmm16, $xmm1, $xmm2
3763 ; CHECK: $xmm16 = VFMSUB132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3764 $xmm16 = VFMSUB132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3765 ; CHECK: $xmm16 = VFMSUB132PSZ128r $xmm16, $xmm1, $xmm2
3766 $xmm16 = VFMSUB132PSZ128r $xmm16, $xmm1, $xmm2
3767 ; CHECK: $xmm16 = VFMSUB213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3768 $xmm16 = VFMSUB213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3769 ; CHECK: $xmm16 = VFMSUB213PDZ128r $xmm16, $xmm1, $xmm2
3770 $xmm16 = VFMSUB213PDZ128r $xmm16, $xmm1, $xmm2
3771 ; CHECK: $xmm16 = VFMSUB213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3772 $xmm16 = VFMSUB213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3773 ; CHECK: $xmm16 = VFMSUB213PSZ128r $xmm16, $xmm1, $xmm2
3774 $xmm16 = VFMSUB213PSZ128r $xmm16, $xmm1, $xmm2
3775 ; CHECK: $xmm16 = VFMSUB231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3776 $xmm16 = VFMSUB231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3777 ; CHECK: $xmm16 = VFMSUB231PDZ128r $xmm16, $xmm1, $xmm2
3778 $xmm16 = VFMSUB231PDZ128r $xmm16, $xmm1, $xmm2
3779 ; CHECK: $xmm16 = VFMSUB231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3780 $xmm16 = VFMSUB231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3781 ; CHECK: $xmm16 = VFMSUB231PSZ128r $xmm16, $xmm1, $xmm2
3782 $xmm16 = VFMSUB231PSZ128r $xmm16, $xmm1, $xmm2
3783 ; CHECK: $xmm16 = VFMSUBADD132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3784 $xmm16 = VFMSUBADD132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3785 ; CHECK: $xmm16 = VFMSUBADD132PDZ128r $xmm16, $xmm1, $xmm2
3786 $xmm16 = VFMSUBADD132PDZ128r $xmm16, $xmm1, $xmm2
3787 ; CHECK: $xmm16 = VFMSUBADD132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3788 $xmm16 = VFMSUBADD132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3789 ; CHECK: $xmm16 = VFMSUBADD132PSZ128r $xmm16, $xmm1, $xmm2
3790 $xmm16 = VFMSUBADD132PSZ128r $xmm16, $xmm1, $xmm2
3791 ; CHECK: $xmm16 = VFMSUBADD213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3792 $xmm16 = VFMSUBADD213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3793 ; CHECK: $xmm16 = VFMSUBADD213PDZ128r $xmm16, $xmm1, $xmm2
3794 $xmm16 = VFMSUBADD213PDZ128r $xmm16, $xmm1, $xmm2
3795 ; CHECK: $xmm16 = VFMSUBADD213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3796 $xmm16 = VFMSUBADD213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3797 ; CHECK: $xmm16 = VFMSUBADD213PSZ128r $xmm16, $xmm1, $xmm2
3798 $xmm16 = VFMSUBADD213PSZ128r $xmm16, $xmm1, $xmm2
3799 ; CHECK: $xmm16 = VFMSUBADD231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3800 $xmm16 = VFMSUBADD231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3801 ; CHECK: $xmm16 = VFMSUBADD231PDZ128r $xmm16, $xmm1, $xmm2
3802 $xmm16 = VFMSUBADD231PDZ128r $xmm16, $xmm1, $xmm2
3803 ; CHECK: $xmm16 = VFMSUBADD231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3804 $xmm16 = VFMSUBADD231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3805 ; CHECK: $xmm16 = VFMSUBADD231PSZ128r $xmm16, $xmm1, $xmm2
3806 $xmm16 = VFMSUBADD231PSZ128r $xmm16, $xmm1, $xmm2
3807 ; CHECK: $xmm16 = VFNMADD132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3808 $xmm16 = VFNMADD132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3809 ; CHECK: $xmm16 = VFNMADD132PDZ128r $xmm16, $xmm1, $xmm2
3810 $xmm16 = VFNMADD132PDZ128r $xmm16, $xmm1, $xmm2
3811 ; CHECK: $xmm16 = VFNMADD132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3812 $xmm16 = VFNMADD132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3813 ; CHECK: $xmm16 = VFNMADD132PSZ128r $xmm16, $xmm1, $xmm2
3814 $xmm16 = VFNMADD132PSZ128r $xmm16, $xmm1, $xmm2
3815 ; CHECK: $xmm16 = VFNMADD213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3816 $xmm16 = VFNMADD213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3817 ; CHECK: $xmm16 = VFNMADD213PDZ128r $xmm16, $xmm1, $xmm2
3818 $xmm16 = VFNMADD213PDZ128r $xmm16, $xmm1, $xmm2
3819 ; CHECK: $xmm16 = VFNMADD213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3820 $xmm16 = VFNMADD213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3821 ; CHECK: $xmm16 = VFNMADD213PSZ128r $xmm16, $xmm1, $xmm2
3822 $xmm16 = VFNMADD213PSZ128r $xmm16, $xmm1, $xmm2
3823 ; CHECK: $xmm16 = VFNMADD231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3824 $xmm16 = VFNMADD231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3825 ; CHECK: $xmm16 = VFNMADD231PDZ128r $xmm16, $xmm1, $xmm2
3826 $xmm16 = VFNMADD231PDZ128r $xmm16, $xmm1, $xmm2
3827 ; CHECK: $xmm16 = VFNMADD231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3828 $xmm16 = VFNMADD231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3829 ; CHECK: $xmm16 = VFNMADD231PSZ128r $xmm16, $xmm1, $xmm2
3830 $xmm16 = VFNMADD231PSZ128r $xmm16, $xmm1, $xmm2
3831 ; CHECK: $xmm16 = VFNMSUB132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3832 $xmm16 = VFNMSUB132PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3833 ; CHECK: $xmm16 = VFNMSUB132PDZ128r $xmm16, $xmm1, $xmm2
3834 $xmm16 = VFNMSUB132PDZ128r $xmm16, $xmm1, $xmm2
3835 ; CHECK: $xmm16 = VFNMSUB132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3836 $xmm16 = VFNMSUB132PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3837 ; CHECK: $xmm16 = VFNMSUB132PSZ128r $xmm16, $xmm1, $xmm2
3838 $xmm16 = VFNMSUB132PSZ128r $xmm16, $xmm1, $xmm2
3839 ; CHECK: $xmm16 = VFNMSUB213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3840 $xmm16 = VFNMSUB213PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3841 ; CHECK: $xmm16 = VFNMSUB213PDZ128r $xmm16, $xmm1, $xmm2
3842 $xmm16 = VFNMSUB213PDZ128r $xmm16, $xmm1, $xmm2
3843 ; CHECK: $xmm16 = VFNMSUB213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3844 $xmm16 = VFNMSUB213PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3845 ; CHECK: $xmm16 = VFNMSUB213PSZ128r $xmm16, $xmm1, $xmm2
3846 $xmm16 = VFNMSUB213PSZ128r $xmm16, $xmm1, $xmm2
3847 ; CHECK: $xmm16 = VFNMSUB231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3848 $xmm16 = VFNMSUB231PDZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3849 ; CHECK: $xmm16 = VFNMSUB231PDZ128r $xmm16, $xmm1, $xmm2
3850 $xmm16 = VFNMSUB231PDZ128r $xmm16, $xmm1, $xmm2
3851 ; CHECK: $xmm16 = VFNMSUB231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3852 $xmm16 = VFNMSUB231PSZ128m $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
3853 ; CHECK: $xmm16 = VFNMSUB231PSZ128r $xmm16, $xmm1, $xmm2
3854 $xmm16 = VFNMSUB231PSZ128r $xmm16, $xmm1, $xmm2
3855 ; CHECK: $xmm16 = VPSLLDZ128ri $xmm16, 7
3856 $xmm16 = VPSLLDZ128ri $xmm16, 7
3857 ; CHECK: $xmm16 = VPSLLDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3858 $xmm16 = VPSLLDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3859 ; CHECK: $xmm16 = VPSLLDZ128rr $xmm16, 14
3860 $xmm16 = VPSLLDZ128rr $xmm16, 14
3861 ; CHECK: $xmm16 = VPSLLQZ128ri $xmm16, 7
3862 $xmm16 = VPSLLQZ128ri $xmm16, 7
3863 ; CHECK: $xmm16 = VPSLLQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3864 $xmm16 = VPSLLQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3865 ; CHECK: $xmm16 = VPSLLQZ128rr $xmm16, 14
3866 $xmm16 = VPSLLQZ128rr $xmm16, 14
3867 ; CHECK: $xmm16 = VPSLLVDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3868 $xmm16 = VPSLLVDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3869 ; CHECK: $xmm16 = VPSLLVDZ128rr $xmm16, 14
3870 $xmm16 = VPSLLVDZ128rr $xmm16, 14
3871 ; CHECK: $xmm16 = VPSLLVQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3872 $xmm16 = VPSLLVQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3873 ; CHECK: $xmm16 = VPSLLVQZ128rr $xmm16, 14
3874 $xmm16 = VPSLLVQZ128rr $xmm16, 14
3875 ; CHECK: $xmm16 = VPSLLWZ128ri $xmm16, 7
3876 $xmm16 = VPSLLWZ128ri $xmm16, 7
3877 ; CHECK: $xmm16 = VPSLLWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3878 $xmm16 = VPSLLWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3879 ; CHECK: $xmm16 = VPSLLWZ128rr $xmm16, 14
3880 $xmm16 = VPSLLWZ128rr $xmm16, 14
3881 ; CHECK: $xmm16 = VPSRADZ128ri $xmm16, 7
3882 $xmm16 = VPSRADZ128ri $xmm16, 7
3883 ; CHECK: $xmm16 = VPSRADZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3884 $xmm16 = VPSRADZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3885 ; CHECK: $xmm16 = VPSRADZ128rr $xmm16, 14
3886 $xmm16 = VPSRADZ128rr $xmm16, 14
3887 ; CHECK: $xmm16 = VPSRAVDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3888 $xmm16 = VPSRAVDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3889 ; CHECK: $xmm16 = VPSRAVDZ128rr $xmm16, 14
3890 $xmm16 = VPSRAVDZ128rr $xmm16, 14
3891 ; CHECK: $xmm16 = VPSRAWZ128ri $xmm16, 7
3892 $xmm16 = VPSRAWZ128ri $xmm16, 7
3893 ; CHECK: $xmm16 = VPSRAWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3894 $xmm16 = VPSRAWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3895 ; CHECK: $xmm16 = VPSRAWZ128rr $xmm16, 14
3896 $xmm16 = VPSRAWZ128rr $xmm16, 14
3897 ; CHECK: $xmm16 = VPSRLDQZ128rr $xmm16, 14
3898 $xmm16 = VPSRLDQZ128rr $xmm16, 14
3899 ; CHECK: $xmm16 = VPSRLDZ128ri $xmm16, 7
3900 $xmm16 = VPSRLDZ128ri $xmm16, 7
3901 ; CHECK: $xmm16 = VPSRLDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3902 $xmm16 = VPSRLDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3903 ; CHECK: $xmm16 = VPSRLDZ128rr $xmm16, 14
3904 $xmm16 = VPSRLDZ128rr $xmm16, 14
3905 ; CHECK: $xmm16 = VPSRLQZ128ri $xmm16, 7
3906 $xmm16 = VPSRLQZ128ri $xmm16, 7
3907 ; CHECK: $xmm16 = VPSRLQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3908 $xmm16 = VPSRLQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3909 ; CHECK: $xmm16 = VPSRLQZ128rr $xmm16, 14
3910 $xmm16 = VPSRLQZ128rr $xmm16, 14
3911 ; CHECK: $xmm16 = VPSRLVDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3912 $xmm16 = VPSRLVDZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3913 ; CHECK: $xmm16 = VPSRLVDZ128rr $xmm16, 14
3914 $xmm16 = VPSRLVDZ128rr $xmm16, 14
3915 ; CHECK: $xmm16 = VPSRLVQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3916 $xmm16 = VPSRLVQZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3917 ; CHECK: $xmm16 = VPSRLVQZ128rr $xmm16, 14
3918 $xmm16 = VPSRLVQZ128rr $xmm16, 14
3919 ; CHECK: $xmm16 = VPSRLWZ128ri $xmm16, 7
3920 $xmm16 = VPSRLWZ128ri $xmm16, 7
3921 ; CHECK: $xmm16 = VPSRLWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3922 $xmm16 = VPSRLWZ128rm $xmm16, $rip, 1, $noreg, $rax, $noreg
3923 ; CHECK: $xmm16 = VPSRLWZ128rr $xmm16, 14
3924 $xmm16 = VPSRLWZ128rr $xmm16, 14
3925 ; CHECK: $xmm16 = VPERMILPDZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
3926 $xmm16 = VPERMILPDZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
3927 ; CHECK: $xmm16 = VPERMILPDZ128ri $xmm16, 9
3928 $xmm16 = VPERMILPDZ128ri $xmm16, 9
3929 ; CHECK: $xmm16 = VPERMILPDZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3930 $xmm16 = VPERMILPDZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3931 ; CHECK: $xmm16 = VPERMILPDZ128rr $xmm16, $xmm1
3932 $xmm16 = VPERMILPDZ128rr $xmm16, $xmm1
3933 ; CHECK: $xmm16 = VPERMILPSZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
3934 $xmm16 = VPERMILPSZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
3935 ; CHECK: $xmm16 = VPERMILPSZ128ri $xmm16, 9
3936 $xmm16 = VPERMILPSZ128ri $xmm16, 9
3937 ; CHECK: $xmm16 = VPERMILPSZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3938 $xmm16 = VPERMILPSZ128rm $xmm16, $rdi, 1, $noreg, 0, $noreg
3939 ; CHECK: $xmm16 = VPERMILPSZ128rr $xmm16, $xmm1
3940 $xmm16 = VPERMILPSZ128rr $xmm16, $xmm1
3941 ; CHECK: $xmm16 = VCVTPH2PSZ128rm $rdi, $xmm16, 1, $noreg, 0
3942 $xmm16 = VCVTPH2PSZ128rm $rdi, $xmm16, 1, $noreg, 0
3943 ; CHECK: $xmm16 = VCVTPH2PSZ128rr $xmm16
3944 $xmm16 = VCVTPH2PSZ128rr $xmm16
3945 ; CHECK: $xmm16 = VCVTDQ2PDZ128rm $rdi, $xmm16, 1, $noreg, 0
3946 $xmm16 = VCVTDQ2PDZ128rm $rdi, $xmm16, 1, $noreg, 0
3947 ; CHECK: $xmm16 = VCVTDQ2PDZ128rr $xmm16
3948 $xmm16 = VCVTDQ2PDZ128rr $xmm16
3949 ; CHECK: $xmm16 = VCVTDQ2PSZ128rm $rdi, $xmm16, 1, $noreg, 0
3950 $xmm16 = VCVTDQ2PSZ128rm $rdi, $xmm16, 1, $noreg, 0
3951 ; CHECK: $xmm16 = VCVTDQ2PSZ128rr $xmm16
3952 $xmm16 = VCVTDQ2PSZ128rr $xmm16
3953 ; CHECK: $xmm16 = VCVTPD2DQZ128rm $rdi, $xmm16, 1, $noreg, 0
3954 $xmm16 = VCVTPD2DQZ128rm $rdi, $xmm16, 1, $noreg, 0
3955 ; CHECK: $xmm16 = VCVTPD2DQZ128rr $xmm16
3956 $xmm16 = VCVTPD2DQZ128rr $xmm16
3957 ; CHECK: $xmm16 = VCVTPD2PSZ128rm $rdi, $xmm16, 1, $noreg, 0
3958 $xmm16 = VCVTPD2PSZ128rm $rdi, $xmm16, 1, $noreg, 0
3959 ; CHECK: $xmm16 = VCVTPD2PSZ128rr $xmm16
3960 $xmm16 = VCVTPD2PSZ128rr $xmm16
3961 ; CHECK: $xmm16 = VCVTPS2DQZ128rm $rdi, $xmm16, 1, $noreg, 0
3962 $xmm16 = VCVTPS2DQZ128rm $rdi, $xmm16, 1, $noreg, 0
3963 ; CHECK: $xmm16 = VCVTPS2DQZ128rr $xmm16
3964 $xmm16 = VCVTPS2DQZ128rr $xmm16
3965 ; CHECK: $xmm16 = VCVTPS2PDZ128rm $rdi, $xmm16, 1, $noreg, 0
3966 $xmm16 = VCVTPS2PDZ128rm $rdi, $xmm16, 1, $noreg, 0
3967 ; CHECK: $xmm16 = VCVTPS2PDZ128rr $xmm16
3968 $xmm16 = VCVTPS2PDZ128rr $xmm16
3969 ; CHECK: $xmm16 = VCVTTPD2DQZ128rm $rdi, $xmm16, 1, $noreg, 0
3970 $xmm16 = VCVTTPD2DQZ128rm $rdi, $xmm16, 1, $noreg, 0
3971 ; CHECK: $xmm16 = VCVTTPD2DQZ128rr $xmm16
3972 $xmm16 = VCVTTPD2DQZ128rr $xmm16
3973 ; CHECK: $xmm16 = VCVTTPS2DQZ128rm $rdi, $xmm16, 1, $noreg, 0
3974 $xmm16 = VCVTTPS2DQZ128rm $rdi, $xmm16, 1, $noreg, 0
3975 ; CHECK: $xmm16 = VCVTTPS2DQZ128rr $xmm16
3976 $xmm16 = VCVTTPS2DQZ128rr $xmm16
3977 ; CHECK: $xmm16 = VSQRTPDZ128m $rdi, $noreg, $noreg, $noreg, $noreg
3978 $xmm16 = VSQRTPDZ128m $rdi, $noreg, $noreg, $noreg, $noreg
3979 ; CHECK: $xmm16 = VSQRTPDZ128r $xmm16
3980 $xmm16 = VSQRTPDZ128r $xmm16
3981 ; CHECK: $xmm16 = VSQRTPSZ128m $rdi, $noreg, $noreg, $noreg, $noreg
3982 $xmm16 = VSQRTPSZ128m $rdi, $noreg, $noreg, $noreg, $noreg
3983 ; CHECK: $xmm16 = VSQRTPSZ128r $xmm16
3984 $xmm16 = VSQRTPSZ128r $xmm16
3985 ; CHECK: $xmm16 = VMOVDDUPZ128rm $rdi, 1, $noreg, 0, $noreg
3986 $xmm16 = VMOVDDUPZ128rm $rdi, 1, $noreg, 0, $noreg
3987 ; CHECK: $xmm16 = VMOVDDUPZ128rr $xmm16
3988 $xmm16 = VMOVDDUPZ128rr $xmm16
3989 ; CHECK: $xmm16 = VMOVSHDUPZ128rm $rdi, 1, $noreg, 0, $noreg
3990 $xmm16 = VMOVSHDUPZ128rm $rdi, 1, $noreg, 0, $noreg
3991 ; CHECK: $xmm16 = VMOVSHDUPZ128rr $xmm16
3992 $xmm16 = VMOVSHDUPZ128rr $xmm16
3993 ; CHECK: $xmm16 = VMOVSLDUPZ128rm $rdi, 1, $noreg, 0, $noreg
3994 $xmm16 = VMOVSLDUPZ128rm $rdi, 1, $noreg, 0, $noreg
3995 ; CHECK: $xmm16 = VMOVSLDUPZ128rr $xmm16
3996 $xmm16 = VMOVSLDUPZ128rr $xmm16
3997 ; CHECK: $xmm16 = VPSHUFBZ128rm $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
3998 $xmm16 = VPSHUFBZ128rm $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
3999 ; CHECK: $xmm16 = VPSHUFBZ128rr $xmm16, $xmm1
4000 $xmm16 = VPSHUFBZ128rr $xmm16, $xmm1
4001 ; CHECK: $xmm16 = VPSHUFDZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
4002 $xmm16 = VPSHUFDZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
4003 ; CHECK: $xmm16 = VPSHUFDZ128ri $xmm16, -24
4004 $xmm16 = VPSHUFDZ128ri $xmm16, -24
4005 ; CHECK: $xmm16 = VPSHUFHWZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
4006 $xmm16 = VPSHUFHWZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
4007 ; CHECK: $xmm16 = VPSHUFHWZ128ri $xmm16, -24
4008 $xmm16 = VPSHUFHWZ128ri $xmm16, -24
4009 ; CHECK: $xmm16 = VPSHUFLWZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
4010 $xmm16 = VPSHUFLWZ128mi $rdi, 1, $noreg, 0, $noreg, $noreg
4011 ; CHECK: $xmm16 = VPSHUFLWZ128ri $xmm16, -24
4012 $xmm16 = VPSHUFLWZ128ri $xmm16, -24
4013 ; CHECK: $xmm16 = VPSLLDQZ128rr $xmm16, $xmm1
4014 $xmm16 = VPSLLDQZ128rr $xmm16, $xmm1
4015 ; CHECK: $xmm16 = VSHUFPDZ128rmi $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
4016 $xmm16 = VSHUFPDZ128rmi $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
4017 ; CHECK: $xmm16 = VSHUFPDZ128rri $xmm16, $noreg, $noreg
4018 $xmm16 = VSHUFPDZ128rri $xmm16, $noreg, $noreg
4019 ; CHECK: $xmm16 = VSHUFPSZ128rmi $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
4020 $xmm16 = VSHUFPSZ128rmi $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
4021 ; CHECK: $xmm16 = VSHUFPSZ128rri $xmm16, $noreg, $noreg
4022 $xmm16 = VSHUFPSZ128rri $xmm16, $noreg, $noreg
4023 ; CHECK: $xmm16 = VPSADBWZ128rm $xmm16, 1, $noreg, $rax, $noreg, $noreg
4024 $xmm16 = VPSADBWZ128rm $xmm16, 1, $noreg, $rax, $noreg, $noreg
4025 ; CHECK: $xmm16 = VPSADBWZ128rr $xmm16, $xmm1
4026 $xmm16 = VPSADBWZ128rr $xmm16, $xmm1
4027 ; CHECK: $xmm16 = VBROADCASTSSZ128m $rip, $noreg, $noreg, $noreg, $noreg
4028 $xmm16 = VBROADCASTSSZ128m $rip, $noreg, $noreg, $noreg, $noreg
4029 ; CHECK: $xmm16 = VBROADCASTSSZ128r $xmm16
4030 $xmm16 = VBROADCASTSSZ128r $xmm16
4031 ; CHECK: $xmm16 = VPBROADCASTBZ128m $rip, $noreg, $noreg, $noreg, $noreg
4032 $xmm16 = VPBROADCASTBZ128m $rip, $noreg, $noreg, $noreg, $noreg
4033 ; CHECK: $xmm16 = VPBROADCASTBZ128r $xmm16
4034 $xmm16 = VPBROADCASTBZ128r $xmm16
4035 ; CHECK: $xmm16 = VPBROADCASTDZ128m $rip, $noreg, $noreg, $noreg, $noreg
4036 $xmm16 = VPBROADCASTDZ128m $rip, $noreg, $noreg, $noreg, $noreg
4037 ; CHECK: $xmm16 = VPBROADCASTDZ128r $xmm16
4038 $xmm16 = VPBROADCASTDZ128r $xmm16
4039 ; CHECK: $xmm16 = VPBROADCASTQZ128m $rip, $noreg, $noreg, $noreg, $noreg
4040 $xmm16 = VPBROADCASTQZ128m $rip, $noreg, $noreg, $noreg, $noreg
4041 ; CHECK: $xmm16 = VPBROADCASTQZ128r $xmm16
4042 $xmm16 = VPBROADCASTQZ128r $xmm16
4043 ; CHECK: $xmm16 = VPBROADCASTWZ128m $rip, $noreg, $noreg, $noreg, $noreg
4044 $xmm16 = VPBROADCASTWZ128m $rip, $noreg, $noreg, $noreg, $noreg
4045 ; CHECK: $xmm16 = VPBROADCASTWZ128r $xmm16
4046 $xmm16 = VPBROADCASTWZ128r $xmm16
4047 ; CHECK: $xmm16 = VBROADCASTI32X2Z128m $rip, $noreg, $noreg, $noreg, $noreg
4048 $xmm16 = VBROADCASTI32X2Z128m $rip, $noreg, $noreg, $noreg, $noreg
4049 ; CHECK: $xmm16 = VBROADCASTI32X2Z128r $xmm0
4050 $xmm16 = VBROADCASTI32X2Z128r $xmm0
4051 ; CHECK: $xmm16 = VCVTPS2PHZ128rr $xmm16, 2
4052 $xmm16 = VCVTPS2PHZ128rr $xmm16, 2
4053 ; CHECK: VCVTPS2PHZ128mr $rdi, $xmm16, 1, $noreg, 0, $noreg, $noreg
4054 VCVTPS2PHZ128mr $rdi, $xmm16, 1, $noreg, 0, $noreg, $noreg
4055 ; CHECK: $xmm16 = VPABSBZ128rm $rip, 1, $noreg, $rax, $noreg
4056 $xmm16 = VPABSBZ128rm $rip, 1, $noreg, $rax, $noreg
4057 ; CHECK: $xmm16 = VPABSBZ128rr $xmm16
4058 $xmm16 = VPABSBZ128rr $xmm16
4059 ; CHECK: $xmm16 = VPABSDZ128rm $rip, 1, $noreg, $rax, $noreg
4060 $xmm16 = VPABSDZ128rm $rip, 1, $noreg, $rax, $noreg
4061 ; CHECK: $xmm16 = VPABSDZ128rr $xmm16
4062 $xmm16 = VPABSDZ128rr $xmm16
4063 ; CHECK: $xmm16 = VPABSWZ128rm $rip, 1, $noreg, $rax, $noreg
4064 $xmm16 = VPABSWZ128rm $rip, 1, $noreg, $rax, $noreg
4065 ; CHECK: $xmm16 = VPABSWZ128rr $xmm16
4066 $xmm16 = VPABSWZ128rr $xmm16
4067 ; CHECK: $xmm16 = VPALIGNRZ128rmi $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
4068 $xmm16 = VPALIGNRZ128rmi $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg, $noreg
4069 ; CHECK: $xmm16 = VPALIGNRZ128rri $xmm16, $xmm1, 15
4070 $xmm16 = VPALIGNRZ128rri $xmm16, $xmm1, 15
4071 ; CHECK: VEXTRACTPSZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, $noreg
4072 VEXTRACTPSZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, $noreg
4073 ; CHECK: $eax = VEXTRACTPSZrr $xmm16, $noreg
4074 $eax = VEXTRACTPSZrr $xmm16, $noreg
4075 ; CHECK: $xmm16 = VINSERTPSZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, $noreg
4076 $xmm16 = VINSERTPSZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, $noreg
4077 ; CHECK: $xmm16 = VINSERTPSZrr $xmm16, $xmm16, $noreg
4078 $xmm16 = VINSERTPSZrr $xmm16, $xmm16, $noreg
4080 RET 0, $zmm0, $zmm1
4081 ...
4082 ---
4083 # CHECK-LABEL: name: evex_scalar_to_evex_test
4084 # CHECK: bb.0:
4086 name: evex_scalar_to_evex_test
4087 body: |
4088 bb.0:
4089 ; CHECK: $xmm16 = VADDSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4090 $xmm16 = VADDSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4091 ; CHECK: $xmm16 = VADDSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4092 $xmm16 = VADDSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4093 ; CHECK: $xmm16 = VADDSDZrr $xmm16, $xmm1
4094 $xmm16 = VADDSDZrr $xmm16, $xmm1
4095 ; CHECK: $xmm16 = VADDSDZrr_Int $xmm16, $xmm1
4096 $xmm16 = VADDSDZrr_Int $xmm16, $xmm1
4097 ; CHECK: $xmm16 = VADDSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4098 $xmm16 = VADDSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4099 ; CHECK: $xmm16 = VADDSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4100 $xmm16 = VADDSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4101 ; CHECK: $xmm16 = VADDSSZrr $xmm16, $xmm1
4102 $xmm16 = VADDSSZrr $xmm16, $xmm1
4103 ; CHECK: $xmm16 = VADDSSZrr_Int $xmm16, $xmm1
4104 $xmm16 = VADDSSZrr_Int $xmm16, $xmm1
4105 ; CHECK: $xmm16 = VDIVSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4106 $xmm16 = VDIVSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4107 ; CHECK: $xmm16 = VDIVSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4108 $xmm16 = VDIVSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4109 ; CHECK: $xmm16 = VDIVSDZrr $xmm16, $xmm1
4110 $xmm16 = VDIVSDZrr $xmm16, $xmm1
4111 ; CHECK: $xmm16 = VDIVSDZrr_Int $xmm16, $xmm1
4112 $xmm16 = VDIVSDZrr_Int $xmm16, $xmm1
4113 ; CHECK: $xmm16 = VDIVSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4114 $xmm16 = VDIVSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4115 ; CHECK: $xmm16 = VDIVSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4116 $xmm16 = VDIVSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4117 ; CHECK: $xmm16 = VDIVSSZrr $xmm16, $xmm1
4118 $xmm16 = VDIVSSZrr $xmm16, $xmm1
4119 ; CHECK: $xmm16 = VDIVSSZrr_Int $xmm16, $xmm1
4120 $xmm16 = VDIVSSZrr_Int $xmm16, $xmm1
4121 ; CHECK: $xmm16 = VMAXCSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4122 $xmm16 = VMAXCSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4123 ; CHECK: $xmm16 = VMAXCSDZrr $xmm16, $xmm1
4124 $xmm16 = VMAXCSDZrr $xmm16, $xmm1
4125 ; CHECK: $xmm16 = VMAXCSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4126 $xmm16 = VMAXCSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4127 ; CHECK: $xmm16 = VMAXCSSZrr $xmm16, $xmm1
4128 $xmm16 = VMAXCSSZrr $xmm16, $xmm1
4129 ; CHECK: $xmm16 = VMAXSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4130 $xmm16 = VMAXSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4131 ; CHECK: $xmm16 = VMAXSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4132 $xmm16 = VMAXSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4133 ; CHECK: $xmm16 = VMAXSDZrr $xmm16, $xmm1
4134 $xmm16 = VMAXSDZrr $xmm16, $xmm1
4135 ; CHECK: $xmm16 = VMAXSDZrr_Int $xmm16, $xmm1
4136 $xmm16 = VMAXSDZrr_Int $xmm16, $xmm1
4137 ; CHECK: $xmm16 = VMAXSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4138 $xmm16 = VMAXSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4139 ; CHECK: $xmm16 = VMAXSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4140 $xmm16 = VMAXSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4141 ; CHECK: $xmm16 = VMAXSSZrr $xmm16, $xmm1
4142 $xmm16 = VMAXSSZrr $xmm16, $xmm1
4143 ; CHECK: $xmm16 = VMAXSSZrr_Int $xmm16, $xmm1
4144 $xmm16 = VMAXSSZrr_Int $xmm16, $xmm1
4145 ; CHECK: $xmm16 = VMINCSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4146 $xmm16 = VMINCSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4147 ; CHECK: $xmm16 = VMINCSDZrr $xmm16, $xmm1
4148 $xmm16 = VMINCSDZrr $xmm16, $xmm1
4149 ; CHECK: $xmm16 = VMINCSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4150 $xmm16 = VMINCSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4151 ; CHECK: $xmm16 = VMINCSSZrr $xmm16, $xmm1
4152 $xmm16 = VMINCSSZrr $xmm16, $xmm1
4153 ; CHECK: $xmm16 = VMINSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4154 $xmm16 = VMINSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4155 ; CHECK: $xmm16 = VMINSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4156 $xmm16 = VMINSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4157 ; CHECK: $xmm16 = VMINSDZrr $xmm16, $xmm1
4158 $xmm16 = VMINSDZrr $xmm16, $xmm1
4159 ; CHECK: $xmm16 = VMINSDZrr_Int $xmm16, $xmm1
4160 $xmm16 = VMINSDZrr_Int $xmm16, $xmm1
4161 ; CHECK: $xmm16 = VMINSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4162 $xmm16 = VMINSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4163 ; CHECK: $xmm16 = VMINSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4164 $xmm16 = VMINSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4165 ; CHECK: $xmm16 = VMINSSZrr $xmm16, $xmm1
4166 $xmm16 = VMINSSZrr $xmm16, $xmm1
4167 ; CHECK: $xmm16 = VMINSSZrr_Int $xmm16, $xmm1
4168 $xmm16 = VMINSSZrr_Int $xmm16, $xmm1
4169 ; CHECK: $xmm16 = VMULSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4170 $xmm16 = VMULSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4171 ; CHECK: $xmm16 = VMULSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4172 $xmm16 = VMULSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4173 ; CHECK: $xmm16 = VMULSDZrr $xmm16, $xmm1
4174 $xmm16 = VMULSDZrr $xmm16, $xmm1
4175 ; CHECK: $xmm16 = VMULSDZrr_Int $xmm16, $xmm1
4176 $xmm16 = VMULSDZrr_Int $xmm16, $xmm1
4177 ; CHECK: $xmm16 = VMULSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4178 $xmm16 = VMULSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4179 ; CHECK: $xmm16 = VMULSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4180 $xmm16 = VMULSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4181 ; CHECK: $xmm16 = VMULSSZrr $xmm16, $xmm1
4182 $xmm16 = VMULSSZrr $xmm16, $xmm1
4183 ; CHECK: $xmm16 = VMULSSZrr_Int $xmm16, $xmm1
4184 $xmm16 = VMULSSZrr_Int $xmm16, $xmm1
4185 ; CHECK: $xmm16 = VSUBSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4186 $xmm16 = VSUBSDZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4187 ; CHECK: $xmm16 = VSUBSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4188 $xmm16 = VSUBSDZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4189 ; CHECK: $xmm16 = VSUBSDZrr $xmm16, $xmm1
4190 $xmm16 = VSUBSDZrr $xmm16, $xmm1
4191 ; CHECK: $xmm16 = VSUBSDZrr_Int $xmm16, $xmm1
4192 $xmm16 = VSUBSDZrr_Int $xmm16, $xmm1
4193 ; CHECK: $xmm16 = VSUBSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4194 $xmm16 = VSUBSSZrm $xmm16, $rip, 1, $noreg, $rax, $noreg
4195 ; CHECK: $xmm16 = VSUBSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4196 $xmm16 = VSUBSSZrm_Int $xmm16, $rip, 1, $noreg, $rax, $noreg
4197 ; CHECK: $xmm16 = VSUBSSZrr $xmm16, $xmm1
4198 $xmm16 = VSUBSSZrr $xmm16, $xmm1
4199 ; CHECK: $xmm16 = VSUBSSZrr_Int $xmm16, $xmm1
4200 $xmm16 = VSUBSSZrr_Int $xmm16, $xmm1
4201 ; CHECK: $xmm16 = VFMADD132SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4202 $xmm16 = VFMADD132SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4203 ; CHECK: $xmm16 = VFMADD132SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4204 $xmm16 = VFMADD132SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4205 ; CHECK: $xmm16 = VFMADD132SDZr $xmm16, $xmm1, $xmm2
4206 $xmm16 = VFMADD132SDZr $xmm16, $xmm1, $xmm2
4207 ; CHECK: $xmm16 = VFMADD132SDZr_Int $xmm16, $xmm1, $xmm2
4208 $xmm16 = VFMADD132SDZr_Int $xmm16, $xmm1, $xmm2
4209 ; CHECK: $xmm16 = VFMADD132SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4210 $xmm16 = VFMADD132SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4211 ; CHECK: $xmm16 = VFMADD132SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4212 $xmm16 = VFMADD132SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4213 ; CHECK: $xmm16 = VFMADD132SSZr $xmm16, $xmm1, $xmm2
4214 $xmm16 = VFMADD132SSZr $xmm16, $xmm1, $xmm2
4215 ; CHECK: $xmm16 = VFMADD132SSZr_Int $xmm16, $xmm1, $xmm2
4216 $xmm16 = VFMADD132SSZr_Int $xmm16, $xmm1, $xmm2
4217 ; CHECK: $xmm16 = VFMADD213SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4218 $xmm16 = VFMADD213SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4219 ; CHECK: $xmm16 = VFMADD213SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4220 $xmm16 = VFMADD213SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4221 ; CHECK: $xmm16 = VFMADD213SDZr $xmm16, $xmm1, $xmm2
4222 $xmm16 = VFMADD213SDZr $xmm16, $xmm1, $xmm2
4223 ; CHECK: $xmm16 = VFMADD213SDZr_Int $xmm16, $xmm1, $xmm2
4224 $xmm16 = VFMADD213SDZr_Int $xmm16, $xmm1, $xmm2
4225 ; CHECK: $xmm16 = VFMADD213SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4226 $xmm16 = VFMADD213SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4227 ; CHECK: $xmm16 = VFMADD213SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4228 $xmm16 = VFMADD213SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4229 ; CHECK: $xmm16 = VFMADD213SSZr $xmm16, $xmm1, $xmm2
4230 $xmm16 = VFMADD213SSZr $xmm16, $xmm1, $xmm2
4231 ; CHECK: $xmm16 = VFMADD213SSZr_Int $xmm16, $xmm1, $xmm2
4232 $xmm16 = VFMADD213SSZr_Int $xmm16, $xmm1, $xmm2
4233 ; CHECK: $xmm16 = VFMADD231SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4234 $xmm16 = VFMADD231SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4235 ; CHECK: $xmm16 = VFMADD231SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4236 $xmm16 = VFMADD231SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4237 ; CHECK: $xmm16 = VFMADD231SDZr $xmm16, $xmm1, $xmm2
4238 $xmm16 = VFMADD231SDZr $xmm16, $xmm1, $xmm2
4239 ; CHECK: $xmm16 = VFMADD231SDZr_Int $xmm16, $xmm1, $xmm2
4240 $xmm16 = VFMADD231SDZr_Int $xmm16, $xmm1, $xmm2
4241 ; CHECK: $xmm16 = VFMADD231SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4242 $xmm16 = VFMADD231SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4243 ; CHECK: $xmm16 = VFMADD231SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4244 $xmm16 = VFMADD231SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4245 ; CHECK: $xmm16 = VFMADD231SSZr $xmm16, $xmm1, $xmm2
4246 $xmm16 = VFMADD231SSZr $xmm16, $xmm1, $xmm2
4247 ; CHECK: $xmm16 = VFMADD231SSZr_Int $xmm16, $xmm1, $xmm2
4248 $xmm16 = VFMADD231SSZr_Int $xmm16, $xmm1, $xmm2
4249 ; CHECK: $xmm16 = VFMSUB132SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4250 $xmm16 = VFMSUB132SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4251 ; CHECK: $xmm16 = VFMSUB132SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4252 $xmm16 = VFMSUB132SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4253 ; CHECK: $xmm16 = VFMSUB132SDZr $xmm16, $xmm1, $xmm2
4254 $xmm16 = VFMSUB132SDZr $xmm16, $xmm1, $xmm2
4255 ; CHECK: $xmm16 = VFMSUB132SDZr_Int $xmm16, $xmm1, $xmm2
4256 $xmm16 = VFMSUB132SDZr_Int $xmm16, $xmm1, $xmm2
4257 ; CHECK: $xmm16 = VFMSUB132SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4258 $xmm16 = VFMSUB132SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4259 ; CHECK: $xmm16 = VFMSUB132SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4260 $xmm16 = VFMSUB132SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4261 ; CHECK: $xmm16 = VFMSUB132SSZr $xmm16, $xmm1, $xmm2
4262 $xmm16 = VFMSUB132SSZr $xmm16, $xmm1, $xmm2
4263 ; CHECK: $xmm16 = VFMSUB132SSZr_Int $xmm16, $xmm1, $xmm2
4264 $xmm16 = VFMSUB132SSZr_Int $xmm16, $xmm1, $xmm2
4265 ; CHECK: $xmm16 = VFMSUB213SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4266 $xmm16 = VFMSUB213SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4267 ; CHECK: $xmm16 = VFMSUB213SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4268 $xmm16 = VFMSUB213SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4269 ; CHECK: $xmm16 = VFMSUB213SDZr $xmm16, $xmm1, $xmm2
4270 $xmm16 = VFMSUB213SDZr $xmm16, $xmm1, $xmm2
4271 ; CHECK: $xmm16 = VFMSUB213SDZr_Int $xmm16, $xmm1, $xmm2
4272 $xmm16 = VFMSUB213SDZr_Int $xmm16, $xmm1, $xmm2
4273 ; CHECK: $xmm16 = VFMSUB213SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4274 $xmm16 = VFMSUB213SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4275 ; CHECK: $xmm16 = VFMSUB213SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4276 $xmm16 = VFMSUB213SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4277 ; CHECK: $xmm16 = VFMSUB213SSZr $xmm16, $xmm1, $xmm2
4278 $xmm16 = VFMSUB213SSZr $xmm16, $xmm1, $xmm2
4279 ; CHECK: $xmm16 = VFMSUB213SSZr_Int $xmm16, $xmm1, $xmm2
4280 $xmm16 = VFMSUB213SSZr_Int $xmm16, $xmm1, $xmm2
4281 ; CHECK: $xmm16 = VFMSUB231SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4282 $xmm16 = VFMSUB231SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4283 ; CHECK: $xmm16 = VFMSUB231SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4284 $xmm16 = VFMSUB231SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4285 ; CHECK: $xmm16 = VFMSUB231SDZr $xmm16, $xmm1, $xmm2
4286 $xmm16 = VFMSUB231SDZr $xmm16, $xmm1, $xmm2
4287 ; CHECK: $xmm16 = VFMSUB231SDZr_Int $xmm16, $xmm1, $xmm2
4288 $xmm16 = VFMSUB231SDZr_Int $xmm16, $xmm1, $xmm2
4289 ; CHECK: $xmm16 = VFMSUB231SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4290 $xmm16 = VFMSUB231SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4291 ; CHECK: $xmm16 = VFMSUB231SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4292 $xmm16 = VFMSUB231SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4293 ; CHECK: $xmm16 = VFMSUB231SSZr $xmm16, $xmm1, $xmm2
4294 $xmm16 = VFMSUB231SSZr $xmm16, $xmm1, $xmm2
4295 ; CHECK: $xmm16 = VFMSUB231SSZr_Int $xmm16, $xmm1, $xmm2
4296 $xmm16 = VFMSUB231SSZr_Int $xmm16, $xmm1, $xmm2
4297 ; CHECK: $xmm16 = VFNMADD132SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4298 $xmm16 = VFNMADD132SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4299 ; CHECK: $xmm16 = VFNMADD132SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4300 $xmm16 = VFNMADD132SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4301 ; CHECK: $xmm16 = VFNMADD132SDZr $xmm16, $xmm1, $xmm2
4302 $xmm16 = VFNMADD132SDZr $xmm16, $xmm1, $xmm2
4303 ; CHECK: $xmm16 = VFNMADD132SDZr_Int $xmm16, $xmm1, $xmm2
4304 $xmm16 = VFNMADD132SDZr_Int $xmm16, $xmm1, $xmm2
4305 ; CHECK: $xmm16 = VFNMADD132SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4306 $xmm16 = VFNMADD132SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4307 ; CHECK: $xmm16 = VFNMADD132SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4308 $xmm16 = VFNMADD132SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4309 ; CHECK: $xmm16 = VFNMADD132SSZr $xmm16, $xmm1, $xmm2
4310 $xmm16 = VFNMADD132SSZr $xmm16, $xmm1, $xmm2
4311 ; CHECK: $xmm16 = VFNMADD132SSZr_Int $xmm16, $xmm1, $xmm2
4312 $xmm16 = VFNMADD132SSZr_Int $xmm16, $xmm1, $xmm2
4313 ; CHECK: $xmm16 = VFNMADD213SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4314 $xmm16 = VFNMADD213SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4315 ; CHECK: $xmm16 = VFNMADD213SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4316 $xmm16 = VFNMADD213SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4317 ; CHECK: $xmm16 = VFNMADD213SDZr $xmm16, $xmm1, $xmm2
4318 $xmm16 = VFNMADD213SDZr $xmm16, $xmm1, $xmm2
4319 ; CHECK: $xmm16 = VFNMADD213SDZr_Int $xmm16, $xmm1, $xmm2
4320 $xmm16 = VFNMADD213SDZr_Int $xmm16, $xmm1, $xmm2
4321 ; CHECK: $xmm16 = VFNMADD213SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4322 $xmm16 = VFNMADD213SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4323 ; CHECK: $xmm16 = VFNMADD213SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4324 $xmm16 = VFNMADD213SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4325 ; CHECK: $xmm16 = VFNMADD213SSZr $xmm16, $xmm1, $xmm2
4326 $xmm16 = VFNMADD213SSZr $xmm16, $xmm1, $xmm2
4327 ; CHECK: $xmm16 = VFNMADD213SSZr_Int $xmm16, $xmm1, $xmm2
4328 $xmm16 = VFNMADD213SSZr_Int $xmm16, $xmm1, $xmm2
4329 ; CHECK: $xmm16 = VFNMADD231SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4330 $xmm16 = VFNMADD231SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4331 ; CHECK: $xmm16 = VFNMADD231SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4332 $xmm16 = VFNMADD231SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4333 ; CHECK: $xmm16 = VFNMADD231SDZr $xmm16, $xmm1, $xmm2
4334 $xmm16 = VFNMADD231SDZr $xmm16, $xmm1, $xmm2
4335 ; CHECK: $xmm16 = VFNMADD231SDZr_Int $xmm16, $xmm1, $xmm2
4336 $xmm16 = VFNMADD231SDZr_Int $xmm16, $xmm1, $xmm2
4337 ; CHECK: $xmm16 = VFNMADD231SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4338 $xmm16 = VFNMADD231SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4339 ; CHECK: $xmm16 = VFNMADD231SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4340 $xmm16 = VFNMADD231SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4341 ; CHECK: $xmm16 = VFNMADD231SSZr $xmm16, $xmm1, $xmm2
4342 $xmm16 = VFNMADD231SSZr $xmm16, $xmm1, $xmm2
4343 ; CHECK: $xmm16 = VFNMADD231SSZr_Int $xmm16, $xmm1, $xmm2
4344 $xmm16 = VFNMADD231SSZr_Int $xmm16, $xmm1, $xmm2
4345 ; CHECK: $xmm16 = VFNMSUB132SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4346 $xmm16 = VFNMSUB132SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4347 ; CHECK: $xmm16 = VFNMSUB132SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4348 $xmm16 = VFNMSUB132SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4349 ; CHECK: $xmm16 = VFNMSUB132SDZr $xmm16, $xmm1, $xmm2
4350 $xmm16 = VFNMSUB132SDZr $xmm16, $xmm1, $xmm2
4351 ; CHECK: $xmm16 = VFNMSUB132SDZr_Int $xmm16, $xmm1, $xmm2
4352 $xmm16 = VFNMSUB132SDZr_Int $xmm16, $xmm1, $xmm2
4353 ; CHECK: $xmm16 = VFNMSUB132SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4354 $xmm16 = VFNMSUB132SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4355 ; CHECK: $xmm16 = VFNMSUB132SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4356 $xmm16 = VFNMSUB132SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4357 ; CHECK: $xmm16 = VFNMSUB132SSZr $xmm16, $xmm1, $xmm2
4358 $xmm16 = VFNMSUB132SSZr $xmm16, $xmm1, $xmm2
4359 ; CHECK: $xmm16 = VFNMSUB132SSZr_Int $xmm16, $xmm1, $xmm2
4360 $xmm16 = VFNMSUB132SSZr_Int $xmm16, $xmm1, $xmm2
4361 ; CHECK: $xmm16 = VFNMSUB213SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4362 $xmm16 = VFNMSUB213SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4363 ; CHECK: $xmm16 = VFNMSUB213SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4364 $xmm16 = VFNMSUB213SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4365 ; CHECK: $xmm16 = VFNMSUB213SDZr $xmm16, $xmm1, $xmm2
4366 $xmm16 = VFNMSUB213SDZr $xmm16, $xmm1, $xmm2
4367 ; CHECK: $xmm16 = VFNMSUB213SDZr_Int $xmm16, $xmm1, $xmm2
4368 $xmm16 = VFNMSUB213SDZr_Int $xmm16, $xmm1, $xmm2
4369 ; CHECK: $xmm16 = VFNMSUB213SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4370 $xmm16 = VFNMSUB213SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4371 ; CHECK: $xmm16 = VFNMSUB213SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4372 $xmm16 = VFNMSUB213SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4373 ; CHECK: $xmm16 = VFNMSUB213SSZr $xmm16, $xmm1, $xmm2
4374 $xmm16 = VFNMSUB213SSZr $xmm16, $xmm1, $xmm2
4375 ; CHECK: $xmm16 = VFNMSUB213SSZr_Int $xmm16, $xmm1, $xmm2
4376 $xmm16 = VFNMSUB213SSZr_Int $xmm16, $xmm1, $xmm2
4377 ; CHECK: $xmm16 = VFNMSUB231SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4378 $xmm16 = VFNMSUB231SDZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4379 ; CHECK: $xmm16 = VFNMSUB231SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4380 $xmm16 = VFNMSUB231SDZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4381 ; CHECK: $xmm16 = VFNMSUB231SDZr $xmm16, $xmm1, $xmm2
4382 $xmm16 = VFNMSUB231SDZr $xmm16, $xmm1, $xmm2
4383 ; CHECK: $xmm16 = VFNMSUB231SDZr_Int $xmm16, $xmm1, $xmm2
4384 $xmm16 = VFNMSUB231SDZr_Int $xmm16, $xmm1, $xmm2
4385 ; CHECK: $xmm16 = VFNMSUB231SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4386 $xmm16 = VFNMSUB231SSZm $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4387 ; CHECK: $xmm16 = VFNMSUB231SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4388 $xmm16 = VFNMSUB231SSZm_Int $xmm16, $xmm16, $rsi, 1, $noreg, 0, $noreg
4389 ; CHECK: $xmm16 = VFNMSUB231SSZr $xmm16, $xmm1, $xmm2
4390 $xmm16 = VFNMSUB231SSZr $xmm16, $xmm1, $xmm2
4391 ; CHECK: $xmm16 = VFNMSUB231SSZr_Int $xmm16, $xmm1, $xmm2
4392 $xmm16 = VFNMSUB231SSZr_Int $xmm16, $xmm1, $xmm2
4393 ; CHECK: VPEXTRBZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, 3
4394 VPEXTRBZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, 3
4395 ; CHECK: $eax = VPEXTRBZrr $xmm16, 1
4396 $eax = VPEXTRBZrr $xmm16, 1
4397 ; CHECK: VPEXTRDZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, 3
4398 VPEXTRDZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, 3
4399 ; CHECK: $eax = VPEXTRDZrr $xmm16, 1
4400 $eax = VPEXTRDZrr $xmm16, 1
4401 ; CHECK: VPEXTRQZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, 3
4402 VPEXTRQZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, 3
4403 ; CHECK: $rax = VPEXTRQZrr $xmm16, 1
4404 $rax = VPEXTRQZrr $xmm16, 1
4405 ; CHECK: VPEXTRWZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, 3
4406 VPEXTRWZmr $rdi, 1, $noreg, 0, $noreg, $xmm16, 3
4407 ; CHECK: $eax = VPEXTRWZrr $xmm16, 1
4408 $eax = VPEXTRWZrr $xmm16, 1
4409 ; CHECK: $eax = VPEXTRWZrr_REV $xmm16, 1
4410 $eax = VPEXTRWZrr_REV $xmm16, 1
4411 ; CHECK: $xmm16 = VPINSRBZrm $xmm16, $rsi, 1, $noreg, 0, $noreg, 3
4412 $xmm16 = VPINSRBZrm $xmm16, $rsi, 1, $noreg, 0, $noreg, 3
4413 ; CHECK: $xmm16 = VPINSRBZrr $xmm16, $edi, 5
4414 $xmm16 = VPINSRBZrr $xmm16, $edi, 5
4415 ; CHECK: $xmm16 = VPINSRDZrm $xmm16, $rsi, 1, $noreg, 0, $noreg, 3
4416 $xmm16 = VPINSRDZrm $xmm16, $rsi, 1, $noreg, 0, $noreg, 3
4417 ; CHECK: $xmm16 = VPINSRDZrr $xmm16, $edi, 5
4418 $xmm16 = VPINSRDZrr $xmm16, $edi, 5
4419 ; CHECK: $xmm16 = VPINSRQZrm $xmm16, $rsi, 1, $noreg, 0, $noreg, 3
4420 $xmm16 = VPINSRQZrm $xmm16, $rsi, 1, $noreg, 0, $noreg, 3
4421 ; CHECK: $xmm16 = VPINSRQZrr $xmm16, $rdi, 5
4422 $xmm16 = VPINSRQZrr $xmm16, $rdi, 5
4423 ; CHECK: $xmm16 = VPINSRWZrm $xmm16, $rsi, 1, $noreg, 0, $noreg, 3
4424 $xmm16 = VPINSRWZrm $xmm16, $rsi, 1, $noreg, 0, $noreg, 3
4425 ; CHECK: $xmm16 = VPINSRWZrr $xmm16, $edi, 5
4426 $xmm16 = VPINSRWZrr $xmm16, $edi, 5
4427 ; CHECK: $xmm16 = VSQRTSDZm $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
4428 $xmm16 = VSQRTSDZm $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
4429 ; CHECK: $xmm16 = VSQRTSDZm_Int $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
4430 $xmm16 = VSQRTSDZm_Int $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
4431 ; CHECK: $xmm16 = VSQRTSDZr $xmm16, $noreg
4432 $xmm16 = VSQRTSDZr $xmm16, $noreg
4433 ; CHECK: $xmm16 = VSQRTSDZr_Int $xmm16, $noreg
4434 $xmm16 = VSQRTSDZr_Int $xmm16, $noreg
4435 ; CHECK: $xmm16 = VSQRTSSZm $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
4436 $xmm16 = VSQRTSSZm $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
4437 ; CHECK: $xmm16 = VSQRTSSZm_Int $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
4438 $xmm16 = VSQRTSSZm_Int $xmm16, $noreg, $noreg, $noreg, $noreg, $noreg
4439 ; CHECK: $xmm16 = VSQRTSSZr $xmm16, $noreg
4440 $xmm16 = VSQRTSSZr $xmm16, $noreg
4441 ; CHECK: $xmm16 = VSQRTSSZr_Int $xmm16, $noreg
4442 $xmm16 = VSQRTSSZr_Int $xmm16, $noreg
4443 ; CHECK: $rdi = VCVTSD2SI64Zrm_Int $rdi, $xmm16, 1, $noreg, 0
4444 $rdi = VCVTSD2SI64Zrm_Int $rdi, $xmm16, 1, $noreg, 0
4445 ; CHECK: $rdi = VCVTSD2SI64Zrr_Int $xmm16
4446 $rdi = VCVTSD2SI64Zrr_Int $xmm16
4447 ; CHECK: $edi = VCVTSD2SIZrm_Int $rdi, $xmm16, 1, $noreg, 0
4448 $edi = VCVTSD2SIZrm_Int $rdi, $xmm16, 1, $noreg, 0
4449 ; CHECK: $edi = VCVTSD2SIZrr_Int $xmm16
4450 $edi = VCVTSD2SIZrr_Int $xmm16
4451 ; CHECK: $xmm16 = VCVTSD2SSZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4452 $xmm16 = VCVTSD2SSZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4453 ; CHECK: $xmm16 = VCVTSD2SSZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4454 $xmm16 = VCVTSD2SSZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4455 ; CHECK: $xmm16 = VCVTSD2SSZrr $xmm16, $noreg
4456 $xmm16 = VCVTSD2SSZrr $xmm16, $noreg
4457 ; CHECK: $xmm16 = VCVTSD2SSZrr_Int $xmm16, $noreg
4458 $xmm16 = VCVTSD2SSZrr_Int $xmm16, $noreg
4459 ; CHECK: $xmm16 = VCVTSI2SDZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4460 $xmm16 = VCVTSI2SDZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4461 ; CHECK: $xmm16 = VCVTSI2SDZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4462 $xmm16 = VCVTSI2SDZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4463 ; CHECK: $xmm16 = VCVTSI2SDZrr $xmm16, $noreg
4464 $xmm16 = VCVTSI2SDZrr $xmm16, $noreg
4465 ; CHECK: $xmm16 = VCVTSI2SDZrr_Int $xmm16, $noreg
4466 $xmm16 = VCVTSI2SDZrr_Int $xmm16, $noreg
4467 ; CHECK: $xmm16 = VCVTSI2SSZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4468 $xmm16 = VCVTSI2SSZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4469 ; CHECK: $xmm16 = VCVTSI2SSZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4470 $xmm16 = VCVTSI2SSZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4471 ; CHECK: $xmm16 = VCVTSI2SSZrr $xmm16, $noreg
4472 $xmm16 = VCVTSI2SSZrr $xmm16, $noreg
4473 ; CHECK: $xmm16 = VCVTSI2SSZrr_Int $xmm16, $noreg
4474 $xmm16 = VCVTSI2SSZrr_Int $xmm16, $noreg
4475 ; CHECK: $xmm16 = VCVTSI642SDZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4476 $xmm16 = VCVTSI642SDZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4477 ; CHECK: $xmm16 = VCVTSI642SDZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4478 $xmm16 = VCVTSI642SDZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4479 ; CHECK: $xmm16 = VCVTSI642SDZrr $xmm16, $noreg
4480 $xmm16 = VCVTSI642SDZrr $xmm16, $noreg
4481 ; CHECK: $xmm16 = VCVTSI642SDZrr_Int $xmm16, $noreg
4482 $xmm16 = VCVTSI642SDZrr_Int $xmm16, $noreg
4483 ; CHECK: $xmm16 = VCVTSI642SSZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4484 $xmm16 = VCVTSI642SSZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4485 ; CHECK: $xmm16 = VCVTSI642SSZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4486 $xmm16 = VCVTSI642SSZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4487 ; CHECK: $xmm16 = VCVTSI642SSZrr $xmm16, $noreg
4488 $xmm16 = VCVTSI642SSZrr $xmm16, $noreg
4489 ; CHECK: $xmm16 = VCVTSI642SSZrr_Int $xmm16, $noreg
4490 $xmm16 = VCVTSI642SSZrr_Int $xmm16, $noreg
4491 ; CHECK: $xmm16 = VCVTSS2SDZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4492 $xmm16 = VCVTSS2SDZrm $xmm16, $rdi, 1, $noreg, 0, $noreg
4493 ; CHECK: $xmm16 = VCVTSS2SDZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4494 $xmm16 = VCVTSS2SDZrm_Int $xmm16, $rdi, 1, $noreg, 0, $noreg
4495 ; CHECK: $xmm16 = VCVTSS2SDZrr $xmm16, $noreg
4496 $xmm16 = VCVTSS2SDZrr $xmm16, $noreg
4497 ; CHECK: $xmm16 = VCVTSS2SDZrr_Int $xmm16, $noreg
4498 $xmm16 = VCVTSS2SDZrr_Int $xmm16, $noreg
4499 ; CHECK: $rdi = VCVTSS2SI64Zrm_Int $rdi, $xmm16, 1, $noreg, 0
4500 $rdi = VCVTSS2SI64Zrm_Int $rdi, $xmm16, 1, $noreg, 0
4501 ; CHECK: $rdi = VCVTSS2SI64Zrr_Int $xmm16
4502 $rdi = VCVTSS2SI64Zrr_Int $xmm16
4503 ; CHECK: $edi = VCVTSS2SIZrm_Int $rdi, $xmm16, 1, $noreg, 0
4504 $edi = VCVTSS2SIZrm_Int $rdi, $xmm16, 1, $noreg, 0
4505 ; CHECK: $edi = VCVTSS2SIZrr_Int $xmm16
4506 $edi = VCVTSS2SIZrr_Int $xmm16
4507 ; CHECK: $rdi = VCVTTSD2SI64Zrm $rdi, $xmm16, 1, $noreg, 0
4508 $rdi = VCVTTSD2SI64Zrm $rdi, $xmm16, 1, $noreg, 0
4509 ; CHECK: $rdi = VCVTTSD2SI64Zrm_Int $rdi, $xmm16, 1, $noreg, 0
4510 $rdi = VCVTTSD2SI64Zrm_Int $rdi, $xmm16, 1, $noreg, 0
4511 ; CHECK: $rdi = VCVTTSD2SI64Zrr $xmm16
4512 $rdi = VCVTTSD2SI64Zrr $xmm16
4513 ; CHECK: $rdi = VCVTTSD2SI64Zrr_Int $xmm16
4514 $rdi = VCVTTSD2SI64Zrr_Int $xmm16
4515 ; CHECK: $edi = VCVTTSD2SIZrm $rdi, $xmm16, 1, $noreg, 0
4516 $edi = VCVTTSD2SIZrm $rdi, $xmm16, 1, $noreg, 0
4517 ; CHECK: $edi = VCVTTSD2SIZrm_Int $rdi, $xmm16, 1, $noreg, 0
4518 $edi = VCVTTSD2SIZrm_Int $rdi, $xmm16, 1, $noreg, 0
4519 ; CHECK: $edi = VCVTTSD2SIZrr $xmm16
4520 $edi = VCVTTSD2SIZrr $xmm16
4521 ; CHECK: $edi = VCVTTSD2SIZrr_Int $xmm16
4522 $edi = VCVTTSD2SIZrr_Int $xmm16
4523 ; CHECK: $rdi = VCVTTSS2SI64Zrm $rdi, $xmm16, 1, $noreg, 0
4524 $rdi = VCVTTSS2SI64Zrm $rdi, $xmm16, 1, $noreg, 0
4525 ; CHECK: $rdi = VCVTTSS2SI64Zrm_Int $rdi, $xmm16, 1, $noreg, 0
4526 $rdi = VCVTTSS2SI64Zrm_Int $rdi, $xmm16, 1, $noreg, 0
4527 ; CHECK: $rdi = VCVTTSS2SI64Zrr $xmm16
4528 $rdi = VCVTTSS2SI64Zrr $xmm16
4529 ; CHECK: $rdi = VCVTTSS2SI64Zrr_Int $xmm16
4530 $rdi = VCVTTSS2SI64Zrr_Int $xmm16
4531 ; CHECK: $edi = VCVTTSS2SIZrm $rdi, $xmm16, 1, $noreg, 0
4532 $edi = VCVTTSS2SIZrm $rdi, $xmm16, 1, $noreg, 0
4533 ; CHECK: $edi = VCVTTSS2SIZrm_Int $rdi, $xmm16, 1, $noreg, 0
4534 $edi = VCVTTSS2SIZrm_Int $rdi, $xmm16, 1, $noreg, 0
4535 ; CHECK: $edi = VCVTTSS2SIZrr $xmm16
4536 $edi = VCVTTSS2SIZrr $xmm16
4537 ; CHECK: $edi = VCVTTSS2SIZrr_Int $xmm16
4538 $edi = VCVTTSS2SIZrr_Int $xmm16
4539 ; CHECK: $xmm16 = VMOV64toSDZrr $rdi
4540 $xmm16 = VMOV64toSDZrr $rdi
4541 ; CHECK: $xmm16 = VMOVDI2SSZrm $rip, $noreg, $noreg, $noreg, $noreg
4542 $xmm16 = VMOVDI2SSZrm $rip, $noreg, $noreg, $noreg, $noreg
4543 ; CHECK: $xmm16 = VMOVDI2SSZrr $eax
4544 $xmm16 = VMOVDI2SSZrr $eax
4545 ; CHECK: VMOVSDZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4546 VMOVSDZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4547 ; CHECK: $xmm16 = VMOVSDZrm $rip, $noreg, $noreg, $noreg, $noreg
4548 $xmm16 = VMOVSDZrm $rip, $noreg, $noreg, $noreg, $noreg
4549 ; CHECK: $xmm16 = VMOVSDZrr $xmm16, $noreg
4550 $xmm16 = VMOVSDZrr $xmm16, $noreg
4551 ; CHECK: $xmm16 = VMOVSDZrr_REV $xmm16, $noreg
4552 $xmm16 = VMOVSDZrr_REV $xmm16, $noreg
4553 ; CHECK: $rax = VMOVSDto64Zrr $xmm16
4554 $rax = VMOVSDto64Zrr $xmm16
4555 ; CHECK: VMOVSDto64Zmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4556 VMOVSDto64Zmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4557 ; CHECK: VMOVSSZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4558 VMOVSSZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4559 ; CHECK: $xmm16 = VMOVSSZrm $rip, $noreg, $noreg, $noreg, $noreg
4560 $xmm16 = VMOVSSZrm $rip, $noreg, $noreg, $noreg, $noreg
4561 ; CHECK: $xmm16 = VMOVSSZrr $xmm16, $noreg
4562 $xmm16 = VMOVSSZrr $xmm16, $noreg
4563 ; CHECK: $xmm16 = VMOVSSZrr_REV $xmm16, $noreg
4564 $xmm16 = VMOVSSZrr_REV $xmm16, $noreg
4565 ; CHECK: VMOVSS2DIZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4566 VMOVSS2DIZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4567 ; CHECK: $eax = VMOVSS2DIZrr $xmm16
4568 $eax = VMOVSS2DIZrr $xmm16
4569 ; CHECK: $xmm16 = VMOV64toPQIZrr $rdi
4570 $xmm16 = VMOV64toPQIZrr $rdi
4571 ; CHECK: $xmm16 = VMOV64toPQIZrm $rdi, $noreg, $noreg, $noreg, $noreg
4572 $xmm16 = VMOV64toPQIZrm $rdi, $noreg, $noreg, $noreg, $noreg
4573 ; CHECK: $xmm16 = VMOV64toSDZrr $rdi
4574 $xmm16 = VMOV64toSDZrr $rdi
4575 ; CHECK: $xmm16 = VMOVDI2PDIZrm $rip, $noreg, $noreg, $noreg, $noreg
4576 $xmm16 = VMOVDI2PDIZrm $rip, $noreg, $noreg, $noreg, $noreg
4577 ; CHECK: $xmm16 = VMOVDI2PDIZrr $edi
4578 $xmm16 = VMOVDI2PDIZrr $edi
4579 ; CHECK: $xmm16 = VMOVLHPSZrr $xmm16, $noreg
4580 $xmm16 = VMOVLHPSZrr $xmm16, $noreg
4581 ; CHECK: $xmm16 = VMOVHLPSZrr $xmm16, $noreg
4582 $xmm16 = VMOVHLPSZrr $xmm16, $noreg
4583 ; CHECK: VMOVPDI2DIZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4584 VMOVPDI2DIZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4585 ; CHECK: $edi = VMOVPDI2DIZrr $xmm16
4586 $edi = VMOVPDI2DIZrr $xmm16
4587 ; CHECK: $xmm16 = VMOVPQI2QIZrr $xmm16
4588 $xmm16 = VMOVPQI2QIZrr $xmm16
4589 ; CHECK: VMOVPQI2QIZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4590 VMOVPQI2QIZmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4591 ; CHECK: $rdi = VMOVPQIto64Zrr $xmm16
4592 $rdi = VMOVPQIto64Zrr $xmm16
4593 ; CHECK: VMOVPQIto64Zmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4594 VMOVPQIto64Zmr $rdi, $xmm16, $noreg, $noreg, $noreg, $noreg
4595 ; CHECK: $xmm16 = VMOVQI2PQIZrm $rip, $noreg, $noreg, $noreg, $noreg
4596 $xmm16 = VMOVQI2PQIZrm $rip, $noreg, $noreg, $noreg, $noreg
4597 ; CHECK: $xmm16 = VMOVZPQILo2PQIZrr $xmm16
4598 $xmm16 = VMOVZPQILo2PQIZrr $xmm16
4599 ; CHECK: VCOMISDZrm_Int $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4600 VCOMISDZrm_Int $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4601 ; CHECK: VCOMISDZrr_Int $xmm16, $xmm1, implicit-def $eflags
4602 VCOMISDZrr_Int $xmm16, $xmm1, implicit-def $eflags
4603 ; CHECK: VCOMISSZrm_Int $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4604 VCOMISSZrm_Int $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4605 ; CHECK: VCOMISSZrr_Int $xmm16, $xmm1, implicit-def $eflags
4606 VCOMISSZrr_Int $xmm16, $xmm1, implicit-def $eflags
4607 ; CHECK: VUCOMISDZrm_Int $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4608 VUCOMISDZrm_Int $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4609 ; CHECK: VUCOMISDZrr_Int $xmm16, $xmm1, implicit-def $eflags
4610 VUCOMISDZrr_Int $xmm16, $xmm1, implicit-def $eflags
4611 ; CHECK: VUCOMISSZrm_Int $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4612 VUCOMISSZrm_Int $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4613 ; CHECK: VUCOMISSZrr_Int $xmm16, $xmm1, implicit-def $eflags
4614 VUCOMISSZrr_Int $xmm16, $xmm1, implicit-def $eflags
4615 ; CHECK: VCOMISDZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4616 VCOMISDZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4617 ; CHECK: VCOMISDZrr $xmm16, $xmm1, implicit-def $eflags
4618 VCOMISDZrr $xmm16, $xmm1, implicit-def $eflags
4619 ; CHECK: VCOMISSZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4620 VCOMISSZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4621 ; CHECK: VCOMISSZrr $xmm16, $xmm1, implicit-def $eflags
4622 VCOMISSZrr $xmm16, $xmm1, implicit-def $eflags
4623 ; CHECK: VUCOMISDZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4624 VUCOMISDZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4625 ; CHECK: VUCOMISDZrr $xmm16, $xmm1, implicit-def $eflags
4626 VUCOMISDZrr $xmm16, $xmm1, implicit-def $eflags
4627 ; CHECK: VUCOMISSZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4628 VUCOMISSZrm $xmm16, $rdi, $noreg, $noreg, $noreg, $noreg, implicit-def $eflags
4629 ; CHECK: VUCOMISSZrr $xmm16, $xmm1, implicit-def $eflags
4630 VUCOMISSZrr $xmm16, $xmm1, implicit-def $eflags
4632 RET 0, $zmm0, $zmm1
4633 ...