| blob | 65bf1cb65848a6787e354fb469d58e108980e7a2 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening | FileCheck %s --check-prefix=X64-NOPIC
3 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -code-model medium | FileCheck %s --check-prefix=X64-NOPIC-MCM
4 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -relocation-model pic | FileCheck %s --check-prefix=X64-PIC
5 ;
6 ; FIXME: Add support for 32-bit.
8 declare void @f()
10 define i32 @test_calls_and_rets(i32 *%ptr) nounwind {
11 ; X64-NOPIC-LABEL: test_calls_and_rets:
12 ; X64-NOPIC: # %bb.0: # %entry
13 ; X64-NOPIC-NEXT: pushq %rbp
14 ; X64-NOPIC-NEXT: pushq %r14
15 ; X64-NOPIC-NEXT: pushq %rbx
16 ; X64-NOPIC-NEXT: movq %rsp, %rax
17 ; X64-NOPIC-NEXT: movq %rdi, %rbx
18 ; X64-NOPIC-NEXT: movq $-1, %r14
19 ; X64-NOPIC-NEXT: sarq $63, %rax
20 ; X64-NOPIC-NEXT: shlq $47, %rax
21 ; X64-NOPIC-NEXT: orq %rax, %rsp
22 ; X64-NOPIC-NEXT: callq f
23 ; X64-NOPIC-NEXT: .Lslh_ret_addr0:
24 ; X64-NOPIC-NEXT: movq %rsp, %rax
25 ; X64-NOPIC-NEXT: movq -{{[0-9]+}}(%rsp), %rcx
26 ; X64-NOPIC-NEXT: sarq $63, %rax
27 ; X64-NOPIC-NEXT: cmpq $.Lslh_ret_addr0, %rcx
28 ; X64-NOPIC-NEXT: cmovneq %r14, %rax
29 ; X64-NOPIC-NEXT: movl (%rbx), %ebp
30 ; X64-NOPIC-NEXT: shlq $47, %rax
31 ; X64-NOPIC-NEXT: orq %rax, %rsp
32 ; X64-NOPIC-NEXT: callq f
33 ; X64-NOPIC-NEXT: .Lslh_ret_addr1:
34 ; X64-NOPIC-NEXT: movq %rsp, %rcx
35 ; X64-NOPIC-NEXT: movq -{{[0-9]+}}(%rsp), %rax
36 ; X64-NOPIC-NEXT: sarq $63, %rcx
37 ; X64-NOPIC-NEXT: cmpq $.Lslh_ret_addr1, %rax
38 ; X64-NOPIC-NEXT: cmovneq %r14, %rcx
39 ; X64-NOPIC-NEXT: addl (%rbx), %ebp
40 ; X64-NOPIC-NEXT: orl %ecx, %ebp
41 ; X64-NOPIC-NEXT: shlq $47, %rcx
42 ; X64-NOPIC-NEXT: movl %ebp, %eax
43 ; X64-NOPIC-NEXT: orq %rcx, %rsp
44 ; X64-NOPIC-NEXT: popq %rbx
45 ; X64-NOPIC-NEXT: popq %r14
46 ; X64-NOPIC-NEXT: popq %rbp
47 ; X64-NOPIC-NEXT: retq
48 ;
49 ; X64-NOPIC-MCM-LABEL: test_calls_and_rets:
50 ; X64-NOPIC-MCM: # %bb.0: # %entry
51 ; X64-NOPIC-MCM-NEXT: pushq %rbp
52 ; X64-NOPIC-MCM-NEXT: pushq %r14
53 ; X64-NOPIC-MCM-NEXT: pushq %rbx
54 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rax
55 ; X64-NOPIC-MCM-NEXT: movq %rdi, %rbx
56 ; X64-NOPIC-MCM-NEXT: movq $-1, %r14
57 ; X64-NOPIC-MCM-NEXT: sarq $63, %rax
58 ; X64-NOPIC-MCM-NEXT: shlq $47, %rax
59 ; X64-NOPIC-MCM-NEXT: orq %rax, %rsp
60 ; X64-NOPIC-MCM-NEXT: callq f
61 ; X64-NOPIC-MCM-NEXT: .Lslh_ret_addr0:
62 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rax
63 ; X64-NOPIC-MCM-NEXT: movq -{{[0-9]+}}(%rsp), %rcx
64 ; X64-NOPIC-MCM-NEXT: sarq $63, %rax
65 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr0(%rip), %rdx
66 ; X64-NOPIC-MCM-NEXT: cmpq %rdx, %rcx
67 ; X64-NOPIC-MCM-NEXT: cmovneq %r14, %rax
68 ; X64-NOPIC-MCM-NEXT: movl (%rbx), %ebp
69 ; X64-NOPIC-MCM-NEXT: shlq $47, %rax
70 ; X64-NOPIC-MCM-NEXT: orq %rax, %rsp
71 ; X64-NOPIC-MCM-NEXT: callq f
72 ; X64-NOPIC-MCM-NEXT: .Lslh_ret_addr1:
73 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rcx
74 ; X64-NOPIC-MCM-NEXT: movq -{{[0-9]+}}(%rsp), %rax
75 ; X64-NOPIC-MCM-NEXT: sarq $63, %rcx
76 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr1(%rip), %rdx
77 ; X64-NOPIC-MCM-NEXT: cmpq %rdx, %rax
78 ; X64-NOPIC-MCM-NEXT: cmovneq %r14, %rcx
79 ; X64-NOPIC-MCM-NEXT: addl (%rbx), %ebp
80 ; X64-NOPIC-MCM-NEXT: orl %ecx, %ebp
81 ; X64-NOPIC-MCM-NEXT: shlq $47, %rcx
82 ; X64-NOPIC-MCM-NEXT: movl %ebp, %eax
83 ; X64-NOPIC-MCM-NEXT: orq %rcx, %rsp
84 ; X64-NOPIC-MCM-NEXT: popq %rbx
85 ; X64-NOPIC-MCM-NEXT: popq %r14
86 ; X64-NOPIC-MCM-NEXT: popq %rbp
87 ; X64-NOPIC-MCM-NEXT: retq
88 ;
89 ; X64-PIC-LABEL: test_calls_and_rets:
90 ; X64-PIC: # %bb.0: # %entry
91 ; X64-PIC-NEXT: pushq %rbp
92 ; X64-PIC-NEXT: pushq %r14
93 ; X64-PIC-NEXT: pushq %rbx
94 ; X64-PIC-NEXT: movq %rsp, %rax
95 ; X64-PIC-NEXT: movq %rdi, %rbx
96 ; X64-PIC-NEXT: movq $-1, %r14
97 ; X64-PIC-NEXT: sarq $63, %rax
98 ; X64-PIC-NEXT: shlq $47, %rax
99 ; X64-PIC-NEXT: orq %rax, %rsp
100 ; X64-PIC-NEXT: callq f@PLT
101 ; X64-PIC-NEXT: .Lslh_ret_addr0:
102 ; X64-PIC-NEXT: movq %rsp, %rax
103 ; X64-PIC-NEXT: movq -{{[0-9]+}}(%rsp), %rcx
104 ; X64-PIC-NEXT: sarq $63, %rax
105 ; X64-PIC-NEXT: leaq .Lslh_ret_addr0(%rip), %rdx
106 ; X64-PIC-NEXT: cmpq %rdx, %rcx
107 ; X64-PIC-NEXT: cmovneq %r14, %rax
108 ; X64-PIC-NEXT: movl (%rbx), %ebp
109 ; X64-PIC-NEXT: shlq $47, %rax
110 ; X64-PIC-NEXT: orq %rax, %rsp
111 ; X64-PIC-NEXT: callq f@PLT
112 ; X64-PIC-NEXT: .Lslh_ret_addr1:
113 ; X64-PIC-NEXT: movq %rsp, %rcx
114 ; X64-PIC-NEXT: movq -{{[0-9]+}}(%rsp), %rax
115 ; X64-PIC-NEXT: sarq $63, %rcx
116 ; X64-PIC-NEXT: leaq .Lslh_ret_addr1(%rip), %rdx
117 ; X64-PIC-NEXT: cmpq %rdx, %rax
118 ; X64-PIC-NEXT: cmovneq %r14, %rcx
119 ; X64-PIC-NEXT: addl (%rbx), %ebp
120 ; X64-PIC-NEXT: orl %ecx, %ebp
121 ; X64-PIC-NEXT: shlq $47, %rcx
122 ; X64-PIC-NEXT: movl %ebp, %eax
123 ; X64-PIC-NEXT: orq %rcx, %rsp
124 ; X64-PIC-NEXT: popq %rbx
125 ; X64-PIC-NEXT: popq %r14
126 ; X64-PIC-NEXT: popq %rbp
127 ; X64-PIC-NEXT: retq
128 entry:
129 call void @f()
130 %x = load i32, i32* %ptr
131 call void @f()
132 %y = load i32, i32* %ptr
133 %z = add i32 %x, %y
134 ret i32 %z
135 }
137 define i32 @test_calls_and_rets_noredzone(i32 *%ptr) nounwind noredzone {
138 ; X64-NOPIC-LABEL: test_calls_and_rets_noredzone:
139 ; X64-NOPIC: # %bb.0: # %entry
140 ; X64-NOPIC-NEXT: pushq %rbp
141 ; X64-NOPIC-NEXT: pushq %r15
142 ; X64-NOPIC-NEXT: pushq %r14
143 ; X64-NOPIC-NEXT: pushq %rbx
144 ; X64-NOPIC-NEXT: pushq %rax
145 ; X64-NOPIC-NEXT: movq %rsp, %rax
146 ; X64-NOPIC-NEXT: movq %rdi, %rbx
147 ; X64-NOPIC-NEXT: movq $-1, %r14
148 ; X64-NOPIC-NEXT: sarq $63, %rax
149 ; X64-NOPIC-NEXT: shlq $47, %rax
150 ; X64-NOPIC-NEXT: orq %rax, %rsp
151 ; X64-NOPIC-NEXT: movq $.Lslh_ret_addr2, %rbp
152 ; X64-NOPIC-NEXT: callq f
153 ; X64-NOPIC-NEXT: .Lslh_ret_addr2:
154 ; X64-NOPIC-NEXT: movq %rsp, %rax
155 ; X64-NOPIC-NEXT: sarq $63, %rax
156 ; X64-NOPIC-NEXT: cmpq $.Lslh_ret_addr2, %rbp
157 ; X64-NOPIC-NEXT: cmovneq %r14, %rax
158 ; X64-NOPIC-NEXT: movl (%rbx), %ebp
159 ; X64-NOPIC-NEXT: shlq $47, %rax
160 ; X64-NOPIC-NEXT: orq %rax, %rsp
161 ; X64-NOPIC-NEXT: movq $.Lslh_ret_addr3, %r15
162 ; X64-NOPIC-NEXT: callq f
163 ; X64-NOPIC-NEXT: .Lslh_ret_addr3:
164 ; X64-NOPIC-NEXT: movq %rsp, %rcx
165 ; X64-NOPIC-NEXT: sarq $63, %rcx
166 ; X64-NOPIC-NEXT: cmpq $.Lslh_ret_addr3, %r15
167 ; X64-NOPIC-NEXT: cmovneq %r14, %rcx
168 ; X64-NOPIC-NEXT: addl (%rbx), %ebp
169 ; X64-NOPIC-NEXT: orl %ecx, %ebp
170 ; X64-NOPIC-NEXT: shlq $47, %rcx
171 ; X64-NOPIC-NEXT: movl %ebp, %eax
172 ; X64-NOPIC-NEXT: orq %rcx, %rsp
173 ; X64-NOPIC-NEXT: addq $8, %rsp
174 ; X64-NOPIC-NEXT: popq %rbx
175 ; X64-NOPIC-NEXT: popq %r14
176 ; X64-NOPIC-NEXT: popq %r15
177 ; X64-NOPIC-NEXT: popq %rbp
178 ; X64-NOPIC-NEXT: retq
179 ;
180 ; X64-NOPIC-MCM-LABEL: test_calls_and_rets_noredzone:
181 ; X64-NOPIC-MCM: # %bb.0: # %entry
182 ; X64-NOPIC-MCM-NEXT: pushq %rbp
183 ; X64-NOPIC-MCM-NEXT: pushq %r15
184 ; X64-NOPIC-MCM-NEXT: pushq %r14
185 ; X64-NOPIC-MCM-NEXT: pushq %rbx
186 ; X64-NOPIC-MCM-NEXT: pushq %rax
187 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rax
188 ; X64-NOPIC-MCM-NEXT: movq %rdi, %rbx
189 ; X64-NOPIC-MCM-NEXT: movq $-1, %r14
190 ; X64-NOPIC-MCM-NEXT: sarq $63, %rax
191 ; X64-NOPIC-MCM-NEXT: shlq $47, %rax
192 ; X64-NOPIC-MCM-NEXT: orq %rax, %rsp
193 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr2(%rip), %rbp
194 ; X64-NOPIC-MCM-NEXT: callq f
195 ; X64-NOPIC-MCM-NEXT: .Lslh_ret_addr2:
196 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rax
197 ; X64-NOPIC-MCM-NEXT: sarq $63, %rax
198 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr2(%rip), %rcx
199 ; X64-NOPIC-MCM-NEXT: cmpq %rcx, %rbp
200 ; X64-NOPIC-MCM-NEXT: cmovneq %r14, %rax
201 ; X64-NOPIC-MCM-NEXT: movl (%rbx), %ebp
202 ; X64-NOPIC-MCM-NEXT: shlq $47, %rax
203 ; X64-NOPIC-MCM-NEXT: orq %rax, %rsp
204 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr3(%rip), %r15
205 ; X64-NOPIC-MCM-NEXT: callq f
206 ; X64-NOPIC-MCM-NEXT: .Lslh_ret_addr3:
207 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rcx
208 ; X64-NOPIC-MCM-NEXT: sarq $63, %rcx
209 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr3(%rip), %rax
210 ; X64-NOPIC-MCM-NEXT: cmpq %rax, %r15
211 ; X64-NOPIC-MCM-NEXT: cmovneq %r14, %rcx
212 ; X64-NOPIC-MCM-NEXT: addl (%rbx), %ebp
213 ; X64-NOPIC-MCM-NEXT: orl %ecx, %ebp
214 ; X64-NOPIC-MCM-NEXT: shlq $47, %rcx
215 ; X64-NOPIC-MCM-NEXT: movl %ebp, %eax
216 ; X64-NOPIC-MCM-NEXT: orq %rcx, %rsp
217 ; X64-NOPIC-MCM-NEXT: addq $8, %rsp
218 ; X64-NOPIC-MCM-NEXT: popq %rbx
219 ; X64-NOPIC-MCM-NEXT: popq %r14
220 ; X64-NOPIC-MCM-NEXT: popq %r15
221 ; X64-NOPIC-MCM-NEXT: popq %rbp
222 ; X64-NOPIC-MCM-NEXT: retq
223 ;
224 ; X64-PIC-LABEL: test_calls_and_rets_noredzone:
225 ; X64-PIC: # %bb.0: # %entry
226 ; X64-PIC-NEXT: pushq %rbp
227 ; X64-PIC-NEXT: pushq %r15
228 ; X64-PIC-NEXT: pushq %r14
229 ; X64-PIC-NEXT: pushq %rbx
230 ; X64-PIC-NEXT: pushq %rax
231 ; X64-PIC-NEXT: movq %rsp, %rax
232 ; X64-PIC-NEXT: movq %rdi, %rbx
233 ; X64-PIC-NEXT: movq $-1, %r14
234 ; X64-PIC-NEXT: sarq $63, %rax
235 ; X64-PIC-NEXT: shlq $47, %rax
236 ; X64-PIC-NEXT: orq %rax, %rsp
237 ; X64-PIC-NEXT: leaq .Lslh_ret_addr2(%rip), %rbp
238 ; X64-PIC-NEXT: callq f@PLT
239 ; X64-PIC-NEXT: .Lslh_ret_addr2:
240 ; X64-PIC-NEXT: movq %rsp, %rax
241 ; X64-PIC-NEXT: sarq $63, %rax
242 ; X64-PIC-NEXT: leaq .Lslh_ret_addr2(%rip), %rcx
243 ; X64-PIC-NEXT: cmpq %rcx, %rbp
244 ; X64-PIC-NEXT: cmovneq %r14, %rax
245 ; X64-PIC-NEXT: movl (%rbx), %ebp
246 ; X64-PIC-NEXT: shlq $47, %rax
247 ; X64-PIC-NEXT: orq %rax, %rsp
248 ; X64-PIC-NEXT: leaq .Lslh_ret_addr3(%rip), %r15
249 ; X64-PIC-NEXT: callq f@PLT
250 ; X64-PIC-NEXT: .Lslh_ret_addr3:
251 ; X64-PIC-NEXT: movq %rsp, %rcx
252 ; X64-PIC-NEXT: sarq $63, %rcx
253 ; X64-PIC-NEXT: leaq .Lslh_ret_addr3(%rip), %rax
254 ; X64-PIC-NEXT: cmpq %rax, %r15
255 ; X64-PIC-NEXT: cmovneq %r14, %rcx
256 ; X64-PIC-NEXT: addl (%rbx), %ebp
257 ; X64-PIC-NEXT: orl %ecx, %ebp
258 ; X64-PIC-NEXT: shlq $47, %rcx
259 ; X64-PIC-NEXT: movl %ebp, %eax
260 ; X64-PIC-NEXT: orq %rcx, %rsp
261 ; X64-PIC-NEXT: addq $8, %rsp
262 ; X64-PIC-NEXT: popq %rbx
263 ; X64-PIC-NEXT: popq %r14
264 ; X64-PIC-NEXT: popq %r15
265 ; X64-PIC-NEXT: popq %rbp
266 ; X64-PIC-NEXT: retq
267 entry:
268 call void @f()
269 %x = load i32, i32* %ptr
270 call void @f()
271 %y = load i32, i32* %ptr
272 %z = add i32 %x, %y
273 ret i32 %z
274 }
276 declare i32 @setjmp(i8* %env) returns_twice
277 declare i32 @sigsetjmp(i8* %env, i32 %savemask) returns_twice
278 declare i32 @__sigsetjmp(i8* %foo, i8* %bar, i32 %baz) returns_twice
280 define i32 @test_call_setjmp(i32 *%ptr) nounwind {
281 ; X64-NOPIC-LABEL: test_call_setjmp:
282 ; X64-NOPIC: # %bb.0: # %entry
283 ; X64-NOPIC-NEXT: pushq %rbp
284 ; X64-NOPIC-NEXT: pushq %r15
285 ; X64-NOPIC-NEXT: pushq %r14
286 ; X64-NOPIC-NEXT: pushq %r12
287 ; X64-NOPIC-NEXT: pushq %rbx
288 ; X64-NOPIC-NEXT: subq $16, %rsp
289 ; X64-NOPIC-NEXT: movq %rsp, %rax
290 ; X64-NOPIC-NEXT: movq %rdi, %rbx
291 ; X64-NOPIC-NEXT: movq $-1, %r15
292 ; X64-NOPIC-NEXT: sarq $63, %rax
293 ; X64-NOPIC-NEXT: movq %rsp, %r14
294 ; X64-NOPIC-NEXT: shlq $47, %rax
295 ; X64-NOPIC-NEXT: movq %r14, %rdi
296 ; X64-NOPIC-NEXT: orq %rax, %rsp
297 ; X64-NOPIC-NEXT: movq $.Lslh_ret_addr4, %rbp
298 ; X64-NOPIC-NEXT: callq setjmp
299 ; X64-NOPIC-NEXT: .Lslh_ret_addr4:
300 ; X64-NOPIC-NEXT: movq %rsp, %rax
301 ; X64-NOPIC-NEXT: sarq $63, %rax
302 ; X64-NOPIC-NEXT: cmpq $.Lslh_ret_addr4, %rbp
303 ; X64-NOPIC-NEXT: cmovneq %r15, %rax
304 ; X64-NOPIC-NEXT: movl (%rbx), %ebp
305 ; X64-NOPIC-NEXT: shlq $47, %rax
306 ; X64-NOPIC-NEXT: movq %r14, %rdi
307 ; X64-NOPIC-NEXT: movl $42, %esi
308 ; X64-NOPIC-NEXT: orq %rax, %rsp
309 ; X64-NOPIC-NEXT: movq $.Lslh_ret_addr5, %r12
310 ; X64-NOPIC-NEXT: callq sigsetjmp
311 ; X64-NOPIC-NEXT: .Lslh_ret_addr5:
312 ; X64-NOPIC-NEXT: movq %rsp, %rax
313 ; X64-NOPIC-NEXT: sarq $63, %rax
314 ; X64-NOPIC-NEXT: cmpq $.Lslh_ret_addr5, %r12
315 ; X64-NOPIC-NEXT: cmovneq %r15, %rax
316 ; X64-NOPIC-NEXT: addl (%rbx), %ebp
317 ; X64-NOPIC-NEXT: shlq $47, %rax
318 ; X64-NOPIC-NEXT: movq %r14, %rdi
319 ; X64-NOPIC-NEXT: movq %r14, %rsi
320 ; X64-NOPIC-NEXT: movl $42, %edx
321 ; X64-NOPIC-NEXT: orq %rax, %rsp
322 ; X64-NOPIC-NEXT: movq $.Lslh_ret_addr6, %r14
323 ; X64-NOPIC-NEXT: callq __sigsetjmp
324 ; X64-NOPIC-NEXT: .Lslh_ret_addr6:
325 ; X64-NOPIC-NEXT: movq %rsp, %rcx
326 ; X64-NOPIC-NEXT: sarq $63, %rcx
327 ; X64-NOPIC-NEXT: cmpq $.Lslh_ret_addr6, %r14
328 ; X64-NOPIC-NEXT: cmovneq %r15, %rcx
329 ; X64-NOPIC-NEXT: addl (%rbx), %ebp
330 ; X64-NOPIC-NEXT: orl %ecx, %ebp
331 ; X64-NOPIC-NEXT: shlq $47, %rcx
332 ; X64-NOPIC-NEXT: movl %ebp, %eax
333 ; X64-NOPIC-NEXT: orq %rcx, %rsp
334 ; X64-NOPIC-NEXT: addq $16, %rsp
335 ; X64-NOPIC-NEXT: popq %rbx
336 ; X64-NOPIC-NEXT: popq %r12
337 ; X64-NOPIC-NEXT: popq %r14
338 ; X64-NOPIC-NEXT: popq %r15
339 ; X64-NOPIC-NEXT: popq %rbp
340 ; X64-NOPIC-NEXT: retq
341 ;
342 ; X64-NOPIC-MCM-LABEL: test_call_setjmp:
343 ; X64-NOPIC-MCM: # %bb.0: # %entry
344 ; X64-NOPIC-MCM-NEXT: pushq %rbp
345 ; X64-NOPIC-MCM-NEXT: pushq %r15
346 ; X64-NOPIC-MCM-NEXT: pushq %r14
347 ; X64-NOPIC-MCM-NEXT: pushq %r12
348 ; X64-NOPIC-MCM-NEXT: pushq %rbx
349 ; X64-NOPIC-MCM-NEXT: subq $16, %rsp
350 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rax
351 ; X64-NOPIC-MCM-NEXT: movq %rdi, %rbx
352 ; X64-NOPIC-MCM-NEXT: movq $-1, %r15
353 ; X64-NOPIC-MCM-NEXT: sarq $63, %rax
354 ; X64-NOPIC-MCM-NEXT: movq %rsp, %r14
355 ; X64-NOPIC-MCM-NEXT: shlq $47, %rax
356 ; X64-NOPIC-MCM-NEXT: movq %r14, %rdi
357 ; X64-NOPIC-MCM-NEXT: orq %rax, %rsp
358 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr4(%rip), %rbp
359 ; X64-NOPIC-MCM-NEXT: callq setjmp
360 ; X64-NOPIC-MCM-NEXT: .Lslh_ret_addr4:
361 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rax
362 ; X64-NOPIC-MCM-NEXT: sarq $63, %rax
363 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr4(%rip), %rcx
364 ; X64-NOPIC-MCM-NEXT: cmpq %rcx, %rbp
365 ; X64-NOPIC-MCM-NEXT: cmovneq %r15, %rax
366 ; X64-NOPIC-MCM-NEXT: movl (%rbx), %ebp
367 ; X64-NOPIC-MCM-NEXT: shlq $47, %rax
368 ; X64-NOPIC-MCM-NEXT: movq %r14, %rdi
369 ; X64-NOPIC-MCM-NEXT: movl $42, %esi
370 ; X64-NOPIC-MCM-NEXT: orq %rax, %rsp
371 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr5(%rip), %r12
372 ; X64-NOPIC-MCM-NEXT: callq sigsetjmp
373 ; X64-NOPIC-MCM-NEXT: .Lslh_ret_addr5:
374 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rax
375 ; X64-NOPIC-MCM-NEXT: sarq $63, %rax
376 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr5(%rip), %rcx
377 ; X64-NOPIC-MCM-NEXT: cmpq %rcx, %r12
378 ; X64-NOPIC-MCM-NEXT: cmovneq %r15, %rax
379 ; X64-NOPIC-MCM-NEXT: addl (%rbx), %ebp
380 ; X64-NOPIC-MCM-NEXT: shlq $47, %rax
381 ; X64-NOPIC-MCM-NEXT: movq %r14, %rdi
382 ; X64-NOPIC-MCM-NEXT: movq %r14, %rsi
383 ; X64-NOPIC-MCM-NEXT: movl $42, %edx
384 ; X64-NOPIC-MCM-NEXT: orq %rax, %rsp
385 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr6(%rip), %r14
386 ; X64-NOPIC-MCM-NEXT: callq __sigsetjmp
387 ; X64-NOPIC-MCM-NEXT: .Lslh_ret_addr6:
388 ; X64-NOPIC-MCM-NEXT: movq %rsp, %rcx
389 ; X64-NOPIC-MCM-NEXT: sarq $63, %rcx
390 ; X64-NOPIC-MCM-NEXT: leaq .Lslh_ret_addr6(%rip), %rax
391 ; X64-NOPIC-MCM-NEXT: cmpq %rax, %r14
392 ; X64-NOPIC-MCM-NEXT: cmovneq %r15, %rcx
393 ; X64-NOPIC-MCM-NEXT: addl (%rbx), %ebp
394 ; X64-NOPIC-MCM-NEXT: orl %ecx, %ebp
395 ; X64-NOPIC-MCM-NEXT: shlq $47, %rcx
396 ; X64-NOPIC-MCM-NEXT: movl %ebp, %eax
397 ; X64-NOPIC-MCM-NEXT: orq %rcx, %rsp
398 ; X64-NOPIC-MCM-NEXT: addq $16, %rsp
399 ; X64-NOPIC-MCM-NEXT: popq %rbx
400 ; X64-NOPIC-MCM-NEXT: popq %r12
401 ; X64-NOPIC-MCM-NEXT: popq %r14
402 ; X64-NOPIC-MCM-NEXT: popq %r15
403 ; X64-NOPIC-MCM-NEXT: popq %rbp
404 ; X64-NOPIC-MCM-NEXT: retq
405 ;
406 ; X64-PIC-LABEL: test_call_setjmp:
407 ; X64-PIC: # %bb.0: # %entry
408 ; X64-PIC-NEXT: pushq %rbp
409 ; X64-PIC-NEXT: pushq %r15
410 ; X64-PIC-NEXT: pushq %r14
411 ; X64-PIC-NEXT: pushq %r12
412 ; X64-PIC-NEXT: pushq %rbx
413 ; X64-PIC-NEXT: subq $16, %rsp
414 ; X64-PIC-NEXT: movq %rsp, %rax
415 ; X64-PIC-NEXT: movq %rdi, %rbx
416 ; X64-PIC-NEXT: movq $-1, %r15
417 ; X64-PIC-NEXT: sarq $63, %rax
418 ; X64-PIC-NEXT: movq %rsp, %r14
419 ; X64-PIC-NEXT: shlq $47, %rax
420 ; X64-PIC-NEXT: movq %r14, %rdi
421 ; X64-PIC-NEXT: orq %rax, %rsp
422 ; X64-PIC-NEXT: leaq .Lslh_ret_addr4(%rip), %rbp
423 ; X64-PIC-NEXT: callq setjmp@PLT
424 ; X64-PIC-NEXT: .Lslh_ret_addr4:
425 ; X64-PIC-NEXT: movq %rsp, %rax
426 ; X64-PIC-NEXT: sarq $63, %rax
427 ; X64-PIC-NEXT: leaq .Lslh_ret_addr4(%rip), %rcx
428 ; X64-PIC-NEXT: cmpq %rcx, %rbp
429 ; X64-PIC-NEXT: cmovneq %r15, %rax
430 ; X64-PIC-NEXT: movl (%rbx), %ebp
431 ; X64-PIC-NEXT: shlq $47, %rax
432 ; X64-PIC-NEXT: movq %r14, %rdi
433 ; X64-PIC-NEXT: movl $42, %esi
434 ; X64-PIC-NEXT: orq %rax, %rsp
435 ; X64-PIC-NEXT: leaq .Lslh_ret_addr5(%rip), %r12
436 ; X64-PIC-NEXT: callq sigsetjmp@PLT
437 ; X64-PIC-NEXT: .Lslh_ret_addr5:
438 ; X64-PIC-NEXT: movq %rsp, %rax
439 ; X64-PIC-NEXT: sarq $63, %rax
440 ; X64-PIC-NEXT: leaq .Lslh_ret_addr5(%rip), %rcx
441 ; X64-PIC-NEXT: cmpq %rcx, %r12
442 ; X64-PIC-NEXT: cmovneq %r15, %rax
443 ; X64-PIC-NEXT: addl (%rbx), %ebp
444 ; X64-PIC-NEXT: shlq $47, %rax
445 ; X64-PIC-NEXT: movq %r14, %rdi
446 ; X64-PIC-NEXT: movq %r14, %rsi
447 ; X64-PIC-NEXT: movl $42, %edx
448 ; X64-PIC-NEXT: orq %rax, %rsp
449 ; X64-PIC-NEXT: leaq .Lslh_ret_addr6(%rip), %r14
450 ; X64-PIC-NEXT: callq __sigsetjmp@PLT
451 ; X64-PIC-NEXT: .Lslh_ret_addr6:
452 ; X64-PIC-NEXT: movq %rsp, %rcx
453 ; X64-PIC-NEXT: sarq $63, %rcx
454 ; X64-PIC-NEXT: leaq .Lslh_ret_addr6(%rip), %rax
455 ; X64-PIC-NEXT: cmpq %rax, %r14
456 ; X64-PIC-NEXT: cmovneq %r15, %rcx
457 ; X64-PIC-NEXT: addl (%rbx), %ebp
458 ; X64-PIC-NEXT: orl %ecx, %ebp
459 ; X64-PIC-NEXT: shlq $47, %rcx
460 ; X64-PIC-NEXT: movl %ebp, %eax
461 ; X64-PIC-NEXT: orq %rcx, %rsp
462 ; X64-PIC-NEXT: addq $16, %rsp
463 ; X64-PIC-NEXT: popq %rbx
464 ; X64-PIC-NEXT: popq %r12
465 ; X64-PIC-NEXT: popq %r14
466 ; X64-PIC-NEXT: popq %r15
467 ; X64-PIC-NEXT: popq %rbp
468 ; X64-PIC-NEXT: retq
469 entry:
470 %env = alloca i8, i32 16
471 ; Call a normal setjmp function.
472 call i32 @setjmp(i8* %env)
473 %x = load i32, i32* %ptr
474 ; Call something like sigsetjmp.
475 call i32 @sigsetjmp(i8* %env, i32 42)
476 %y = load i32, i32* %ptr
477 ; Call something that might be an implementation detail expanded out of a
478 ; macro that has a weird signature but still gets annotated as returning
479 ; twice.
480 call i32 @__sigsetjmp(i8* %env, i8* %env, i32 42)
481 %z = load i32, i32* %ptr
482 %s1 = add i32 %x, %y
483 %s2 = add i32 %s1, %z
484 ret i32 %s2
485 }