1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -relocation-model=static -mtriple=i686-unknown -mattr=+mmx,+sse3 | FileCheck %s --check-prefix=X32
3 ; RUN: llc < %s -relocation-model=static -mtriple=x86_64-unknown -mattr=+mmx,+sse3 | FileCheck %s --check-prefix=X64
5 ; 64-bit stores here do not use MMX.
7 @M1 = external global <1 x i64>
8 @M2 = external global <2 x i32>
10 @S1 = external global <2 x i64>
11 @S2 = external global <4 x i32>
13 define void @test1() {
16 ; X32-NEXT: movl $0, M1+4
17 ; X32-NEXT: movl $0, M1
18 ; X32-NEXT: xorps %xmm0, %xmm0
19 ; X32-NEXT: movlps %xmm0, M2
24 ; X64-NEXT: movq $0, {{.*}}(%rip)
25 ; X64-NEXT: movq $0, {{.*}}(%rip)
27 store <1 x i64> zeroinitializer, <1 x i64>* @M1
28 store <2 x i32> zeroinitializer, <2 x i32>* @M2
32 define void @test2() {
35 ; X32-NEXT: movl $-1, M1+4
36 ; X32-NEXT: movl $-1, M1
37 ; X32-NEXT: pcmpeqd %xmm0, %xmm0
38 ; X32-NEXT: movq %xmm0, M2
43 ; X64-NEXT: movq $-1, {{.*}}(%rip)
44 ; X64-NEXT: movq {{.*}}(%rip), %rax
45 ; X64-NEXT: movq %rax, {{.*}}(%rip)
47 store <1 x i64> < i64 -1 >, <1 x i64>* @M1
48 store <2 x i32> < i32 -1, i32 -1 >, <2 x i32>* @M2
52 define void @test3() {
55 ; X32-NEXT: xorps %xmm0, %xmm0
56 ; X32-NEXT: movaps %xmm0, S1
57 ; X32-NEXT: movaps %xmm0, S2
62 ; X64-NEXT: xorps %xmm0, %xmm0
63 ; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
64 ; X64-NEXT: movaps %xmm0, {{.*}}(%rip)
66 store <2 x i64> zeroinitializer, <2 x i64>* @S1
67 store <4 x i32> zeroinitializer, <4 x i32>* @S2
71 define void @test4() {
74 ; X32-NEXT: pcmpeqd %xmm0, %xmm0
75 ; X32-NEXT: movdqa %xmm0, S1
76 ; X32-NEXT: movdqa %xmm0, S2
81 ; X64-NEXT: pcmpeqd %xmm0, %xmm0
82 ; X64-NEXT: movdqa %xmm0, {{.*}}(%rip)
83 ; X64-NEXT: movdqa %xmm0, {{.*}}(%rip)
85 store <2 x i64> < i64 -1, i64 -1>, <2 x i64>* @S1
86 store <4 x i32> < i32 -1, i32 -1, i32 -1, i32 -1 >, <4 x i32>* @S2