| blob | fc915c2ea8f60f79e02c01ea837ec3c01c6b87a0 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VL
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VLBW
10 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
11 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
13 ; Just one 32-bit run to make sure we do reasonable things for i64 cases.
14 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X32-SSE,X32-SSE2
16 declare <2 x i64> @llvm.fshr.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
17 declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
18 declare <8 x i16> @llvm.fshr.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
19 declare <16 x i8> @llvm.fshr.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
21 ;
22 ; Variable Shifts
23 ;
25 define <2 x i64> @var_funnnel_v2i64(<2 x i64> %x, <2 x i64> %amt) nounwind {
26 ; SSE2-LABEL: var_funnnel_v2i64:
27 ; SSE2: # %bb.0:
28 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [63,63]
29 ; SSE2-NEXT: pxor %xmm3, %xmm3
30 ; SSE2-NEXT: psubq %xmm1, %xmm3
31 ; SSE2-NEXT: pand %xmm2, %xmm1
32 ; SSE2-NEXT: movdqa %xmm0, %xmm4
33 ; SSE2-NEXT: psrlq %xmm1, %xmm4
34 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
35 ; SSE2-NEXT: movdqa %xmm0, %xmm5
36 ; SSE2-NEXT: psrlq %xmm1, %xmm5
37 ; SSE2-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
38 ; SSE2-NEXT: pand %xmm2, %xmm3
39 ; SSE2-NEXT: movdqa %xmm0, %xmm1
40 ; SSE2-NEXT: psllq %xmm3, %xmm1
41 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1]
42 ; SSE2-NEXT: psllq %xmm2, %xmm0
43 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
44 ; SSE2-NEXT: orpd %xmm5, %xmm0
45 ; SSE2-NEXT: retq
46 ;
47 ; SSE41-LABEL: var_funnnel_v2i64:
48 ; SSE41: # %bb.0:
49 ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [63,63]
50 ; SSE41-NEXT: pxor %xmm3, %xmm3
51 ; SSE41-NEXT: psubq %xmm1, %xmm3
52 ; SSE41-NEXT: pand %xmm2, %xmm1
53 ; SSE41-NEXT: movdqa %xmm0, %xmm4
54 ; SSE41-NEXT: psrlq %xmm1, %xmm4
55 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
56 ; SSE41-NEXT: movdqa %xmm0, %xmm5
57 ; SSE41-NEXT: psrlq %xmm1, %xmm5
58 ; SSE41-NEXT: pblendw {{.*#+}} xmm5 = xmm4[0,1,2,3],xmm5[4,5,6,7]
59 ; SSE41-NEXT: pand %xmm2, %xmm3
60 ; SSE41-NEXT: movdqa %xmm0, %xmm1
61 ; SSE41-NEXT: psllq %xmm3, %xmm1
62 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1]
63 ; SSE41-NEXT: psllq %xmm2, %xmm0
64 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
65 ; SSE41-NEXT: por %xmm5, %xmm0
66 ; SSE41-NEXT: retq
67 ;
68 ; AVX1-LABEL: var_funnnel_v2i64:
69 ; AVX1: # %bb.0:
70 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63]
71 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3
72 ; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm4
73 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1]
74 ; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm3
75 ; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0,1,2,3],xmm3[4,5,6,7]
76 ; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4
77 ; AVX1-NEXT: vpsubq %xmm1, %xmm4, %xmm1
78 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
79 ; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2
80 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
81 ; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0
82 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
83 ; AVX1-NEXT: vpor %xmm3, %xmm0, %xmm0
84 ; AVX1-NEXT: retq
85 ;
86 ; AVX2-LABEL: var_funnnel_v2i64:
87 ; AVX2: # %bb.0:
88 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63]
89 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3
90 ; AVX2-NEXT: vpsrlvq %xmm3, %xmm0, %xmm3
91 ; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4
92 ; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1
93 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
94 ; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0
95 ; AVX2-NEXT: vpor %xmm3, %xmm0, %xmm0
96 ; AVX2-NEXT: retq
97 ;
98 ; AVX512F-LABEL: var_funnnel_v2i64:
99 ; AVX512F: # %bb.0:
100 ; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
101 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
102 ; AVX512F-NEXT: vprorvq %zmm1, %zmm0, %zmm0
103 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
104 ; AVX512F-NEXT: vzeroupper
105 ; AVX512F-NEXT: retq
106 ;
107 ; AVX512VL-LABEL: var_funnnel_v2i64:
108 ; AVX512VL: # %bb.0:
109 ; AVX512VL-NEXT: vprorvq %xmm1, %xmm0, %xmm0
110 ; AVX512VL-NEXT: retq
111 ;
112 ; AVX512BW-LABEL: var_funnnel_v2i64:
113 ; AVX512BW: # %bb.0:
114 ; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
115 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
116 ; AVX512BW-NEXT: vprorvq %zmm1, %zmm0, %zmm0
117 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
118 ; AVX512BW-NEXT: vzeroupper
119 ; AVX512BW-NEXT: retq
120 ;
121 ; AVX512VLBW-LABEL: var_funnnel_v2i64:
122 ; AVX512VLBW: # %bb.0:
123 ; AVX512VLBW-NEXT: vprorvq %xmm1, %xmm0, %xmm0
124 ; AVX512VLBW-NEXT: retq
125 ;
126 ; XOP-LABEL: var_funnnel_v2i64:
127 ; XOP: # %bb.0:
128 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
129 ; XOP-NEXT: vpsubq %xmm1, %xmm2, %xmm1
130 ; XOP-NEXT: vprotq %xmm1, %xmm0, %xmm0
131 ; XOP-NEXT: retq
132 ;
133 ; X32-SSE-LABEL: var_funnnel_v2i64:
134 ; X32-SSE: # %bb.0:
135 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,0,63,0]
136 ; X32-SSE-NEXT: pxor %xmm3, %xmm3
137 ; X32-SSE-NEXT: psubq %xmm1, %xmm3
138 ; X32-SSE-NEXT: pand %xmm2, %xmm1
139 ; X32-SSE-NEXT: movdqa %xmm0, %xmm4
140 ; X32-SSE-NEXT: psrlq %xmm1, %xmm4
141 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
142 ; X32-SSE-NEXT: movdqa %xmm0, %xmm5
143 ; X32-SSE-NEXT: psrlq %xmm1, %xmm5
144 ; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
145 ; X32-SSE-NEXT: pand %xmm2, %xmm3
146 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
147 ; X32-SSE-NEXT: psllq %xmm3, %xmm1
148 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1]
149 ; X32-SSE-NEXT: psllq %xmm2, %xmm0
150 ; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
151 ; X32-SSE-NEXT: orpd %xmm5, %xmm0
152 ; X32-SSE-NEXT: retl
153 %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %amt)
154 ret <2 x i64> %res
155 }
157 define <4 x i32> @var_funnnel_v4i32(<4 x i32> %x, <4 x i32> %amt) nounwind {
158 ; SSE2-LABEL: var_funnnel_v4i32:
159 ; SSE2: # %bb.0:
160 ; SSE2-NEXT: pxor %xmm2, %xmm2
161 ; SSE2-NEXT: psubd %xmm1, %xmm2
162 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
163 ; SSE2-NEXT: pslld $23, %xmm2
164 ; SSE2-NEXT: paddd {{.*}}(%rip), %xmm2
165 ; SSE2-NEXT: cvttps2dq %xmm2, %xmm1
166 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
167 ; SSE2-NEXT: pmuludq %xmm1, %xmm0
168 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
169 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
170 ; SSE2-NEXT: pmuludq %xmm2, %xmm1
171 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
172 ; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
173 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
174 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
175 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
176 ; SSE2-NEXT: por %xmm3, %xmm0
177 ; SSE2-NEXT: retq
178 ;
179 ; SSE41-LABEL: var_funnnel_v4i32:
180 ; SSE41: # %bb.0:
181 ; SSE41-NEXT: pxor %xmm2, %xmm2
182 ; SSE41-NEXT: psubd %xmm1, %xmm2
183 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm2
184 ; SSE41-NEXT: pslld $23, %xmm2
185 ; SSE41-NEXT: paddd {{.*}}(%rip), %xmm2
186 ; SSE41-NEXT: cvttps2dq %xmm2, %xmm1
187 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
188 ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
189 ; SSE41-NEXT: pmuludq %xmm2, %xmm3
190 ; SSE41-NEXT: pmuludq %xmm1, %xmm0
191 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
192 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
193 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2]
194 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
195 ; SSE41-NEXT: por %xmm1, %xmm0
196 ; SSE41-NEXT: retq
197 ;
198 ; AVX1-LABEL: var_funnnel_v4i32:
199 ; AVX1: # %bb.0:
200 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
201 ; AVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1
202 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
203 ; AVX1-NEXT: vpslld $23, %xmm1, %xmm1
204 ; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm1
205 ; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1
206 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
207 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
208 ; AVX1-NEXT: vpmuludq %xmm2, %xmm3, %xmm2
209 ; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
210 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
211 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
212 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2]
213 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
214 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
215 ; AVX1-NEXT: retq
216 ;
217 ; AVX2-LABEL: var_funnnel_v4i32:
218 ; AVX2: # %bb.0:
219 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
220 ; AVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1
221 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31]
222 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
223 ; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm2
224 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32]
225 ; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1
226 ; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0
227 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
228 ; AVX2-NEXT: retq
229 ;
230 ; AVX512F-LABEL: var_funnnel_v4i32:
231 ; AVX512F: # %bb.0:
232 ; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
233 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
234 ; AVX512F-NEXT: vprorvd %zmm1, %zmm0, %zmm0
235 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
236 ; AVX512F-NEXT: vzeroupper
237 ; AVX512F-NEXT: retq
238 ;
239 ; AVX512VL-LABEL: var_funnnel_v4i32:
240 ; AVX512VL: # %bb.0:
241 ; AVX512VL-NEXT: vprorvd %xmm1, %xmm0, %xmm0
242 ; AVX512VL-NEXT: retq
243 ;
244 ; AVX512BW-LABEL: var_funnnel_v4i32:
245 ; AVX512BW: # %bb.0:
246 ; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1
247 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
248 ; AVX512BW-NEXT: vprorvd %zmm1, %zmm0, %zmm0
249 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
250 ; AVX512BW-NEXT: vzeroupper
251 ; AVX512BW-NEXT: retq
252 ;
253 ; AVX512VLBW-LABEL: var_funnnel_v4i32:
254 ; AVX512VLBW: # %bb.0:
255 ; AVX512VLBW-NEXT: vprorvd %xmm1, %xmm0, %xmm0
256 ; AVX512VLBW-NEXT: retq
257 ;
258 ; XOP-LABEL: var_funnnel_v4i32:
259 ; XOP: # %bb.0:
260 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
261 ; XOP-NEXT: vpsubd %xmm1, %xmm2, %xmm1
262 ; XOP-NEXT: vprotd %xmm1, %xmm0, %xmm0
263 ; XOP-NEXT: retq
264 ;
265 ; X32-SSE-LABEL: var_funnnel_v4i32:
266 ; X32-SSE: # %bb.0:
267 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
268 ; X32-SSE-NEXT: psubd %xmm1, %xmm2
269 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2
270 ; X32-SSE-NEXT: pslld $23, %xmm2
271 ; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm2
272 ; X32-SSE-NEXT: cvttps2dq %xmm2, %xmm1
273 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
274 ; X32-SSE-NEXT: pmuludq %xmm1, %xmm0
275 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
276 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
277 ; X32-SSE-NEXT: pmuludq %xmm2, %xmm1
278 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
279 ; X32-SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
280 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
281 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
282 ; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
283 ; X32-SSE-NEXT: por %xmm3, %xmm0
284 ; X32-SSE-NEXT: retl
285 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %amt)
286 ret <4 x i32> %res
287 }
289 define <8 x i16> @var_funnnel_v8i16(<8 x i16> %x, <8 x i16> %amt) nounwind {
290 ; SSE2-LABEL: var_funnnel_v8i16:
291 ; SSE2: # %bb.0:
292 ; SSE2-NEXT: pxor %xmm2, %xmm2
293 ; SSE2-NEXT: pxor %xmm3, %xmm3
294 ; SSE2-NEXT: psubw %xmm1, %xmm3
295 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm3
296 ; SSE2-NEXT: movdqa %xmm3, %xmm1
297 ; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
298 ; SSE2-NEXT: pslld $23, %xmm1
299 ; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [1065353216,1065353216,1065353216,1065353216]
300 ; SSE2-NEXT: paddd %xmm4, %xmm1
301 ; SSE2-NEXT: cvttps2dq %xmm1, %xmm1
302 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
303 ; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
304 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
305 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
306 ; SSE2-NEXT: pslld $23, %xmm3
307 ; SSE2-NEXT: paddd %xmm4, %xmm3
308 ; SSE2-NEXT: cvttps2dq %xmm3, %xmm2
309 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
310 ; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
311 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
312 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
313 ; SSE2-NEXT: movdqa %xmm0, %xmm1
314 ; SSE2-NEXT: pmulhuw %xmm2, %xmm1
315 ; SSE2-NEXT: pmullw %xmm2, %xmm0
316 ; SSE2-NEXT: por %xmm1, %xmm0
317 ; SSE2-NEXT: retq
318 ;
319 ; SSE41-LABEL: var_funnnel_v8i16:
320 ; SSE41: # %bb.0:
321 ; SSE41-NEXT: pxor %xmm2, %xmm2
322 ; SSE41-NEXT: pxor %xmm3, %xmm3
323 ; SSE41-NEXT: psubw %xmm1, %xmm3
324 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm3
325 ; SSE41-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero
326 ; SSE41-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
327 ; SSE41-NEXT: pslld $23, %xmm3
328 ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [1065353216,1065353216,1065353216,1065353216]
329 ; SSE41-NEXT: paddd %xmm2, %xmm3
330 ; SSE41-NEXT: cvttps2dq %xmm3, %xmm3
331 ; SSE41-NEXT: pslld $23, %xmm1
332 ; SSE41-NEXT: paddd %xmm2, %xmm1
333 ; SSE41-NEXT: cvttps2dq %xmm1, %xmm1
334 ; SSE41-NEXT: packusdw %xmm3, %xmm1
335 ; SSE41-NEXT: movdqa %xmm0, %xmm2
336 ; SSE41-NEXT: pmulhuw %xmm1, %xmm2
337 ; SSE41-NEXT: pmullw %xmm1, %xmm0
338 ; SSE41-NEXT: por %xmm2, %xmm0
339 ; SSE41-NEXT: retq
340 ;
341 ; AVX1-LABEL: var_funnnel_v8i16:
342 ; AVX1: # %bb.0:
343 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
344 ; AVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1
345 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
346 ; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
347 ; AVX1-NEXT: vpslld $23, %xmm2, %xmm2
348 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216]
349 ; AVX1-NEXT: vpaddd %xmm3, %xmm2, %xmm2
350 ; AVX1-NEXT: vcvttps2dq %xmm2, %xmm2
351 ; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
352 ; AVX1-NEXT: vpslld $23, %xmm1, %xmm1
353 ; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1
354 ; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1
355 ; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1
356 ; AVX1-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2
357 ; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0
358 ; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
359 ; AVX1-NEXT: retq
360 ;
361 ; AVX2-LABEL: var_funnnel_v8i16:
362 ; AVX2: # %bb.0:
363 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
364 ; AVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1
365 ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
366 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
367 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
368 ; AVX2-NEXT: vpsllvd %ymm2, %ymm0, %ymm2
369 ; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
370 ; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2
371 ; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3]
372 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = [16,16,16,16,16,16,16,16]
373 ; AVX2-NEXT: vpsubw %xmm1, %xmm4, %xmm1
374 ; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
375 ; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
376 ; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0
377 ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
378 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
379 ; AVX2-NEXT: vzeroupper
380 ; AVX2-NEXT: retq
381 ;
382 ; AVX512F-LABEL: var_funnnel_v8i16:
383 ; AVX512F: # %bb.0:
384 ; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2
385 ; AVX512F-NEXT: vpsubw %xmm1, %xmm2, %xmm1
386 ; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
387 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
388 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
389 ; AVX512F-NEXT: vpsllvd %ymm2, %ymm0, %ymm2
390 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
391 ; AVX512F-NEXT: vpsubw %xmm1, %xmm3, %xmm1
392 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
393 ; AVX512F-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
394 ; AVX512F-NEXT: vpor %ymm0, %ymm2, %ymm0
395 ; AVX512F-NEXT: vpmovdw %zmm0, %ymm0
396 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
397 ; AVX512F-NEXT: vzeroupper
398 ; AVX512F-NEXT: retq
399 ;
400 ; AVX512VL-LABEL: var_funnnel_v8i16:
401 ; AVX512VL: # %bb.0:
402 ; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2
403 ; AVX512VL-NEXT: vpsubw %xmm1, %xmm2, %xmm1
404 ; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
405 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
406 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
407 ; AVX512VL-NEXT: vpsllvd %ymm2, %ymm0, %ymm2
408 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
409 ; AVX512VL-NEXT: vpsubw %xmm1, %xmm3, %xmm1
410 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
411 ; AVX512VL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0
412 ; AVX512VL-NEXT: vpor %ymm0, %ymm2, %ymm0
413 ; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0
414 ; AVX512VL-NEXT: vzeroupper
415 ; AVX512VL-NEXT: retq
416 ;
417 ; AVX512BW-LABEL: var_funnnel_v8i16:
418 ; AVX512BW: # %bb.0:
419 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
420 ; AVX512BW-NEXT: vpxor %xmm2, %xmm2, %xmm2
421 ; AVX512BW-NEXT: vpsubw %xmm1, %xmm2, %xmm1
422 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
423 ; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm2
424 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
425 ; AVX512BW-NEXT: vpsubw %xmm1, %xmm3, %xmm1
426 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0
427 ; AVX512BW-NEXT: vpor %xmm0, %xmm2, %xmm0
428 ; AVX512BW-NEXT: vzeroupper
429 ; AVX512BW-NEXT: retq
430 ;
431 ; AVX512VLBW-LABEL: var_funnnel_v8i16:
432 ; AVX512VLBW: # %bb.0:
433 ; AVX512VLBW-NEXT: vpxor %xmm2, %xmm2, %xmm2
434 ; AVX512VLBW-NEXT: vpsubw %xmm1, %xmm2, %xmm1
435 ; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
436 ; AVX512VLBW-NEXT: vpsllvw %xmm1, %xmm0, %xmm2
437 ; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
438 ; AVX512VLBW-NEXT: vpsubw %xmm1, %xmm3, %xmm1
439 ; AVX512VLBW-NEXT: vpsrlvw %xmm1, %xmm0, %xmm0
440 ; AVX512VLBW-NEXT: vpor %xmm0, %xmm2, %xmm0
441 ; AVX512VLBW-NEXT: retq
442 ;
443 ; XOP-LABEL: var_funnnel_v8i16:
444 ; XOP: # %bb.0:
445 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
446 ; XOP-NEXT: vpsubw %xmm1, %xmm2, %xmm1
447 ; XOP-NEXT: vprotw %xmm1, %xmm0, %xmm0
448 ; XOP-NEXT: retq
449 ;
450 ; X32-SSE-LABEL: var_funnnel_v8i16:
451 ; X32-SSE: # %bb.0:
452 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
453 ; X32-SSE-NEXT: pxor %xmm3, %xmm3
454 ; X32-SSE-NEXT: psubw %xmm1, %xmm3
455 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm3
456 ; X32-SSE-NEXT: movdqa %xmm3, %xmm1
457 ; X32-SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
458 ; X32-SSE-NEXT: pslld $23, %xmm1
459 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm4 = [1065353216,1065353216,1065353216,1065353216]
460 ; X32-SSE-NEXT: paddd %xmm4, %xmm1
461 ; X32-SSE-NEXT: cvttps2dq %xmm1, %xmm1
462 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
463 ; X32-SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
464 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
465 ; X32-SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3]
466 ; X32-SSE-NEXT: pslld $23, %xmm3
467 ; X32-SSE-NEXT: paddd %xmm4, %xmm3
468 ; X32-SSE-NEXT: cvttps2dq %xmm3, %xmm2
469 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
470 ; X32-SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
471 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
472 ; X32-SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
473 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
474 ; X32-SSE-NEXT: pmulhuw %xmm2, %xmm1
475 ; X32-SSE-NEXT: pmullw %xmm2, %xmm0
476 ; X32-SSE-NEXT: por %xmm1, %xmm0
477 ; X32-SSE-NEXT: retl
478 %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> %amt)
479 ret <8 x i16> %res
480 }
482 define <16 x i8> @var_funnnel_v16i8(<16 x i8> %x, <16 x i8> %amt) nounwind {
483 ; SSE2-LABEL: var_funnnel_v16i8:
484 ; SSE2: # %bb.0:
485 ; SSE2-NEXT: movdqa %xmm0, %xmm2
486 ; SSE2-NEXT: pxor %xmm0, %xmm0
487 ; SSE2-NEXT: pxor %xmm3, %xmm3
488 ; SSE2-NEXT: psubb %xmm1, %xmm3
489 ; SSE2-NEXT: psllw $5, %xmm3
490 ; SSE2-NEXT: pxor %xmm1, %xmm1
491 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm1
492 ; SSE2-NEXT: movdqa %xmm2, %xmm4
493 ; SSE2-NEXT: psrlw $4, %xmm4
494 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm4
495 ; SSE2-NEXT: movdqa %xmm2, %xmm5
496 ; SSE2-NEXT: psllw $4, %xmm5
497 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm5
498 ; SSE2-NEXT: por %xmm4, %xmm5
499 ; SSE2-NEXT: pand %xmm1, %xmm5
500 ; SSE2-NEXT: pandn %xmm2, %xmm1
501 ; SSE2-NEXT: por %xmm5, %xmm1
502 ; SSE2-NEXT: movdqa %xmm1, %xmm2
503 ; SSE2-NEXT: psrlw $6, %xmm2
504 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
505 ; SSE2-NEXT: movdqa %xmm1, %xmm4
506 ; SSE2-NEXT: psllw $2, %xmm4
507 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm4
508 ; SSE2-NEXT: por %xmm2, %xmm4
509 ; SSE2-NEXT: paddb %xmm3, %xmm3
510 ; SSE2-NEXT: pxor %xmm2, %xmm2
511 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm2
512 ; SSE2-NEXT: pand %xmm2, %xmm4
513 ; SSE2-NEXT: pandn %xmm1, %xmm2
514 ; SSE2-NEXT: por %xmm4, %xmm2
515 ; SSE2-NEXT: movdqa %xmm2, %xmm1
516 ; SSE2-NEXT: paddb %xmm2, %xmm1
517 ; SSE2-NEXT: movdqa %xmm2, %xmm4
518 ; SSE2-NEXT: psrlw $7, %xmm4
519 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm4
520 ; SSE2-NEXT: por %xmm1, %xmm4
521 ; SSE2-NEXT: paddb %xmm3, %xmm3
522 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm0
523 ; SSE2-NEXT: pand %xmm0, %xmm4
524 ; SSE2-NEXT: pandn %xmm2, %xmm0
525 ; SSE2-NEXT: por %xmm4, %xmm0
526 ; SSE2-NEXT: retq
527 ;
528 ; SSE41-LABEL: var_funnnel_v16i8:
529 ; SSE41: # %bb.0:
530 ; SSE41-NEXT: movdqa %xmm0, %xmm2
531 ; SSE41-NEXT: psrlw $4, %xmm0
532 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm0
533 ; SSE41-NEXT: movdqa %xmm2, %xmm3
534 ; SSE41-NEXT: psllw $4, %xmm3
535 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm3
536 ; SSE41-NEXT: por %xmm0, %xmm3
537 ; SSE41-NEXT: pxor %xmm0, %xmm0
538 ; SSE41-NEXT: psubb %xmm1, %xmm0
539 ; SSE41-NEXT: psllw $5, %xmm0
540 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
541 ; SSE41-NEXT: movdqa %xmm2, %xmm1
542 ; SSE41-NEXT: psrlw $6, %xmm1
543 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm1
544 ; SSE41-NEXT: movdqa %xmm2, %xmm3
545 ; SSE41-NEXT: psllw $2, %xmm3
546 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm3
547 ; SSE41-NEXT: por %xmm1, %xmm3
548 ; SSE41-NEXT: paddb %xmm0, %xmm0
549 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
550 ; SSE41-NEXT: movdqa %xmm2, %xmm1
551 ; SSE41-NEXT: paddb %xmm2, %xmm1
552 ; SSE41-NEXT: movdqa %xmm2, %xmm3
553 ; SSE41-NEXT: psrlw $7, %xmm3
554 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm3
555 ; SSE41-NEXT: por %xmm1, %xmm3
556 ; SSE41-NEXT: paddb %xmm0, %xmm0
557 ; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2
558 ; SSE41-NEXT: movdqa %xmm2, %xmm0
559 ; SSE41-NEXT: retq
560 ;
561 ; AVX-LABEL: var_funnnel_v16i8:
562 ; AVX: # %bb.0:
563 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm2
564 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2
565 ; AVX-NEXT: vpsllw $4, %xmm0, %xmm3
566 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3
567 ; AVX-NEXT: vpor %xmm2, %xmm3, %xmm2
568 ; AVX-NEXT: vpxor %xmm3, %xmm3, %xmm3
569 ; AVX-NEXT: vpsubb %xmm1, %xmm3, %xmm1
570 ; AVX-NEXT: vpsllw $5, %xmm1, %xmm1
571 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
572 ; AVX-NEXT: vpsrlw $6, %xmm0, %xmm2
573 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2
574 ; AVX-NEXT: vpsllw $2, %xmm0, %xmm3
575 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3
576 ; AVX-NEXT: vpor %xmm2, %xmm3, %xmm2
577 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
578 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
579 ; AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm2
580 ; AVX-NEXT: vpsrlw $7, %xmm0, %xmm3
581 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3
582 ; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2
583 ; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1
584 ; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
585 ; AVX-NEXT: retq
586 ;
587 ; AVX512F-LABEL: var_funnnel_v16i8:
588 ; AVX512F: # %bb.0:
589 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
590 ; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm3
591 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero
592 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
593 ; AVX512F-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3
594 ; AVX512F-NEXT: vpxor %xmm4, %xmm4, %xmm4
595 ; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm1
596 ; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1
597 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
598 ; AVX512F-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
599 ; AVX512F-NEXT: vpord %zmm3, %zmm0, %zmm0
600 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
601 ; AVX512F-NEXT: vzeroupper
602 ; AVX512F-NEXT: retq
603 ;
604 ; AVX512VL-LABEL: var_funnnel_v16i8:
605 ; AVX512VL: # %bb.0:
606 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
607 ; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm3
608 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero
609 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
610 ; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3
611 ; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4
612 ; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm1
613 ; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1
614 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
615 ; AVX512VL-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
616 ; AVX512VL-NEXT: vpord %zmm3, %zmm0, %zmm0
617 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
618 ; AVX512VL-NEXT: vzeroupper
619 ; AVX512VL-NEXT: retq
620 ;
621 ; AVX512BW-LABEL: var_funnnel_v16i8:
622 ; AVX512BW: # %bb.0:
623 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
624 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
625 ; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3
626 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
627 ; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3
628 ; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4
629 ; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1
630 ; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1
631 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
632 ; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
633 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0
634 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
635 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
636 ; AVX512BW-NEXT: vzeroupper
637 ; AVX512BW-NEXT: retq
638 ;
639 ; AVX512VLBW-LABEL: var_funnnel_v16i8:
640 ; AVX512VLBW: # %bb.0:
641 ; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
642 ; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3
643 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
644 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
645 ; AVX512VLBW-NEXT: vpsrlvw %ymm3, %ymm0, %ymm3
646 ; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4
647 ; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1
648 ; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1
649 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
650 ; AVX512VLBW-NEXT: vpsllvw %ymm1, %ymm0, %ymm0
651 ; AVX512VLBW-NEXT: vpor %ymm3, %ymm0, %ymm0
652 ; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0
653 ; AVX512VLBW-NEXT: vzeroupper
654 ; AVX512VLBW-NEXT: retq
655 ;
656 ; XOP-LABEL: var_funnnel_v16i8:
657 ; XOP: # %bb.0:
658 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2
659 ; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm1
660 ; XOP-NEXT: vprotb %xmm1, %xmm0, %xmm0
661 ; XOP-NEXT: retq
662 ;
663 ; X32-SSE-LABEL: var_funnnel_v16i8:
664 ; X32-SSE: # %bb.0:
665 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
666 ; X32-SSE-NEXT: pxor %xmm0, %xmm0
667 ; X32-SSE-NEXT: pxor %xmm3, %xmm3
668 ; X32-SSE-NEXT: psubb %xmm1, %xmm3
669 ; X32-SSE-NEXT: psllw $5, %xmm3
670 ; X32-SSE-NEXT: pxor %xmm1, %xmm1
671 ; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm1
672 ; X32-SSE-NEXT: movdqa %xmm2, %xmm4
673 ; X32-SSE-NEXT: psrlw $4, %xmm4
674 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4
675 ; X32-SSE-NEXT: movdqa %xmm2, %xmm5
676 ; X32-SSE-NEXT: psllw $4, %xmm5
677 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm5
678 ; X32-SSE-NEXT: por %xmm4, %xmm5
679 ; X32-SSE-NEXT: pand %xmm1, %xmm5
680 ; X32-SSE-NEXT: pandn %xmm2, %xmm1
681 ; X32-SSE-NEXT: por %xmm5, %xmm1
682 ; X32-SSE-NEXT: movdqa %xmm1, %xmm2
683 ; X32-SSE-NEXT: psrlw $6, %xmm2
684 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2
685 ; X32-SSE-NEXT: movdqa %xmm1, %xmm4
686 ; X32-SSE-NEXT: psllw $2, %xmm4
687 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4
688 ; X32-SSE-NEXT: por %xmm2, %xmm4
689 ; X32-SSE-NEXT: paddb %xmm3, %xmm3
690 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
691 ; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm2
692 ; X32-SSE-NEXT: pand %xmm2, %xmm4
693 ; X32-SSE-NEXT: pandn %xmm1, %xmm2
694 ; X32-SSE-NEXT: por %xmm4, %xmm2
695 ; X32-SSE-NEXT: movdqa %xmm2, %xmm1
696 ; X32-SSE-NEXT: paddb %xmm2, %xmm1
697 ; X32-SSE-NEXT: movdqa %xmm2, %xmm4
698 ; X32-SSE-NEXT: psrlw $7, %xmm4
699 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4
700 ; X32-SSE-NEXT: por %xmm1, %xmm4
701 ; X32-SSE-NEXT: paddb %xmm3, %xmm3
702 ; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm0
703 ; X32-SSE-NEXT: pand %xmm0, %xmm4
704 ; X32-SSE-NEXT: pandn %xmm2, %xmm0
705 ; X32-SSE-NEXT: por %xmm4, %xmm0
706 ; X32-SSE-NEXT: retl
707 %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %amt)
708 ret <16 x i8> %res
709 }
711 ;
712 ; Uniform Variable Shifts
713 ;
715 define <2 x i64> @splatvar_funnnel_v2i64(<2 x i64> %x, <2 x i64> %amt) nounwind {
716 ; SSE-LABEL: splatvar_funnnel_v2i64:
717 ; SSE: # %bb.0:
718 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
719 ; SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,63]
720 ; SSE-NEXT: pxor %xmm3, %xmm3
721 ; SSE-NEXT: psubq %xmm1, %xmm3
722 ; SSE-NEXT: pand %xmm2, %xmm1
723 ; SSE-NEXT: movdqa %xmm0, %xmm4
724 ; SSE-NEXT: psrlq %xmm1, %xmm4
725 ; SSE-NEXT: pand %xmm2, %xmm3
726 ; SSE-NEXT: psllq %xmm3, %xmm0
727 ; SSE-NEXT: por %xmm4, %xmm0
728 ; SSE-NEXT: retq
729 ;
730 ; AVX1-LABEL: splatvar_funnnel_v2i64:
731 ; AVX1: # %bb.0:
732 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
733 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63]
734 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3
735 ; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm3
736 ; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4
737 ; AVX1-NEXT: vpsubq %xmm1, %xmm4, %xmm1
738 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
739 ; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0
740 ; AVX1-NEXT: vpor %xmm3, %xmm0, %xmm0
741 ; AVX1-NEXT: retq
742 ;
743 ; AVX2-LABEL: splatvar_funnnel_v2i64:
744 ; AVX2: # %bb.0:
745 ; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1
746 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63]
747 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3
748 ; AVX2-NEXT: vpsrlq %xmm3, %xmm0, %xmm3
749 ; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4
750 ; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1
751 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
752 ; AVX2-NEXT: vpsllq %xmm1, %xmm0, %xmm0
753 ; AVX2-NEXT: vpor %xmm3, %xmm0, %xmm0
754 ; AVX2-NEXT: retq
755 ;
756 ; AVX512F-LABEL: splatvar_funnnel_v2i64:
757 ; AVX512F: # %bb.0:
758 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
759 ; AVX512F-NEXT: vpbroadcastq %xmm1, %xmm1
760 ; AVX512F-NEXT: vprorvq %zmm1, %zmm0, %zmm0
761 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
762 ; AVX512F-NEXT: vzeroupper
763 ; AVX512F-NEXT: retq
764 ;
765 ; AVX512VL-LABEL: splatvar_funnnel_v2i64:
766 ; AVX512VL: # %bb.0:
767 ; AVX512VL-NEXT: vpbroadcastq %xmm1, %xmm1
768 ; AVX512VL-NEXT: vprorvq %xmm1, %xmm0, %xmm0
769 ; AVX512VL-NEXT: retq
770 ;
771 ; AVX512BW-LABEL: splatvar_funnnel_v2i64:
772 ; AVX512BW: # %bb.0:
773 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
774 ; AVX512BW-NEXT: vpbroadcastq %xmm1, %xmm1
775 ; AVX512BW-NEXT: vprorvq %zmm1, %zmm0, %zmm0
776 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
777 ; AVX512BW-NEXT: vzeroupper
778 ; AVX512BW-NEXT: retq
779 ;
780 ; AVX512VLBW-LABEL: splatvar_funnnel_v2i64:
781 ; AVX512VLBW: # %bb.0:
782 ; AVX512VLBW-NEXT: vpbroadcastq %xmm1, %xmm1
783 ; AVX512VLBW-NEXT: vprorvq %xmm1, %xmm0, %xmm0
784 ; AVX512VLBW-NEXT: retq
785 ;
786 ; XOPAVX1-LABEL: splatvar_funnnel_v2i64:
787 ; XOPAVX1: # %bb.0:
788 ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
789 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
790 ; XOPAVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm1
791 ; XOPAVX1-NEXT: vprotq %xmm1, %xmm0, %xmm0
792 ; XOPAVX1-NEXT: retq
793 ;
794 ; XOPAVX2-LABEL: splatvar_funnnel_v2i64:
795 ; XOPAVX2: # %bb.0:
796 ; XOPAVX2-NEXT: vpbroadcastq %xmm1, %xmm1
797 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
798 ; XOPAVX2-NEXT: vpsubq %xmm1, %xmm2, %xmm1
799 ; XOPAVX2-NEXT: vprotq %xmm1, %xmm0, %xmm0
800 ; XOPAVX2-NEXT: retq
801 ;
802 ; X32-SSE-LABEL: splatvar_funnnel_v2i64:
803 ; X32-SSE: # %bb.0:
804 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
805 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,0,63,0]
806 ; X32-SSE-NEXT: pxor %xmm3, %xmm3
807 ; X32-SSE-NEXT: psubq %xmm1, %xmm3
808 ; X32-SSE-NEXT: pand %xmm2, %xmm1
809 ; X32-SSE-NEXT: movdqa %xmm0, %xmm4
810 ; X32-SSE-NEXT: psrlq %xmm1, %xmm4
811 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
812 ; X32-SSE-NEXT: movdqa %xmm0, %xmm5
813 ; X32-SSE-NEXT: psrlq %xmm1, %xmm5
814 ; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1]
815 ; X32-SSE-NEXT: pand %xmm2, %xmm3
816 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
817 ; X32-SSE-NEXT: psllq %xmm3, %xmm1
818 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1]
819 ; X32-SSE-NEXT: psllq %xmm2, %xmm0
820 ; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
821 ; X32-SSE-NEXT: orpd %xmm5, %xmm0
822 ; X32-SSE-NEXT: retl
823 %splat = shufflevector <2 x i64> %amt, <2 x i64> undef, <2 x i32> zeroinitializer
824 %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %splat)
825 ret <2 x i64> %res
826 }
828 define <4 x i32> @splatvar_funnnel_v4i32(<4 x i32> %x, <4 x i32> %amt) nounwind {
829 ; SSE2-LABEL: splatvar_funnnel_v4i32:
830 ; SSE2: # %bb.0:
831 ; SSE2-NEXT: movd %xmm1, %eax
832 ; SSE2-NEXT: negl %eax
833 ; SSE2-NEXT: andl $31, %eax
834 ; SSE2-NEXT: movd %eax, %xmm1
835 ; SSE2-NEXT: movdqa %xmm0, %xmm2
836 ; SSE2-NEXT: pslld %xmm1, %xmm2
837 ; SSE2-NEXT: movl $32, %ecx
838 ; SSE2-NEXT: subl %eax, %ecx
839 ; SSE2-NEXT: movd %ecx, %xmm1
840 ; SSE2-NEXT: psrld %xmm1, %xmm0
841 ; SSE2-NEXT: por %xmm2, %xmm0
842 ; SSE2-NEXT: retq
843 ;
844 ; SSE41-LABEL: splatvar_funnnel_v4i32:
845 ; SSE41: # %bb.0:
846 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
847 ; SSE41-NEXT: pxor %xmm2, %xmm2
848 ; SSE41-NEXT: psubd %xmm1, %xmm2
849 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm2
850 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm2[0],zero,xmm2[1],zero
851 ; SSE41-NEXT: movdqa %xmm0, %xmm3
852 ; SSE41-NEXT: pslld %xmm1, %xmm3
853 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [32,32,32,32]
854 ; SSE41-NEXT: psubd %xmm2, %xmm1
855 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
856 ; SSE41-NEXT: psrld %xmm1, %xmm0
857 ; SSE41-NEXT: por %xmm3, %xmm0
858 ; SSE41-NEXT: retq
859 ;
860 ; AVX1-LABEL: splatvar_funnnel_v4i32:
861 ; AVX1: # %bb.0:
862 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
863 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
864 ; AVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1
865 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
866 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero
867 ; AVX1-NEXT: vpslld %xmm2, %xmm0, %xmm2
868 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [32,32,32,32]
869 ; AVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm1
870 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
871 ; AVX1-NEXT: vpsrld %xmm1, %xmm0, %xmm0
872 ; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0
873 ; AVX1-NEXT: retq
874 ;
875 ; AVX2-LABEL: splatvar_funnnel_v4i32:
876 ; AVX2: # %bb.0:
877 ; AVX2-NEXT: vpbroadcastd %xmm1, %xmm1
878 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
879 ; AVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1
880 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31]
881 ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1
882 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero
883 ; AVX2-NEXT: vpslld %xmm2, %xmm0, %xmm2
884 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32]
885 ; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1
886 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
887 ; AVX2-NEXT: vpsrld %xmm1, %xmm0, %xmm0
888 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
889 ; AVX2-NEXT: retq
890 ;
891 ; AVX512F-LABEL: splatvar_funnnel_v4i32:
892 ; AVX512F: # %bb.0:
893 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
894 ; AVX512F-NEXT: vpbroadcastd %xmm1, %xmm1
895 ; AVX512F-NEXT: vprorvd %zmm1, %zmm0, %zmm0
896 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
897 ; AVX512F-NEXT: vzeroupper
898 ; AVX512F-NEXT: retq
899 ;
900 ; AVX512VL-LABEL: splatvar_funnnel_v4i32:
901 ; AVX512VL: # %bb.0:
902 ; AVX512VL-NEXT: vpbroadcastd %xmm1, %xmm1
903 ; AVX512VL-NEXT: vprorvd %xmm1, %xmm0, %xmm0
904 ; AVX512VL-NEXT: retq
905 ;
906 ; AVX512BW-LABEL: splatvar_funnnel_v4i32:
907 ; AVX512BW: # %bb.0:
908 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
909 ; AVX512BW-NEXT: vpbroadcastd %xmm1, %xmm1
910 ; AVX512BW-NEXT: vprorvd %zmm1, %zmm0, %zmm0
911 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
912 ; AVX512BW-NEXT: vzeroupper
913 ; AVX512BW-NEXT: retq
914 ;
915 ; AVX512VLBW-LABEL: splatvar_funnnel_v4i32:
916 ; AVX512VLBW: # %bb.0:
917 ; AVX512VLBW-NEXT: vpbroadcastd %xmm1, %xmm1
918 ; AVX512VLBW-NEXT: vprorvd %xmm1, %xmm0, %xmm0
919 ; AVX512VLBW-NEXT: retq
920 ;
921 ; XOPAVX1-LABEL: splatvar_funnnel_v4i32:
922 ; XOPAVX1: # %bb.0:
923 ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
924 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
925 ; XOPAVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1
926 ; XOPAVX1-NEXT: vprotd %xmm1, %xmm0, %xmm0
927 ; XOPAVX1-NEXT: retq
928 ;
929 ; XOPAVX2-LABEL: splatvar_funnnel_v4i32:
930 ; XOPAVX2: # %bb.0:
931 ; XOPAVX2-NEXT: vpbroadcastd %xmm1, %xmm1
932 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
933 ; XOPAVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1
934 ; XOPAVX2-NEXT: vprotd %xmm1, %xmm0, %xmm0
935 ; XOPAVX2-NEXT: retq
936 ;
937 ; X32-SSE-LABEL: splatvar_funnnel_v4i32:
938 ; X32-SSE: # %bb.0:
939 ; X32-SSE-NEXT: movd %xmm1, %eax
940 ; X32-SSE-NEXT: negl %eax
941 ; X32-SSE-NEXT: andl $31, %eax
942 ; X32-SSE-NEXT: movd %eax, %xmm1
943 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
944 ; X32-SSE-NEXT: pslld %xmm1, %xmm2
945 ; X32-SSE-NEXT: movl $32, %ecx
946 ; X32-SSE-NEXT: subl %eax, %ecx
947 ; X32-SSE-NEXT: movd %ecx, %xmm1
948 ; X32-SSE-NEXT: psrld %xmm1, %xmm0
949 ; X32-SSE-NEXT: por %xmm2, %xmm0
950 ; X32-SSE-NEXT: retl
951 %splat = shufflevector <4 x i32> %amt, <4 x i32> undef, <4 x i32> zeroinitializer
952 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %splat)
953 ret <4 x i32> %res
954 }
956 define <8 x i16> @splatvar_funnnel_v8i16(<8 x i16> %x, <8 x i16> %amt) nounwind {
957 ; SSE2-LABEL: splatvar_funnnel_v8i16:
958 ; SSE2: # %bb.0:
959 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
960 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
961 ; SSE2-NEXT: pxor %xmm2, %xmm2
962 ; SSE2-NEXT: psubw %xmm1, %xmm2
963 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
964 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16]
965 ; SSE2-NEXT: psubw %xmm2, %xmm1
966 ; SSE2-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1]
967 ; SSE2-NEXT: psrldq {{.*#+}} xmm2 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
968 ; SSE2-NEXT: movdqa %xmm0, %xmm3
969 ; SSE2-NEXT: psllw %xmm2, %xmm3
970 ; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
971 ; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
972 ; SSE2-NEXT: psrlw %xmm1, %xmm0
973 ; SSE2-NEXT: por %xmm3, %xmm0
974 ; SSE2-NEXT: retq
975 ;
976 ; SSE41-LABEL: splatvar_funnnel_v8i16:
977 ; SSE41: # %bb.0:
978 ; SSE41-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
979 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
980 ; SSE41-NEXT: pxor %xmm2, %xmm2
981 ; SSE41-NEXT: psubw %xmm1, %xmm2
982 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm2
983 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero
984 ; SSE41-NEXT: movdqa %xmm0, %xmm3
985 ; SSE41-NEXT: psllw %xmm1, %xmm3
986 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16]
987 ; SSE41-NEXT: psubw %xmm2, %xmm1
988 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
989 ; SSE41-NEXT: psrlw %xmm1, %xmm0
990 ; SSE41-NEXT: por %xmm3, %xmm0
991 ; SSE41-NEXT: retq
992 ;
993 ; AVX1-LABEL: splatvar_funnnel_v8i16:
994 ; AVX1: # %bb.0:
995 ; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
996 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
997 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
998 ; AVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1
999 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1000 ; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1001 ; AVX1-NEXT: vpsllw %xmm2, %xmm0, %xmm2
1002 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
1003 ; AVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm1
1004 ; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1005 ; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1006 ; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0
1007 ; AVX1-NEXT: retq
1008 ;
1009 ; AVX2-LABEL: splatvar_funnnel_v8i16:
1010 ; AVX2: # %bb.0:
1011 ; AVX2-NEXT: vpbroadcastw %xmm1, %xmm1
1012 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1013 ; AVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1
1014 ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1015 ; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1016 ; AVX2-NEXT: vpsllw %xmm2, %xmm0, %xmm2
1017 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
1018 ; AVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm1
1019 ; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1020 ; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1021 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
1022 ; AVX2-NEXT: retq
1023 ;
1024 ; AVX512-LABEL: splatvar_funnnel_v8i16:
1025 ; AVX512: # %bb.0:
1026 ; AVX512-NEXT: vpbroadcastw %xmm1, %xmm1
1027 ; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2
1028 ; AVX512-NEXT: vpsubw %xmm1, %xmm2, %xmm1
1029 ; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1030 ; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1031 ; AVX512-NEXT: vpsllw %xmm2, %xmm0, %xmm2
1032 ; AVX512-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16]
1033 ; AVX512-NEXT: vpsubw %xmm1, %xmm3, %xmm1
1034 ; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1035 ; AVX512-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1036 ; AVX512-NEXT: vpor %xmm0, %xmm2, %xmm0
1037 ; AVX512-NEXT: retq
1038 ;
1039 ; XOPAVX1-LABEL: splatvar_funnnel_v8i16:
1040 ; XOPAVX1: # %bb.0:
1041 ; XOPAVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
1042 ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1043 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1044 ; XOPAVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1
1045 ; XOPAVX1-NEXT: vprotw %xmm1, %xmm0, %xmm0
1046 ; XOPAVX1-NEXT: retq
1047 ;
1048 ; XOPAVX2-LABEL: splatvar_funnnel_v8i16:
1049 ; XOPAVX2: # %bb.0:
1050 ; XOPAVX2-NEXT: vpbroadcastw %xmm1, %xmm1
1051 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1052 ; XOPAVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1
1053 ; XOPAVX2-NEXT: vprotw %xmm1, %xmm0, %xmm0
1054 ; XOPAVX2-NEXT: retq
1055 ;
1056 ; X32-SSE-LABEL: splatvar_funnnel_v8i16:
1057 ; X32-SSE: # %bb.0:
1058 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
1059 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1060 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
1061 ; X32-SSE-NEXT: psubw %xmm1, %xmm2
1062 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2
1063 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16]
1064 ; X32-SSE-NEXT: psubw %xmm2, %xmm1
1065 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1]
1066 ; X32-SSE-NEXT: psrldq {{.*#+}} xmm2 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1067 ; X32-SSE-NEXT: movdqa %xmm0, %xmm3
1068 ; X32-SSE-NEXT: psllw %xmm2, %xmm3
1069 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1]
1070 ; X32-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1071 ; X32-SSE-NEXT: psrlw %xmm1, %xmm0
1072 ; X32-SSE-NEXT: por %xmm3, %xmm0
1073 ; X32-SSE-NEXT: retl
1074 %splat = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> zeroinitializer
1075 %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> %splat)
1076 ret <8 x i16> %res
1077 }
1079 define <16 x i8> @splatvar_funnnel_v16i8(<16 x i8> %x, <16 x i8> %amt) nounwind {
1080 ; SSE2-LABEL: splatvar_funnnel_v16i8:
1081 ; SSE2: # %bb.0:
1082 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1083 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
1084 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1085 ; SSE2-NEXT: pxor %xmm2, %xmm2
1086 ; SSE2-NEXT: psubb %xmm1, %xmm2
1087 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm2
1088 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1089 ; SSE2-NEXT: psubb %xmm2, %xmm3
1090 ; SSE2-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0]
1091 ; SSE2-NEXT: psrldq {{.*#+}} xmm2 = xmm2[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1092 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1093 ; SSE2-NEXT: psllw %xmm2, %xmm1
1094 ; SSE2-NEXT: pcmpeqd %xmm4, %xmm4
1095 ; SSE2-NEXT: pcmpeqd %xmm5, %xmm5
1096 ; SSE2-NEXT: psllw %xmm2, %xmm5
1097 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1098 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm5[0,0,2,3,4,5,6,7]
1099 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]
1100 ; SSE2-NEXT: pand %xmm2, %xmm1
1101 ; SSE2-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0]
1102 ; SSE2-NEXT: psrldq {{.*#+}} xmm3 = xmm3[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1103 ; SSE2-NEXT: psrlw %xmm3, %xmm0
1104 ; SSE2-NEXT: psrlw %xmm3, %xmm4
1105 ; SSE2-NEXT: psrlw $8, %xmm4
1106 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1107 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm4[0,0,2,3,4,5,6,7]
1108 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]
1109 ; SSE2-NEXT: pand %xmm0, %xmm2
1110 ; SSE2-NEXT: por %xmm2, %xmm1
1111 ; SSE2-NEXT: movdqa %xmm1, %xmm0
1112 ; SSE2-NEXT: retq
1113 ;
1114 ; SSE41-LABEL: splatvar_funnnel_v16i8:
1115 ; SSE41: # %bb.0:
1116 ; SSE41-NEXT: pxor %xmm2, %xmm2
1117 ; SSE41-NEXT: pshufb %xmm2, %xmm1
1118 ; SSE41-NEXT: pxor %xmm3, %xmm3
1119 ; SSE41-NEXT: psubb %xmm1, %xmm3
1120 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm3
1121 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm4 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero
1122 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1123 ; SSE41-NEXT: psllw %xmm4, %xmm1
1124 ; SSE41-NEXT: pcmpeqd %xmm5, %xmm5
1125 ; SSE41-NEXT: pcmpeqd %xmm6, %xmm6
1126 ; SSE41-NEXT: psllw %xmm4, %xmm6
1127 ; SSE41-NEXT: pshufb %xmm2, %xmm6
1128 ; SSE41-NEXT: pand %xmm6, %xmm1
1129 ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1130 ; SSE41-NEXT: psubb %xmm3, %xmm2
1131 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero
1132 ; SSE41-NEXT: psrlw %xmm2, %xmm0
1133 ; SSE41-NEXT: psrlw %xmm2, %xmm5
1134 ; SSE41-NEXT: pshufb {{.*#+}} xmm5 = xmm5[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1135 ; SSE41-NEXT: pand %xmm0, %xmm5
1136 ; SSE41-NEXT: por %xmm5, %xmm1
1137 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1138 ; SSE41-NEXT: retq
1139 ;
1140 ; AVX1-LABEL: splatvar_funnnel_v16i8:
1141 ; AVX1: # %bb.0:
1142 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1143 ; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1144 ; AVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1145 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1146 ; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1147 ; AVX1-NEXT: vpsllw %xmm3, %xmm0, %xmm4
1148 ; AVX1-NEXT: vpcmpeqd %xmm5, %xmm5, %xmm5
1149 ; AVX1-NEXT: vpsllw %xmm3, %xmm5, %xmm3
1150 ; AVX1-NEXT: vpshufb %xmm2, %xmm3, %xmm2
1151 ; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm2
1152 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1153 ; AVX1-NEXT: vpsubb %xmm1, %xmm3, %xmm1
1154 ; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1155 ; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1156 ; AVX1-NEXT: vpsrlw %xmm1, %xmm5, %xmm1
1157 ; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
1158 ; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0
1159 ; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0
1160 ; AVX1-NEXT: retq
1161 ;
1162 ; AVX2-LABEL: splatvar_funnnel_v16i8:
1163 ; AVX2: # %bb.0:
1164 ; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1165 ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1166 ; AVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1167 ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1168 ; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1169 ; AVX2-NEXT: vpsllw %xmm2, %xmm0, %xmm3
1170 ; AVX2-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4
1171 ; AVX2-NEXT: vpsllw %xmm2, %xmm4, %xmm2
1172 ; AVX2-NEXT: vpbroadcastb %xmm2, %xmm2
1173 ; AVX2-NEXT: vpand %xmm2, %xmm3, %xmm2
1174 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1175 ; AVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm1
1176 ; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1177 ; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0
1178 ; AVX2-NEXT: vpsrlw %xmm1, %xmm4, %xmm1
1179 ; AVX2-NEXT: vpsrlw $8, %xmm1, %xmm1
1180 ; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1181 ; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
1182 ; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
1183 ; AVX2-NEXT: retq
1184 ;
1185 ; AVX512F-LABEL: splatvar_funnnel_v16i8:
1186 ; AVX512F: # %bb.0:
1187 ; AVX512F-NEXT: vpbroadcastb %xmm1, %xmm1
1188 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
1189 ; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm3
1190 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero
1191 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1192 ; AVX512F-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3
1193 ; AVX512F-NEXT: vpxor %xmm4, %xmm4, %xmm4
1194 ; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm1
1195 ; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1
1196 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
1197 ; AVX512F-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
1198 ; AVX512F-NEXT: vpord %zmm3, %zmm0, %zmm0
1199 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
1200 ; AVX512F-NEXT: vzeroupper
1201 ; AVX512F-NEXT: retq
1202 ;
1203 ; AVX512VL-LABEL: splatvar_funnnel_v16i8:
1204 ; AVX512VL: # %bb.0:
1205 ; AVX512VL-NEXT: vpbroadcastb %xmm1, %xmm1
1206 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
1207 ; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm3
1208 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero
1209 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1210 ; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3
1211 ; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4
1212 ; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm1
1213 ; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1
1214 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
1215 ; AVX512VL-NEXT: vpsllvd %zmm1, %zmm0, %zmm0
1216 ; AVX512VL-NEXT: vpord %zmm3, %zmm0, %zmm0
1217 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
1218 ; AVX512VL-NEXT: vzeroupper
1219 ; AVX512VL-NEXT: retq
1220 ;
1221 ; AVX512BW-LABEL: splatvar_funnnel_v16i8:
1222 ; AVX512BW: # %bb.0:
1223 ; AVX512BW-NEXT: vpbroadcastb %xmm1, %xmm1
1224 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1225 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
1226 ; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3
1227 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
1228 ; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3
1229 ; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4
1230 ; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1
1231 ; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1
1232 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
1233 ; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0
1234 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0
1235 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1236 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1237 ; AVX512BW-NEXT: vzeroupper
1238 ; AVX512BW-NEXT: retq
1239 ;
1240 ; AVX512VLBW-LABEL: splatvar_funnnel_v16i8:
1241 ; AVX512VLBW: # %bb.0:
1242 ; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %xmm1
1243 ; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7]
1244 ; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3
1245 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
1246 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1247 ; AVX512VLBW-NEXT: vpsrlvw %ymm3, %ymm0, %ymm3
1248 ; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4
1249 ; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1
1250 ; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1
1251 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
1252 ; AVX512VLBW-NEXT: vpsllvw %ymm1, %ymm0, %ymm0
1253 ; AVX512VLBW-NEXT: vpor %ymm3, %ymm0, %ymm0
1254 ; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0
1255 ; AVX512VLBW-NEXT: vzeroupper
1256 ; AVX512VLBW-NEXT: retq
1257 ;
1258 ; XOPAVX1-LABEL: splatvar_funnnel_v16i8:
1259 ; XOPAVX1: # %bb.0:
1260 ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1261 ; XOPAVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1
1262 ; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1263 ; XOPAVX1-NEXT: vprotb %xmm1, %xmm0, %xmm0
1264 ; XOPAVX1-NEXT: retq
1265 ;
1266 ; XOPAVX2-LABEL: splatvar_funnnel_v16i8:
1267 ; XOPAVX2: # %bb.0:
1268 ; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1
1269 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
1270 ; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1
1271 ; XOPAVX2-NEXT: vprotb %xmm1, %xmm0, %xmm0
1272 ; XOPAVX2-NEXT: retq
1273 ;
1274 ; X32-SSE-LABEL: splatvar_funnnel_v16i8:
1275 ; X32-SSE: # %bb.0:
1276 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1277 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7]
1278 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0]
1279 ; X32-SSE-NEXT: pxor %xmm2, %xmm2
1280 ; X32-SSE-NEXT: psubb %xmm1, %xmm2
1281 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2
1282 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
1283 ; X32-SSE-NEXT: psubb %xmm2, %xmm3
1284 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0]
1285 ; X32-SSE-NEXT: psrldq {{.*#+}} xmm2 = xmm2[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1286 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1287 ; X32-SSE-NEXT: psllw %xmm2, %xmm1
1288 ; X32-SSE-NEXT: pcmpeqd %xmm4, %xmm4
1289 ; X32-SSE-NEXT: pcmpeqd %xmm5, %xmm5
1290 ; X32-SSE-NEXT: psllw %xmm2, %xmm5
1291 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1292 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm5[0,0,2,3,4,5,6,7]
1293 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]
1294 ; X32-SSE-NEXT: pand %xmm2, %xmm1
1295 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0]
1296 ; X32-SSE-NEXT: psrldq {{.*#+}} xmm3 = xmm3[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1297 ; X32-SSE-NEXT: psrlw %xmm3, %xmm0
1298 ; X32-SSE-NEXT: psrlw %xmm3, %xmm4
1299 ; X32-SSE-NEXT: psrlw $8, %xmm4
1300 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1301 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm4[0,0,2,3,4,5,6,7]
1302 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0]
1303 ; X32-SSE-NEXT: pand %xmm0, %xmm2
1304 ; X32-SSE-NEXT: por %xmm2, %xmm1
1305 ; X32-SSE-NEXT: movdqa %xmm1, %xmm0
1306 ; X32-SSE-NEXT: retl
1307 %splat = shufflevector <16 x i8> %amt, <16 x i8> undef, <16 x i32> zeroinitializer
1308 %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %splat)
1309 ret <16 x i8> %res
1310 }
1312 ;
1313 ; Constant Shifts
1314 ;
1316 define <2 x i64> @constant_funnnel_v2i64(<2 x i64> %x) nounwind {
1317 ; SSE2-LABEL: constant_funnnel_v2i64:
1318 ; SSE2: # %bb.0:
1319 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1320 ; SSE2-NEXT: psrlq $4, %xmm1
1321 ; SSE2-NEXT: movdqa %xmm0, %xmm2
1322 ; SSE2-NEXT: psrlq $14, %xmm2
1323 ; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm1[0],xmm2[1]
1324 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1325 ; SSE2-NEXT: psllq $60, %xmm1
1326 ; SSE2-NEXT: psllq $50, %xmm0
1327 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1328 ; SSE2-NEXT: orpd %xmm2, %xmm0
1329 ; SSE2-NEXT: retq
1330 ;
1331 ; SSE41-LABEL: constant_funnnel_v2i64:
1332 ; SSE41: # %bb.0:
1333 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1334 ; SSE41-NEXT: psrlq $14, %xmm1
1335 ; SSE41-NEXT: movdqa %xmm0, %xmm2
1336 ; SSE41-NEXT: psrlq $4, %xmm2
1337 ; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm1[4,5,6,7]
1338 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1339 ; SSE41-NEXT: psllq $50, %xmm1
1340 ; SSE41-NEXT: psllq $60, %xmm0
1341 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
1342 ; SSE41-NEXT: por %xmm2, %xmm0
1343 ; SSE41-NEXT: retq
1344 ;
1345 ; AVX1-LABEL: constant_funnnel_v2i64:
1346 ; AVX1: # %bb.0:
1347 ; AVX1-NEXT: vpsrlq $14, %xmm0, %xmm1
1348 ; AVX1-NEXT: vpsrlq $4, %xmm0, %xmm2
1349 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
1350 ; AVX1-NEXT: vpsllq $50, %xmm0, %xmm2
1351 ; AVX1-NEXT: vpsllq $60, %xmm0, %xmm0
1352 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
1353 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1354 ; AVX1-NEXT: retq
1355 ;
1356 ; AVX2-LABEL: constant_funnnel_v2i64:
1357 ; AVX2: # %bb.0:
1358 ; AVX2-NEXT: vpsrlvq {{.*}}(%rip), %xmm0, %xmm1
1359 ; AVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0
1360 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1361 ; AVX2-NEXT: retq
1362 ;
1363 ; AVX512F-LABEL: constant_funnnel_v2i64:
1364 ; AVX512F: # %bb.0:
1365 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1366 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = [4,14]
1367 ; AVX512F-NEXT: vprorvq %zmm1, %zmm0, %zmm0
1368 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1369 ; AVX512F-NEXT: vzeroupper
1370 ; AVX512F-NEXT: retq
1371 ;
1372 ; AVX512VL-LABEL: constant_funnnel_v2i64:
1373 ; AVX512VL: # %bb.0:
1374 ; AVX512VL-NEXT: vprorvq {{.*}}(%rip), %xmm0, %xmm0
1375 ; AVX512VL-NEXT: retq
1376 ;
1377 ; AVX512BW-LABEL: constant_funnnel_v2i64:
1378 ; AVX512BW: # %bb.0:
1379 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1380 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [4,14]
1381 ; AVX512BW-NEXT: vprorvq %zmm1, %zmm0, %zmm0
1382 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1383 ; AVX512BW-NEXT: vzeroupper
1384 ; AVX512BW-NEXT: retq
1385 ;
1386 ; AVX512VLBW-LABEL: constant_funnnel_v2i64:
1387 ; AVX512VLBW: # %bb.0:
1388 ; AVX512VLBW-NEXT: vprorvq {{.*}}(%rip), %xmm0, %xmm0
1389 ; AVX512VLBW-NEXT: retq
1390 ;
1391 ; XOP-LABEL: constant_funnnel_v2i64:
1392 ; XOP: # %bb.0:
1393 ; XOP-NEXT: vprotq {{.*}}(%rip), %xmm0, %xmm0
1394 ; XOP-NEXT: retq
1395 ;
1396 ; X32-SSE-LABEL: constant_funnnel_v2i64:
1397 ; X32-SSE: # %bb.0:
1398 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1399 ; X32-SSE-NEXT: psrlq $4, %xmm1
1400 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
1401 ; X32-SSE-NEXT: psrlq $14, %xmm2
1402 ; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm1[0],xmm2[1]
1403 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1404 ; X32-SSE-NEXT: psllq $60, %xmm1
1405 ; X32-SSE-NEXT: psllq $50, %xmm0
1406 ; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
1407 ; X32-SSE-NEXT: orpd %xmm2, %xmm0
1408 ; X32-SSE-NEXT: retl
1409 %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> <i64 4, i64 14>)
1410 ret <2 x i64> %res
1411 }
1413 define <4 x i32> @constant_funnnel_v4i32(<4 x i32> %x) nounwind {
1414 ; SSE2-LABEL: constant_funnnel_v4i32:
1415 ; SSE2: # %bb.0:
1416 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432]
1417 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1418 ; SSE2-NEXT: pmuludq %xmm1, %xmm0
1419 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
1420 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
1421 ; SSE2-NEXT: pmuludq %xmm2, %xmm1
1422 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
1423 ; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
1424 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1425 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1426 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1427 ; SSE2-NEXT: por %xmm3, %xmm0
1428 ; SSE2-NEXT: retq
1429 ;
1430 ; SSE41-LABEL: constant_funnnel_v4i32:
1431 ; SSE41: # %bb.0:
1432 ; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432]
1433 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
1434 ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1435 ; SSE41-NEXT: pmuludq %xmm2, %xmm3
1436 ; SSE41-NEXT: pmuludq %xmm1, %xmm0
1437 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1438 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7]
1439 ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2]
1440 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
1441 ; SSE41-NEXT: por %xmm1, %xmm0
1442 ; SSE41-NEXT: retq
1443 ;
1444 ; AVX1-LABEL: constant_funnnel_v4i32:
1445 ; AVX1: # %bb.0:
1446 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432]
1447 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3]
1448 ; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1449 ; AVX1-NEXT: vpmuludq %xmm2, %xmm3, %xmm2
1450 ; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
1451 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1452 ; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7]
1453 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2]
1454 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
1455 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1456 ; AVX1-NEXT: retq
1457 ;
1458 ; AVX2-LABEL: constant_funnnel_v4i32:
1459 ; AVX2: # %bb.0:
1460 ; AVX2-NEXT: vpsrlvd {{.*}}(%rip), %xmm0, %xmm1
1461 ; AVX2-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0
1462 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1463 ; AVX2-NEXT: retq
1464 ;
1465 ; AVX512F-LABEL: constant_funnnel_v4i32:
1466 ; AVX512F: # %bb.0:
1467 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1468 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = [4,5,6,7]
1469 ; AVX512F-NEXT: vprorvd %zmm1, %zmm0, %zmm0
1470 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1471 ; AVX512F-NEXT: vzeroupper
1472 ; AVX512F-NEXT: retq
1473 ;
1474 ; AVX512VL-LABEL: constant_funnnel_v4i32:
1475 ; AVX512VL: # %bb.0:
1476 ; AVX512VL-NEXT: vprorvd {{.*}}(%rip), %xmm0, %xmm0
1477 ; AVX512VL-NEXT: retq
1478 ;
1479 ; AVX512BW-LABEL: constant_funnnel_v4i32:
1480 ; AVX512BW: # %bb.0:
1481 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1482 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [4,5,6,7]
1483 ; AVX512BW-NEXT: vprorvd %zmm1, %zmm0, %zmm0
1484 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1485 ; AVX512BW-NEXT: vzeroupper
1486 ; AVX512BW-NEXT: retq
1487 ;
1488 ; AVX512VLBW-LABEL: constant_funnnel_v4i32:
1489 ; AVX512VLBW: # %bb.0:
1490 ; AVX512VLBW-NEXT: vprorvd {{.*}}(%rip), %xmm0, %xmm0
1491 ; AVX512VLBW-NEXT: retq
1492 ;
1493 ; XOP-LABEL: constant_funnnel_v4i32:
1494 ; XOP: # %bb.0:
1495 ; XOP-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm0
1496 ; XOP-NEXT: retq
1497 ;
1498 ; X32-SSE-LABEL: constant_funnnel_v4i32:
1499 ; X32-SSE: # %bb.0:
1500 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432]
1501 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1502 ; X32-SSE-NEXT: pmuludq %xmm1, %xmm0
1503 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3]
1504 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
1505 ; X32-SSE-NEXT: pmuludq %xmm2, %xmm1
1506 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
1507 ; X32-SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
1508 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1509 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1510 ; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1511 ; X32-SSE-NEXT: por %xmm3, %xmm0
1512 ; X32-SSE-NEXT: retl
1513 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
1514 ret <4 x i32> %res
1515 }
1517 define <8 x i16> @constant_funnnel_v8i16(<8 x i16> %x) nounwind {
1518 ; SSE-LABEL: constant_funnnel_v8i16:
1519 ; SSE: # %bb.0:
1520 ; SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1521 ; SSE-NEXT: movdqa %xmm0, %xmm2
1522 ; SSE-NEXT: pmulhuw %xmm1, %xmm2
1523 ; SSE-NEXT: pmullw %xmm1, %xmm0
1524 ; SSE-NEXT: por %xmm2, %xmm0
1525 ; SSE-NEXT: retq
1526 ;
1527 ; AVX-LABEL: constant_funnnel_v8i16:
1528 ; AVX: # %bb.0:
1529 ; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1530 ; AVX-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2
1531 ; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm0
1532 ; AVX-NEXT: vpor %xmm2, %xmm0, %xmm0
1533 ; AVX-NEXT: retq
1534 ;
1535 ; AVX512F-LABEL: constant_funnnel_v8i16:
1536 ; AVX512F: # %bb.0:
1537 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1538 ; AVX512F-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2
1539 ; AVX512F-NEXT: vpmullw %xmm1, %xmm0, %xmm0
1540 ; AVX512F-NEXT: vpor %xmm2, %xmm0, %xmm0
1541 ; AVX512F-NEXT: retq
1542 ;
1543 ; AVX512VL-LABEL: constant_funnnel_v8i16:
1544 ; AVX512VL: # %bb.0:
1545 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1546 ; AVX512VL-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2
1547 ; AVX512VL-NEXT: vpmullw %xmm1, %xmm0, %xmm0
1548 ; AVX512VL-NEXT: vpor %xmm2, %xmm0, %xmm0
1549 ; AVX512VL-NEXT: retq
1550 ;
1551 ; AVX512BW-LABEL: constant_funnnel_v8i16:
1552 ; AVX512BW: # %bb.0:
1553 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1554 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [16,1,2,3,4,5,6,7]
1555 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm1
1556 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,15,14,13,12,11,10,9]
1557 ; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0
1558 ; AVX512BW-NEXT: vpor %xmm1, %xmm0, %xmm0
1559 ; AVX512BW-NEXT: vzeroupper
1560 ; AVX512BW-NEXT: retq
1561 ;
1562 ; AVX512VLBW-LABEL: constant_funnnel_v8i16:
1563 ; AVX512VLBW: # %bb.0:
1564 ; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %xmm0, %xmm1
1565 ; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %xmm0, %xmm0
1566 ; AVX512VLBW-NEXT: vpor %xmm1, %xmm0, %xmm0
1567 ; AVX512VLBW-NEXT: retq
1568 ;
1569 ; XOP-LABEL: constant_funnnel_v8i16:
1570 ; XOP: # %bb.0:
1571 ; XOP-NEXT: vprotw {{.*}}(%rip), %xmm0, %xmm0
1572 ; XOP-NEXT: retq
1573 ;
1574 ; X32-SSE-LABEL: constant_funnnel_v8i16:
1575 ; X32-SSE: # %bb.0:
1576 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512]
1577 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
1578 ; X32-SSE-NEXT: pmulhuw %xmm1, %xmm2
1579 ; X32-SSE-NEXT: pmullw %xmm1, %xmm0
1580 ; X32-SSE-NEXT: por %xmm2, %xmm0
1581 ; X32-SSE-NEXT: retl
1582 %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>)
1583 ret <8 x i16> %res
1584 }
1586 define <16 x i8> @constant_funnnel_v16i8(<16 x i8> %x) nounwind {
1587 ; SSE2-LABEL: constant_funnnel_v16i8:
1588 ; SSE2: # %bb.0:
1589 ; SSE2-NEXT: pxor %xmm1, %xmm1
1590 ; SSE2-NEXT: movdqa %xmm0, %xmm2
1591 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1592 ; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm2
1593 ; SSE2-NEXT: psrlw $8, %xmm2
1594 ; SSE2-NEXT: movdqa %xmm0, %xmm3
1595 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
1596 ; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm3
1597 ; SSE2-NEXT: psrlw $8, %xmm3
1598 ; SSE2-NEXT: packuswb %xmm2, %xmm3
1599 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1600 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
1601 ; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm1
1602 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1603 ; SSE2-NEXT: pand %xmm2, %xmm1
1604 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1605 ; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm0
1606 ; SSE2-NEXT: pand %xmm2, %xmm0
1607 ; SSE2-NEXT: packuswb %xmm1, %xmm0
1608 ; SSE2-NEXT: por %xmm3, %xmm0
1609 ; SSE2-NEXT: retq
1610 ;
1611 ; SSE41-LABEL: constant_funnnel_v16i8:
1612 ; SSE41: # %bb.0:
1613 ; SSE41-NEXT: movdqa %xmm0, %xmm2
1614 ; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15]
1615 ; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm2
1616 ; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
1617 ; SSE41-NEXT: pand %xmm3, %xmm2
1618 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1619 ; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [1,128,64,32,16,8,4,2]
1620 ; SSE41-NEXT: pmullw %xmm1, %xmm4
1621 ; SSE41-NEXT: pand %xmm3, %xmm4
1622 ; SSE41-NEXT: packuswb %xmm2, %xmm4
1623 ; SSE41-NEXT: pxor %xmm2, %xmm2
1624 ; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15]
1625 ; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm0
1626 ; SSE41-NEXT: psrlw $8, %xmm0
1627 ; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm1
1628 ; SSE41-NEXT: psrlw $8, %xmm1
1629 ; SSE41-NEXT: packuswb %xmm0, %xmm1
1630 ; SSE41-NEXT: por %xmm4, %xmm1
1631 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1632 ; SSE41-NEXT: retq
1633 ;
1634 ; AVX1-LABEL: constant_funnnel_v16i8:
1635 ; AVX1: # %bb.0:
1636 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
1637 ; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm1, %xmm1
1638 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1639 ; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1
1640 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1641 ; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm3, %xmm4
1642 ; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm2
1643 ; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1
1644 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1645 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15]
1646 ; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0
1647 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0
1648 ; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm3, %xmm2
1649 ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2
1650 ; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0
1651 ; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
1652 ; AVX1-NEXT: retq
1653 ;
1654 ; AVX2-LABEL: constant_funnnel_v16i8:
1655 ; AVX2: # %bb.0:
1656 ; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1657 ; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm1
1658 ; AVX2-NEXT: vpsrlw $8, %ymm1, %ymm1
1659 ; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
1660 ; AVX2-NEXT: vpackuswb %xmm2, %xmm1, %xmm1
1661 ; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0
1662 ; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
1663 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
1664 ; AVX2-NEXT: vpackuswb %xmm2, %xmm0, %xmm0
1665 ; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1666 ; AVX2-NEXT: vzeroupper
1667 ; AVX2-NEXT: retq
1668 ;
1669 ; AVX512F-LABEL: constant_funnnel_v16i8:
1670 ; AVX512F: # %bb.0:
1671 ; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1672 ; AVX512F-NEXT: vpsrlvd {{.*}}(%rip), %zmm0, %zmm1
1673 ; AVX512F-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0
1674 ; AVX512F-NEXT: vpord %zmm1, %zmm0, %zmm0
1675 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0
1676 ; AVX512F-NEXT: vzeroupper
1677 ; AVX512F-NEXT: retq
1678 ;
1679 ; AVX512VL-LABEL: constant_funnnel_v16i8:
1680 ; AVX512VL: # %bb.0:
1681 ; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
1682 ; AVX512VL-NEXT: vpsrlvd {{.*}}(%rip), %zmm0, %zmm1
1683 ; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0
1684 ; AVX512VL-NEXT: vpord %zmm1, %zmm0, %zmm0
1685 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
1686 ; AVX512VL-NEXT: vzeroupper
1687 ; AVX512VL-NEXT: retq
1688 ;
1689 ; AVX512BW-LABEL: constant_funnnel_v16i8:
1690 ; AVX512BW: # %bb.0:
1691 ; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1]
1692 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1693 ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm1
1694 ; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7]
1695 ; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0
1696 ; AVX512BW-NEXT: vpor %ymm1, %ymm0, %ymm0
1697 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
1698 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
1699 ; AVX512BW-NEXT: vzeroupper
1700 ; AVX512BW-NEXT: retq
1701 ;
1702 ; AVX512VLBW-LABEL: constant_funnnel_v16i8:
1703 ; AVX512VLBW: # %bb.0:
1704 ; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
1705 ; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %ymm0, %ymm1
1706 ; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %ymm0, %ymm0
1707 ; AVX512VLBW-NEXT: vpor %ymm1, %ymm0, %ymm0
1708 ; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0
1709 ; AVX512VLBW-NEXT: vzeroupper
1710 ; AVX512VLBW-NEXT: retq
1711 ;
1712 ; XOP-LABEL: constant_funnnel_v16i8:
1713 ; XOP: # %bb.0:
1714 ; XOP-NEXT: vprotb {{.*}}(%rip), %xmm0, %xmm0
1715 ; XOP-NEXT: retq
1716 ;
1717 ; X32-SSE-LABEL: constant_funnnel_v16i8:
1718 ; X32-SSE: # %bb.0:
1719 ; X32-SSE-NEXT: pxor %xmm1, %xmm1
1720 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2
1721 ; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
1722 ; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm2
1723 ; X32-SSE-NEXT: psrlw $8, %xmm2
1724 ; X32-SSE-NEXT: movdqa %xmm0, %xmm3
1725 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
1726 ; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm3
1727 ; X32-SSE-NEXT: psrlw $8, %xmm3
1728 ; X32-SSE-NEXT: packuswb %xmm2, %xmm3
1729 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1730 ; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
1731 ; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm1
1732 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1733 ; X32-SSE-NEXT: pand %xmm2, %xmm1
1734 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1735 ; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm0
1736 ; X32-SSE-NEXT: pand %xmm2, %xmm0
1737 ; X32-SSE-NEXT: packuswb %xmm1, %xmm0
1738 ; X32-SSE-NEXT: por %xmm3, %xmm0
1739 ; X32-SSE-NEXT: retl
1740 %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1>)
1741 ret <16 x i8> %res
1742 }
1744 ;
1745 ; Uniform Constant Shifts
1746 ;
1748 define <2 x i64> @splatconstant_funnnel_v2i64(<2 x i64> %x) nounwind {
1749 ; SSE-LABEL: splatconstant_funnnel_v2i64:
1750 ; SSE: # %bb.0:
1751 ; SSE-NEXT: movdqa %xmm0, %xmm1
1752 ; SSE-NEXT: psrlq $14, %xmm1
1753 ; SSE-NEXT: psllq $50, %xmm0
1754 ; SSE-NEXT: por %xmm1, %xmm0
1755 ; SSE-NEXT: retq
1756 ;
1757 ; AVX-LABEL: splatconstant_funnnel_v2i64:
1758 ; AVX: # %bb.0:
1759 ; AVX-NEXT: vpsrlq $14, %xmm0, %xmm1
1760 ; AVX-NEXT: vpsllq $50, %xmm0, %xmm0
1761 ; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
1762 ; AVX-NEXT: retq
1763 ;
1764 ; AVX512F-LABEL: splatconstant_funnnel_v2i64:
1765 ; AVX512F: # %bb.0:
1766 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1767 ; AVX512F-NEXT: vprorq $14, %zmm0, %zmm0
1768 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1769 ; AVX512F-NEXT: vzeroupper
1770 ; AVX512F-NEXT: retq
1771 ;
1772 ; AVX512VL-LABEL: splatconstant_funnnel_v2i64:
1773 ; AVX512VL: # %bb.0:
1774 ; AVX512VL-NEXT: vprorq $14, %xmm0, %xmm0
1775 ; AVX512VL-NEXT: retq
1776 ;
1777 ; AVX512BW-LABEL: splatconstant_funnnel_v2i64:
1778 ; AVX512BW: # %bb.0:
1779 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1780 ; AVX512BW-NEXT: vprorq $14, %zmm0, %zmm0
1781 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1782 ; AVX512BW-NEXT: vzeroupper
1783 ; AVX512BW-NEXT: retq
1784 ;
1785 ; AVX512VLBW-LABEL: splatconstant_funnnel_v2i64:
1786 ; AVX512VLBW: # %bb.0:
1787 ; AVX512VLBW-NEXT: vprorq $14, %xmm0, %xmm0
1788 ; AVX512VLBW-NEXT: retq
1789 ;
1790 ; XOP-LABEL: splatconstant_funnnel_v2i64:
1791 ; XOP: # %bb.0:
1792 ; XOP-NEXT: vprotq $50, %xmm0, %xmm0
1793 ; XOP-NEXT: retq
1794 ;
1795 ; X32-SSE-LABEL: splatconstant_funnnel_v2i64:
1796 ; X32-SSE: # %bb.0:
1797 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1798 ; X32-SSE-NEXT: psrlq $14, %xmm1
1799 ; X32-SSE-NEXT: psllq $50, %xmm0
1800 ; X32-SSE-NEXT: por %xmm1, %xmm0
1801 ; X32-SSE-NEXT: retl
1802 %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> <i64 14, i64 14>)
1803 ret <2 x i64> %res
1804 }
1806 define <4 x i32> @splatconstant_funnnel_v4i32(<4 x i32> %x) nounwind {
1807 ; SSE-LABEL: splatconstant_funnnel_v4i32:
1808 ; SSE: # %bb.0:
1809 ; SSE-NEXT: movdqa %xmm0, %xmm1
1810 ; SSE-NEXT: psrld $4, %xmm1
1811 ; SSE-NEXT: pslld $28, %xmm0
1812 ; SSE-NEXT: por %xmm1, %xmm0
1813 ; SSE-NEXT: retq
1814 ;
1815 ; AVX-LABEL: splatconstant_funnnel_v4i32:
1816 ; AVX: # %bb.0:
1817 ; AVX-NEXT: vpsrld $4, %xmm0, %xmm1
1818 ; AVX-NEXT: vpslld $28, %xmm0, %xmm0
1819 ; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
1820 ; AVX-NEXT: retq
1821 ;
1822 ; AVX512F-LABEL: splatconstant_funnnel_v4i32:
1823 ; AVX512F: # %bb.0:
1824 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1825 ; AVX512F-NEXT: vprord $4, %zmm0, %zmm0
1826 ; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1827 ; AVX512F-NEXT: vzeroupper
1828 ; AVX512F-NEXT: retq
1829 ;
1830 ; AVX512VL-LABEL: splatconstant_funnnel_v4i32:
1831 ; AVX512VL: # %bb.0:
1832 ; AVX512VL-NEXT: vprord $4, %xmm0, %xmm0
1833 ; AVX512VL-NEXT: retq
1834 ;
1835 ; AVX512BW-LABEL: splatconstant_funnnel_v4i32:
1836 ; AVX512BW: # %bb.0:
1837 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0
1838 ; AVX512BW-NEXT: vprord $4, %zmm0, %zmm0
1839 ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1840 ; AVX512BW-NEXT: vzeroupper
1841 ; AVX512BW-NEXT: retq
1842 ;
1843 ; AVX512VLBW-LABEL: splatconstant_funnnel_v4i32:
1844 ; AVX512VLBW: # %bb.0:
1845 ; AVX512VLBW-NEXT: vprord $4, %xmm0, %xmm0
1846 ; AVX512VLBW-NEXT: retq
1847 ;
1848 ; XOP-LABEL: splatconstant_funnnel_v4i32:
1849 ; XOP: # %bb.0:
1850 ; XOP-NEXT: vprotd $28, %xmm0, %xmm0
1851 ; XOP-NEXT: retq
1852 ;
1853 ; X32-SSE-LABEL: splatconstant_funnnel_v4i32:
1854 ; X32-SSE: # %bb.0:
1855 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1856 ; X32-SSE-NEXT: psrld $4, %xmm1
1857 ; X32-SSE-NEXT: pslld $28, %xmm0
1858 ; X32-SSE-NEXT: por %xmm1, %xmm0
1859 ; X32-SSE-NEXT: retl
1860 %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> <i32 4, i32 4, i32 4, i32 4>)
1861 ret <4 x i32> %res
1862 }
1864 define <8 x i16> @splatconstant_funnnel_v8i16(<8 x i16> %x) nounwind {
1865 ; SSE-LABEL: splatconstant_funnnel_v8i16:
1866 ; SSE: # %bb.0:
1867 ; SSE-NEXT: movdqa %xmm0, %xmm1
1868 ; SSE-NEXT: psrlw $7, %xmm1
1869 ; SSE-NEXT: psllw $9, %xmm0
1870 ; SSE-NEXT: por %xmm1, %xmm0
1871 ; SSE-NEXT: retq
1872 ;
1873 ; AVX-LABEL: splatconstant_funnnel_v8i16:
1874 ; AVX: # %bb.0:
1875 ; AVX-NEXT: vpsrlw $7, %xmm0, %xmm1
1876 ; AVX-NEXT: vpsllw $9, %xmm0, %xmm0
1877 ; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
1878 ; AVX-NEXT: retq
1879 ;
1880 ; AVX512-LABEL: splatconstant_funnnel_v8i16:
1881 ; AVX512: # %bb.0:
1882 ; AVX512-NEXT: vpsrlw $7, %xmm0, %xmm1
1883 ; AVX512-NEXT: vpsllw $9, %xmm0, %xmm0
1884 ; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1885 ; AVX512-NEXT: retq
1886 ;
1887 ; XOP-LABEL: splatconstant_funnnel_v8i16:
1888 ; XOP: # %bb.0:
1889 ; XOP-NEXT: vprotw $9, %xmm0, %xmm0
1890 ; XOP-NEXT: retq
1891 ;
1892 ; X32-SSE-LABEL: splatconstant_funnnel_v8i16:
1893 ; X32-SSE: # %bb.0:
1894 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1895 ; X32-SSE-NEXT: psrlw $7, %xmm1
1896 ; X32-SSE-NEXT: psllw $9, %xmm0
1897 ; X32-SSE-NEXT: por %xmm1, %xmm0
1898 ; X32-SSE-NEXT: retl
1899 %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>)
1900 ret <8 x i16> %res
1901 }
1903 define <16 x i8> @splatconstant_funnnel_v16i8(<16 x i8> %x) nounwind {
1904 ; SSE-LABEL: splatconstant_funnnel_v16i8:
1905 ; SSE: # %bb.0:
1906 ; SSE-NEXT: movdqa %xmm0, %xmm1
1907 ; SSE-NEXT: psrlw $4, %xmm1
1908 ; SSE-NEXT: pand {{.*}}(%rip), %xmm1
1909 ; SSE-NEXT: psllw $4, %xmm0
1910 ; SSE-NEXT: pand {{.*}}(%rip), %xmm0
1911 ; SSE-NEXT: por %xmm1, %xmm0
1912 ; SSE-NEXT: retq
1913 ;
1914 ; AVX-LABEL: splatconstant_funnnel_v16i8:
1915 ; AVX: # %bb.0:
1916 ; AVX-NEXT: vpsrlw $4, %xmm0, %xmm1
1917 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1918 ; AVX-NEXT: vpsllw $4, %xmm0, %xmm0
1919 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
1920 ; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
1921 ; AVX-NEXT: retq
1922 ;
1923 ; AVX512-LABEL: splatconstant_funnnel_v16i8:
1924 ; AVX512: # %bb.0:
1925 ; AVX512-NEXT: vpsrlw $4, %xmm0, %xmm1
1926 ; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
1927 ; AVX512-NEXT: vpsllw $4, %xmm0, %xmm0
1928 ; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
1929 ; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1930 ; AVX512-NEXT: retq
1931 ;
1932 ; XOP-LABEL: splatconstant_funnnel_v16i8:
1933 ; XOP: # %bb.0:
1934 ; XOP-NEXT: vprotb $4, %xmm0, %xmm0
1935 ; XOP-NEXT: retq
1936 ;
1937 ; X32-SSE-LABEL: splatconstant_funnnel_v16i8:
1938 ; X32-SSE: # %bb.0:
1939 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1
1940 ; X32-SSE-NEXT: psrlw $4, %xmm1
1941 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1
1942 ; X32-SSE-NEXT: psllw $4, %xmm0
1943 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm0
1944 ; X32-SSE-NEXT: por %xmm1, %xmm0
1945 ; X32-SSE-NEXT: retl
1946 %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>)
1947 ret <16 x i8> %res
1948 }