1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
3 ; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
4 ; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
5 ; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
6 ; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW
7 ; RUN: llc < %s -x86-experimental-vector-widening-legalization -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512VL
13 define i64 @test_v2i64(<2 x i64> %a0) {
14 ; SSE-LABEL: test_v2i64:
16 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
17 ; SSE-NEXT: pxor %xmm0, %xmm1
18 ; SSE-NEXT: movq %xmm1, %rax
21 ; AVX-LABEL: test_v2i64:
23 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
24 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
25 ; AVX-NEXT: vmovq %xmm0, %rax
28 ; AVX512-LABEL: test_v2i64:
30 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
31 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
32 ; AVX512-NEXT: vmovq %xmm0, %rax
34 %1 = call i64 @llvm.experimental.vector.reduce.xor.i64.v2i64(<2 x i64> %a0)
38 define i64 @test_v4i64(<4 x i64> %a0) {
39 ; SSE-LABEL: test_v4i64:
41 ; SSE-NEXT: pxor %xmm1, %xmm0
42 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
43 ; SSE-NEXT: pxor %xmm0, %xmm1
44 ; SSE-NEXT: movq %xmm1, %rax
47 ; AVX1-LABEL: test_v4i64:
49 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
50 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
51 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
52 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
53 ; AVX1-NEXT: vmovq %xmm0, %rax
54 ; AVX1-NEXT: vzeroupper
57 ; AVX2-LABEL: test_v4i64:
59 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
60 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
61 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
62 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
63 ; AVX2-NEXT: vmovq %xmm0, %rax
64 ; AVX2-NEXT: vzeroupper
67 ; AVX512-LABEL: test_v4i64:
69 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
70 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
71 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
72 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
73 ; AVX512-NEXT: vmovq %xmm0, %rax
74 ; AVX512-NEXT: vzeroupper
76 %1 = call i64 @llvm.experimental.vector.reduce.xor.i64.v4i64(<4 x i64> %a0)
80 define i64 @test_v8i64(<8 x i64> %a0) {
81 ; SSE-LABEL: test_v8i64:
83 ; SSE-NEXT: pxor %xmm3, %xmm1
84 ; SSE-NEXT: pxor %xmm2, %xmm1
85 ; SSE-NEXT: pxor %xmm0, %xmm1
86 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
87 ; SSE-NEXT: pxor %xmm1, %xmm0
88 ; SSE-NEXT: movq %xmm0, %rax
91 ; AVX1-LABEL: test_v8i64:
93 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
94 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
95 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
96 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
97 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
98 ; AVX1-NEXT: vmovq %xmm0, %rax
99 ; AVX1-NEXT: vzeroupper
102 ; AVX2-LABEL: test_v8i64:
104 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
105 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
106 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
107 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
108 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
109 ; AVX2-NEXT: vmovq %xmm0, %rax
110 ; AVX2-NEXT: vzeroupper
113 ; AVX512-LABEL: test_v8i64:
115 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
116 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
117 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
118 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
119 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
120 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
121 ; AVX512-NEXT: vmovq %xmm0, %rax
122 ; AVX512-NEXT: vzeroupper
124 %1 = call i64 @llvm.experimental.vector.reduce.xor.i64.v8i64(<8 x i64> %a0)
128 define i64 @test_v16i64(<16 x i64> %a0) {
129 ; SSE-LABEL: test_v16i64:
131 ; SSE-NEXT: pxor %xmm6, %xmm2
132 ; SSE-NEXT: pxor %xmm7, %xmm3
133 ; SSE-NEXT: pxor %xmm5, %xmm3
134 ; SSE-NEXT: pxor %xmm1, %xmm3
135 ; SSE-NEXT: pxor %xmm4, %xmm2
136 ; SSE-NEXT: pxor %xmm3, %xmm2
137 ; SSE-NEXT: pxor %xmm0, %xmm2
138 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
139 ; SSE-NEXT: pxor %xmm2, %xmm0
140 ; SSE-NEXT: movq %xmm0, %rax
143 ; AVX1-LABEL: test_v16i64:
145 ; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1
146 ; AVX1-NEXT: vxorps %ymm1, %ymm2, %ymm1
147 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
148 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
149 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
150 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
151 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
152 ; AVX1-NEXT: vmovq %xmm0, %rax
153 ; AVX1-NEXT: vzeroupper
156 ; AVX2-LABEL: test_v16i64:
158 ; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1
159 ; AVX2-NEXT: vpxor %ymm1, %ymm2, %ymm1
160 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
161 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
162 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
163 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
164 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
165 ; AVX2-NEXT: vmovq %xmm0, %rax
166 ; AVX2-NEXT: vzeroupper
169 ; AVX512-LABEL: test_v16i64:
171 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
172 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
173 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
174 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
175 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
176 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
177 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
178 ; AVX512-NEXT: vmovq %xmm0, %rax
179 ; AVX512-NEXT: vzeroupper
181 %1 = call i64 @llvm.experimental.vector.reduce.xor.i64.v16i64(<16 x i64> %a0)
189 define i32 @test_v2i32(<2 x i32> %a0) {
190 ; SSE-LABEL: test_v2i32:
192 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
193 ; SSE-NEXT: pxor %xmm0, %xmm1
194 ; SSE-NEXT: movd %xmm1, %eax
197 ; AVX-LABEL: test_v2i32:
199 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
200 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
201 ; AVX-NEXT: vmovd %xmm0, %eax
204 ; AVX512-LABEL: test_v2i32:
206 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
207 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
208 ; AVX512-NEXT: vmovd %xmm0, %eax
210 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v2i32(<2 x i32> %a0)
214 define i32 @test_v4i32(<4 x i32> %a0) {
215 ; SSE-LABEL: test_v4i32:
217 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
218 ; SSE-NEXT: pxor %xmm0, %xmm1
219 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
220 ; SSE-NEXT: pxor %xmm1, %xmm0
221 ; SSE-NEXT: movd %xmm0, %eax
224 ; AVX-LABEL: test_v4i32:
226 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
227 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
228 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
229 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
230 ; AVX-NEXT: vmovd %xmm0, %eax
233 ; AVX512-LABEL: test_v4i32:
235 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
236 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
237 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
238 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
239 ; AVX512-NEXT: vmovd %xmm0, %eax
241 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v4i32(<4 x i32> %a0)
245 define i32 @test_v8i32(<8 x i32> %a0) {
246 ; SSE-LABEL: test_v8i32:
248 ; SSE-NEXT: pxor %xmm1, %xmm0
249 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
250 ; SSE-NEXT: pxor %xmm0, %xmm1
251 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
252 ; SSE-NEXT: pxor %xmm1, %xmm0
253 ; SSE-NEXT: movd %xmm0, %eax
256 ; AVX1-LABEL: test_v8i32:
258 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
259 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
260 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
261 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
262 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
263 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
264 ; AVX1-NEXT: vmovd %xmm0, %eax
265 ; AVX1-NEXT: vzeroupper
268 ; AVX2-LABEL: test_v8i32:
270 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
271 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
272 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
273 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
274 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
275 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
276 ; AVX2-NEXT: vmovd %xmm0, %eax
277 ; AVX2-NEXT: vzeroupper
280 ; AVX512-LABEL: test_v8i32:
282 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
283 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
284 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
285 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
286 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
287 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
288 ; AVX512-NEXT: vmovd %xmm0, %eax
289 ; AVX512-NEXT: vzeroupper
291 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v8i32(<8 x i32> %a0)
295 define i32 @test_v16i32(<16 x i32> %a0) {
296 ; SSE-LABEL: test_v16i32:
298 ; SSE-NEXT: pxor %xmm3, %xmm1
299 ; SSE-NEXT: pxor %xmm2, %xmm1
300 ; SSE-NEXT: pxor %xmm0, %xmm1
301 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
302 ; SSE-NEXT: pxor %xmm1, %xmm0
303 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
304 ; SSE-NEXT: pxor %xmm0, %xmm1
305 ; SSE-NEXT: movd %xmm1, %eax
308 ; AVX1-LABEL: test_v16i32:
310 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
311 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
312 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
313 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
314 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
315 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
316 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
317 ; AVX1-NEXT: vmovd %xmm0, %eax
318 ; AVX1-NEXT: vzeroupper
321 ; AVX2-LABEL: test_v16i32:
323 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
324 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
325 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
326 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
327 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
328 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
329 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
330 ; AVX2-NEXT: vmovd %xmm0, %eax
331 ; AVX2-NEXT: vzeroupper
334 ; AVX512-LABEL: test_v16i32:
336 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
337 ; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm0
338 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
339 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
340 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
341 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
342 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
343 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
344 ; AVX512-NEXT: vmovd %xmm0, %eax
345 ; AVX512-NEXT: vzeroupper
347 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v16i32(<16 x i32> %a0)
351 define i32 @test_v32i32(<32 x i32> %a0) {
352 ; SSE-LABEL: test_v32i32:
354 ; SSE-NEXT: pxor %xmm6, %xmm2
355 ; SSE-NEXT: pxor %xmm7, %xmm3
356 ; SSE-NEXT: pxor %xmm5, %xmm3
357 ; SSE-NEXT: pxor %xmm1, %xmm3
358 ; SSE-NEXT: pxor %xmm4, %xmm2
359 ; SSE-NEXT: pxor %xmm3, %xmm2
360 ; SSE-NEXT: pxor %xmm0, %xmm2
361 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
362 ; SSE-NEXT: pxor %xmm2, %xmm0
363 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
364 ; SSE-NEXT: pxor %xmm0, %xmm1
365 ; SSE-NEXT: movd %xmm1, %eax
368 ; AVX1-LABEL: test_v32i32:
370 ; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1
371 ; AVX1-NEXT: vxorps %ymm1, %ymm2, %ymm1
372 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
373 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
374 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
375 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
376 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
377 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
378 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
379 ; AVX1-NEXT: vmovd %xmm0, %eax
380 ; AVX1-NEXT: vzeroupper
383 ; AVX2-LABEL: test_v32i32:
385 ; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1
386 ; AVX2-NEXT: vpxor %ymm1, %ymm2, %ymm1
387 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
388 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
389 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
390 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
391 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
392 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
393 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
394 ; AVX2-NEXT: vmovd %xmm0, %eax
395 ; AVX2-NEXT: vzeroupper
398 ; AVX512-LABEL: test_v32i32:
400 ; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm0
401 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
402 ; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm0
403 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
404 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
405 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
406 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
407 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
408 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
409 ; AVX512-NEXT: vmovd %xmm0, %eax
410 ; AVX512-NEXT: vzeroupper
412 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v32i32(<32 x i32> %a0)
420 define i16 @test_v2i16(<2 x i16> %a0) {
421 ; SSE-LABEL: test_v2i16:
423 ; SSE-NEXT: movdqa %xmm0, %xmm1
424 ; SSE-NEXT: psrld $16, %xmm1
425 ; SSE-NEXT: pxor %xmm0, %xmm1
426 ; SSE-NEXT: movd %xmm1, %eax
427 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
430 ; AVX-LABEL: test_v2i16:
432 ; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
433 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
434 ; AVX-NEXT: vmovd %xmm0, %eax
435 ; AVX-NEXT: # kill: def $ax killed $ax killed $eax
438 ; AVX512-LABEL: test_v2i16:
440 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
441 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
442 ; AVX512-NEXT: vmovd %xmm0, %eax
443 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
445 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v2i16(<2 x i16> %a0)
449 define i16 @test_v4i16(<4 x i16> %a0) {
450 ; SSE-LABEL: test_v4i16:
452 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
453 ; SSE-NEXT: pxor %xmm0, %xmm1
454 ; SSE-NEXT: movdqa %xmm1, %xmm0
455 ; SSE-NEXT: psrld $16, %xmm0
456 ; SSE-NEXT: pxor %xmm1, %xmm0
457 ; SSE-NEXT: movd %xmm0, %eax
458 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
461 ; AVX-LABEL: test_v4i16:
463 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
464 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
465 ; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
466 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
467 ; AVX-NEXT: vmovd %xmm0, %eax
468 ; AVX-NEXT: # kill: def $ax killed $ax killed $eax
471 ; AVX512-LABEL: test_v4i16:
473 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
474 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
475 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
476 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
477 ; AVX512-NEXT: vmovd %xmm0, %eax
478 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
480 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v4i16(<4 x i16> %a0)
484 define i16 @test_v8i16(<8 x i16> %a0) {
485 ; SSE-LABEL: test_v8i16:
487 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
488 ; SSE-NEXT: pxor %xmm0, %xmm1
489 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
490 ; SSE-NEXT: pxor %xmm1, %xmm0
491 ; SSE-NEXT: movdqa %xmm0, %xmm1
492 ; SSE-NEXT: psrld $16, %xmm1
493 ; SSE-NEXT: pxor %xmm0, %xmm1
494 ; SSE-NEXT: movd %xmm1, %eax
495 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
498 ; AVX-LABEL: test_v8i16:
500 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
501 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
502 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
503 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
504 ; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
505 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
506 ; AVX-NEXT: vmovd %xmm0, %eax
507 ; AVX-NEXT: # kill: def $ax killed $ax killed $eax
510 ; AVX512-LABEL: test_v8i16:
512 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
513 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
514 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
515 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
516 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
517 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
518 ; AVX512-NEXT: vmovd %xmm0, %eax
519 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
521 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v8i16(<8 x i16> %a0)
525 define i16 @test_v16i16(<16 x i16> %a0) {
526 ; SSE-LABEL: test_v16i16:
528 ; SSE-NEXT: pxor %xmm1, %xmm0
529 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
530 ; SSE-NEXT: pxor %xmm0, %xmm1
531 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
532 ; SSE-NEXT: pxor %xmm1, %xmm0
533 ; SSE-NEXT: movdqa %xmm0, %xmm1
534 ; SSE-NEXT: psrld $16, %xmm1
535 ; SSE-NEXT: pxor %xmm0, %xmm1
536 ; SSE-NEXT: movd %xmm1, %eax
537 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
540 ; AVX1-LABEL: test_v16i16:
542 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
543 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
544 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
545 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
546 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
547 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
548 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
549 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
550 ; AVX1-NEXT: vmovd %xmm0, %eax
551 ; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
552 ; AVX1-NEXT: vzeroupper
555 ; AVX2-LABEL: test_v16i16:
557 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
558 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
559 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
560 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
561 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
562 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
563 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
564 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
565 ; AVX2-NEXT: vmovd %xmm0, %eax
566 ; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
567 ; AVX2-NEXT: vzeroupper
570 ; AVX512-LABEL: test_v16i16:
572 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
573 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
574 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
575 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
576 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
577 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
578 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
579 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
580 ; AVX512-NEXT: vmovd %xmm0, %eax
581 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
582 ; AVX512-NEXT: vzeroupper
584 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v16i16(<16 x i16> %a0)
588 define i16 @test_v32i16(<32 x i16> %a0) {
589 ; SSE-LABEL: test_v32i16:
591 ; SSE-NEXT: pxor %xmm3, %xmm1
592 ; SSE-NEXT: pxor %xmm2, %xmm1
593 ; SSE-NEXT: pxor %xmm0, %xmm1
594 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
595 ; SSE-NEXT: pxor %xmm1, %xmm0
596 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
597 ; SSE-NEXT: pxor %xmm0, %xmm1
598 ; SSE-NEXT: movdqa %xmm1, %xmm0
599 ; SSE-NEXT: psrld $16, %xmm0
600 ; SSE-NEXT: pxor %xmm1, %xmm0
601 ; SSE-NEXT: movd %xmm0, %eax
602 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
605 ; AVX1-LABEL: test_v32i16:
607 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
608 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
609 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
610 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
611 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
612 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
613 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
614 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
615 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
616 ; AVX1-NEXT: vmovd %xmm0, %eax
617 ; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
618 ; AVX1-NEXT: vzeroupper
621 ; AVX2-LABEL: test_v32i16:
623 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
624 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
625 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
626 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
627 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
628 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
629 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
630 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
631 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
632 ; AVX2-NEXT: vmovd %xmm0, %eax
633 ; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
634 ; AVX2-NEXT: vzeroupper
637 ; AVX512-LABEL: test_v32i16:
639 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
640 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
641 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
642 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
643 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
644 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
645 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
646 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
647 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
648 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
649 ; AVX512-NEXT: vmovd %xmm0, %eax
650 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
651 ; AVX512-NEXT: vzeroupper
653 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v32i16(<32 x i16> %a0)
657 define i16 @test_v64i16(<64 x i16> %a0) {
658 ; SSE-LABEL: test_v64i16:
660 ; SSE-NEXT: pxor %xmm6, %xmm2
661 ; SSE-NEXT: pxor %xmm7, %xmm3
662 ; SSE-NEXT: pxor %xmm5, %xmm3
663 ; SSE-NEXT: pxor %xmm1, %xmm3
664 ; SSE-NEXT: pxor %xmm4, %xmm2
665 ; SSE-NEXT: pxor %xmm3, %xmm2
666 ; SSE-NEXT: pxor %xmm0, %xmm2
667 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
668 ; SSE-NEXT: pxor %xmm2, %xmm0
669 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
670 ; SSE-NEXT: pxor %xmm0, %xmm1
671 ; SSE-NEXT: movdqa %xmm1, %xmm0
672 ; SSE-NEXT: psrld $16, %xmm0
673 ; SSE-NEXT: pxor %xmm1, %xmm0
674 ; SSE-NEXT: movd %xmm0, %eax
675 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
678 ; AVX1-LABEL: test_v64i16:
680 ; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1
681 ; AVX1-NEXT: vxorps %ymm1, %ymm2, %ymm1
682 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
683 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
684 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
685 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
686 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
687 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
688 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
689 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
690 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
691 ; AVX1-NEXT: vmovd %xmm0, %eax
692 ; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
693 ; AVX1-NEXT: vzeroupper
696 ; AVX2-LABEL: test_v64i16:
698 ; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1
699 ; AVX2-NEXT: vpxor %ymm1, %ymm2, %ymm1
700 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
701 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
702 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
703 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
704 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
705 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
706 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
707 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
708 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
709 ; AVX2-NEXT: vmovd %xmm0, %eax
710 ; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
711 ; AVX2-NEXT: vzeroupper
714 ; AVX512-LABEL: test_v64i16:
716 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
717 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
718 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
719 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
720 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
721 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
722 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
723 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
724 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
725 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
726 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
727 ; AVX512-NEXT: vmovd %xmm0, %eax
728 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
729 ; AVX512-NEXT: vzeroupper
731 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v64i16(<64 x i16> %a0)
739 define i8 @test_v2i8(<2 x i8> %a0) {
740 ; SSE2-LABEL: test_v2i8:
742 ; SSE2-NEXT: movdqa %xmm0, %xmm1
743 ; SSE2-NEXT: psrlw $8, %xmm1
744 ; SSE2-NEXT: pxor %xmm0, %xmm1
745 ; SSE2-NEXT: movd %xmm1, %eax
746 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
749 ; SSE41-LABEL: test_v2i8:
751 ; SSE41-NEXT: movdqa %xmm0, %xmm1
752 ; SSE41-NEXT: psrlw $8, %xmm1
753 ; SSE41-NEXT: pxor %xmm0, %xmm1
754 ; SSE41-NEXT: pextrb $0, %xmm1, %eax
755 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
758 ; AVX-LABEL: test_v2i8:
760 ; AVX-NEXT: vpsrlw $8, %xmm0, %xmm1
761 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
762 ; AVX-NEXT: vpextrb $0, %xmm0, %eax
763 ; AVX-NEXT: # kill: def $al killed $al killed $eax
766 ; AVX512-LABEL: test_v2i8:
768 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
769 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
770 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
771 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
773 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v2i8(<2 x i8> %a0)
777 define i8 @test_v4i8(<4 x i8> %a0) {
778 ; SSE2-LABEL: test_v4i8:
780 ; SSE2-NEXT: movdqa %xmm0, %xmm1
781 ; SSE2-NEXT: psrld $16, %xmm1
782 ; SSE2-NEXT: pxor %xmm0, %xmm1
783 ; SSE2-NEXT: movdqa %xmm1, %xmm0
784 ; SSE2-NEXT: psrlw $8, %xmm0
785 ; SSE2-NEXT: pxor %xmm1, %xmm0
786 ; SSE2-NEXT: movd %xmm0, %eax
787 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
790 ; SSE41-LABEL: test_v4i8:
792 ; SSE41-NEXT: movdqa %xmm0, %xmm1
793 ; SSE41-NEXT: psrld $16, %xmm1
794 ; SSE41-NEXT: pxor %xmm0, %xmm1
795 ; SSE41-NEXT: movdqa %xmm1, %xmm0
796 ; SSE41-NEXT: psrlw $8, %xmm0
797 ; SSE41-NEXT: pxor %xmm1, %xmm0
798 ; SSE41-NEXT: pextrb $0, %xmm0, %eax
799 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
802 ; AVX-LABEL: test_v4i8:
804 ; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
805 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
806 ; AVX-NEXT: vpsrlw $8, %xmm0, %xmm1
807 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
808 ; AVX-NEXT: vpextrb $0, %xmm0, %eax
809 ; AVX-NEXT: # kill: def $al killed $al killed $eax
812 ; AVX512-LABEL: test_v4i8:
814 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
815 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
816 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
817 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
818 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
819 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
821 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v4i8(<4 x i8> %a0)
825 define i8 @test_v8i8(<8 x i8> %a0) {
826 ; SSE2-LABEL: test_v8i8:
828 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
829 ; SSE2-NEXT: pxor %xmm0, %xmm1
830 ; SSE2-NEXT: movdqa %xmm1, %xmm0
831 ; SSE2-NEXT: psrld $16, %xmm0
832 ; SSE2-NEXT: pxor %xmm1, %xmm0
833 ; SSE2-NEXT: movdqa %xmm0, %xmm1
834 ; SSE2-NEXT: psrlw $8, %xmm1
835 ; SSE2-NEXT: pxor %xmm0, %xmm1
836 ; SSE2-NEXT: movd %xmm1, %eax
837 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
840 ; SSE41-LABEL: test_v8i8:
842 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
843 ; SSE41-NEXT: pxor %xmm0, %xmm1
844 ; SSE41-NEXT: movdqa %xmm1, %xmm0
845 ; SSE41-NEXT: psrld $16, %xmm0
846 ; SSE41-NEXT: pxor %xmm1, %xmm0
847 ; SSE41-NEXT: movdqa %xmm0, %xmm1
848 ; SSE41-NEXT: psrlw $8, %xmm1
849 ; SSE41-NEXT: pxor %xmm0, %xmm1
850 ; SSE41-NEXT: pextrb $0, %xmm1, %eax
851 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
854 ; AVX-LABEL: test_v8i8:
856 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
857 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
858 ; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
859 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
860 ; AVX-NEXT: vpsrlw $8, %xmm0, %xmm1
861 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
862 ; AVX-NEXT: vpextrb $0, %xmm0, %eax
863 ; AVX-NEXT: # kill: def $al killed $al killed $eax
866 ; AVX512-LABEL: test_v8i8:
868 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
869 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
870 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
871 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
872 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
873 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
874 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
875 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
877 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v8i8(<8 x i8> %a0)
881 define i8 @test_v16i8(<16 x i8> %a0) {
882 ; SSE2-LABEL: test_v16i8:
884 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
885 ; SSE2-NEXT: pxor %xmm0, %xmm1
886 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
887 ; SSE2-NEXT: pxor %xmm1, %xmm0
888 ; SSE2-NEXT: movdqa %xmm0, %xmm1
889 ; SSE2-NEXT: psrld $16, %xmm1
890 ; SSE2-NEXT: pxor %xmm0, %xmm1
891 ; SSE2-NEXT: movdqa %xmm1, %xmm0
892 ; SSE2-NEXT: psrlw $8, %xmm0
893 ; SSE2-NEXT: pxor %xmm1, %xmm0
894 ; SSE2-NEXT: movd %xmm0, %eax
895 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
898 ; SSE41-LABEL: test_v16i8:
900 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
901 ; SSE41-NEXT: pxor %xmm0, %xmm1
902 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
903 ; SSE41-NEXT: pxor %xmm1, %xmm0
904 ; SSE41-NEXT: movdqa %xmm0, %xmm1
905 ; SSE41-NEXT: psrld $16, %xmm1
906 ; SSE41-NEXT: pxor %xmm0, %xmm1
907 ; SSE41-NEXT: movdqa %xmm1, %xmm0
908 ; SSE41-NEXT: psrlw $8, %xmm0
909 ; SSE41-NEXT: pxor %xmm1, %xmm0
910 ; SSE41-NEXT: pextrb $0, %xmm0, %eax
911 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
914 ; AVX-LABEL: test_v16i8:
916 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
917 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
918 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
919 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
920 ; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
921 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
922 ; AVX-NEXT: vpsrlw $8, %xmm0, %xmm1
923 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
924 ; AVX-NEXT: vpextrb $0, %xmm0, %eax
925 ; AVX-NEXT: # kill: def $al killed $al killed $eax
928 ; AVX512-LABEL: test_v16i8:
930 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
931 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
932 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
933 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
934 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
935 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
936 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
937 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
938 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
939 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
941 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v16i8(<16 x i8> %a0)
945 define i8 @test_v32i8(<32 x i8> %a0) {
946 ; SSE2-LABEL: test_v32i8:
948 ; SSE2-NEXT: pxor %xmm1, %xmm0
949 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
950 ; SSE2-NEXT: pxor %xmm0, %xmm1
951 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
952 ; SSE2-NEXT: pxor %xmm1, %xmm0
953 ; SSE2-NEXT: movdqa %xmm0, %xmm1
954 ; SSE2-NEXT: psrld $16, %xmm1
955 ; SSE2-NEXT: pxor %xmm0, %xmm1
956 ; SSE2-NEXT: movdqa %xmm1, %xmm0
957 ; SSE2-NEXT: psrlw $8, %xmm0
958 ; SSE2-NEXT: pxor %xmm1, %xmm0
959 ; SSE2-NEXT: movd %xmm0, %eax
960 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
963 ; SSE41-LABEL: test_v32i8:
965 ; SSE41-NEXT: pxor %xmm1, %xmm0
966 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
967 ; SSE41-NEXT: pxor %xmm0, %xmm1
968 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
969 ; SSE41-NEXT: pxor %xmm1, %xmm0
970 ; SSE41-NEXT: movdqa %xmm0, %xmm1
971 ; SSE41-NEXT: psrld $16, %xmm1
972 ; SSE41-NEXT: pxor %xmm0, %xmm1
973 ; SSE41-NEXT: movdqa %xmm1, %xmm0
974 ; SSE41-NEXT: psrlw $8, %xmm0
975 ; SSE41-NEXT: pxor %xmm1, %xmm0
976 ; SSE41-NEXT: pextrb $0, %xmm0, %eax
977 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
980 ; AVX1-LABEL: test_v32i8:
982 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
983 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
984 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
985 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
986 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
987 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
988 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
989 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
990 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
991 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
992 ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
993 ; AVX1-NEXT: # kill: def $al killed $al killed $eax
994 ; AVX1-NEXT: vzeroupper
997 ; AVX2-LABEL: test_v32i8:
999 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1000 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1001 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1002 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1003 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1004 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1005 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
1006 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1007 ; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
1008 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1009 ; AVX2-NEXT: vpextrb $0, %xmm0, %eax
1010 ; AVX2-NEXT: # kill: def $al killed $al killed $eax
1011 ; AVX2-NEXT: vzeroupper
1014 ; AVX512-LABEL: test_v32i8:
1016 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
1017 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1018 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1019 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1020 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1021 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1022 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
1023 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1024 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
1025 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1026 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
1027 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
1028 ; AVX512-NEXT: vzeroupper
1030 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v32i8(<32 x i8> %a0)
1034 define i8 @test_v64i8(<64 x i8> %a0) {
1035 ; SSE2-LABEL: test_v64i8:
1037 ; SSE2-NEXT: pxor %xmm3, %xmm1
1038 ; SSE2-NEXT: pxor %xmm2, %xmm1
1039 ; SSE2-NEXT: pxor %xmm0, %xmm1
1040 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
1041 ; SSE2-NEXT: pxor %xmm1, %xmm0
1042 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1043 ; SSE2-NEXT: pxor %xmm0, %xmm1
1044 ; SSE2-NEXT: movdqa %xmm1, %xmm0
1045 ; SSE2-NEXT: psrld $16, %xmm0
1046 ; SSE2-NEXT: pxor %xmm1, %xmm0
1047 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1048 ; SSE2-NEXT: psrlw $8, %xmm1
1049 ; SSE2-NEXT: pxor %xmm0, %xmm1
1050 ; SSE2-NEXT: movd %xmm1, %eax
1051 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
1054 ; SSE41-LABEL: test_v64i8:
1056 ; SSE41-NEXT: pxor %xmm3, %xmm1
1057 ; SSE41-NEXT: pxor %xmm2, %xmm1
1058 ; SSE41-NEXT: pxor %xmm0, %xmm1
1059 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
1060 ; SSE41-NEXT: pxor %xmm1, %xmm0
1061 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1062 ; SSE41-NEXT: pxor %xmm0, %xmm1
1063 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1064 ; SSE41-NEXT: psrld $16, %xmm0
1065 ; SSE41-NEXT: pxor %xmm1, %xmm0
1066 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1067 ; SSE41-NEXT: psrlw $8, %xmm1
1068 ; SSE41-NEXT: pxor %xmm0, %xmm1
1069 ; SSE41-NEXT: pextrb $0, %xmm1, %eax
1070 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
1073 ; AVX1-LABEL: test_v64i8:
1075 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
1076 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1077 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1078 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
1079 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1080 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
1081 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1082 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
1083 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
1084 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
1085 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
1086 ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
1087 ; AVX1-NEXT: # kill: def $al killed $al killed $eax
1088 ; AVX1-NEXT: vzeroupper
1091 ; AVX2-LABEL: test_v64i8:
1093 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
1094 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1095 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1096 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1097 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1098 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1099 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1100 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
1101 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1102 ; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
1103 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1104 ; AVX2-NEXT: vpextrb $0, %xmm0, %eax
1105 ; AVX2-NEXT: # kill: def $al killed $al killed $eax
1106 ; AVX2-NEXT: vzeroupper
1109 ; AVX512-LABEL: test_v64i8:
1111 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
1112 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
1113 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
1114 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1115 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1116 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1117 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1118 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1119 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
1120 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1121 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
1122 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1123 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
1124 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
1125 ; AVX512-NEXT: vzeroupper
1127 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v64i8(<64 x i8> %a0)
1131 define i8 @test_v128i8(<128 x i8> %a0) {
1132 ; SSE2-LABEL: test_v128i8:
1134 ; SSE2-NEXT: pxor %xmm6, %xmm2
1135 ; SSE2-NEXT: pxor %xmm7, %xmm3
1136 ; SSE2-NEXT: pxor %xmm5, %xmm3
1137 ; SSE2-NEXT: pxor %xmm1, %xmm3
1138 ; SSE2-NEXT: pxor %xmm4, %xmm2
1139 ; SSE2-NEXT: pxor %xmm3, %xmm2
1140 ; SSE2-NEXT: pxor %xmm0, %xmm2
1141 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
1142 ; SSE2-NEXT: pxor %xmm2, %xmm0
1143 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1144 ; SSE2-NEXT: pxor %xmm0, %xmm1
1145 ; SSE2-NEXT: movdqa %xmm1, %xmm0
1146 ; SSE2-NEXT: psrld $16, %xmm0
1147 ; SSE2-NEXT: pxor %xmm1, %xmm0
1148 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1149 ; SSE2-NEXT: psrlw $8, %xmm1
1150 ; SSE2-NEXT: pxor %xmm0, %xmm1
1151 ; SSE2-NEXT: movd %xmm1, %eax
1152 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
1155 ; SSE41-LABEL: test_v128i8:
1157 ; SSE41-NEXT: pxor %xmm6, %xmm2
1158 ; SSE41-NEXT: pxor %xmm7, %xmm3
1159 ; SSE41-NEXT: pxor %xmm5, %xmm3
1160 ; SSE41-NEXT: pxor %xmm1, %xmm3
1161 ; SSE41-NEXT: pxor %xmm4, %xmm2
1162 ; SSE41-NEXT: pxor %xmm3, %xmm2
1163 ; SSE41-NEXT: pxor %xmm0, %xmm2
1164 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
1165 ; SSE41-NEXT: pxor %xmm2, %xmm0
1166 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1167 ; SSE41-NEXT: pxor %xmm0, %xmm1
1168 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1169 ; SSE41-NEXT: psrld $16, %xmm0
1170 ; SSE41-NEXT: pxor %xmm1, %xmm0
1171 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1172 ; SSE41-NEXT: psrlw $8, %xmm1
1173 ; SSE41-NEXT: pxor %xmm0, %xmm1
1174 ; SSE41-NEXT: pextrb $0, %xmm1, %eax
1175 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
1178 ; AVX1-LABEL: test_v128i8:
1180 ; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1
1181 ; AVX1-NEXT: vxorps %ymm1, %ymm2, %ymm1
1182 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
1183 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1184 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1185 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
1186 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1187 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
1188 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1189 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
1190 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
1191 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
1192 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
1193 ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
1194 ; AVX1-NEXT: # kill: def $al killed $al killed $eax
1195 ; AVX1-NEXT: vzeroupper
1198 ; AVX2-LABEL: test_v128i8:
1200 ; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1
1201 ; AVX2-NEXT: vpxor %ymm1, %ymm2, %ymm1
1202 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
1203 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1204 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1205 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1206 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1207 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1208 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1209 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
1210 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1211 ; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
1212 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1213 ; AVX2-NEXT: vpextrb $0, %xmm0, %eax
1214 ; AVX2-NEXT: # kill: def $al killed $al killed $eax
1215 ; AVX2-NEXT: vzeroupper
1218 ; AVX512-LABEL: test_v128i8:
1220 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
1221 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
1222 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
1223 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
1224 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1225 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1226 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1227 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1228 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1229 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
1230 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1231 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
1232 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1233 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
1234 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
1235 ; AVX512-NEXT: vzeroupper
1237 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v128i8(<128 x i8> %a0)
1241 declare i64 @llvm.experimental.vector.reduce.xor.i64.v2i64(<2 x i64>)
1242 declare i64 @llvm.experimental.vector.reduce.xor.i64.v4i64(<4 x i64>)
1243 declare i64 @llvm.experimental.vector.reduce.xor.i64.v8i64(<8 x i64>)
1244 declare i64 @llvm.experimental.vector.reduce.xor.i64.v16i64(<16 x i64>)
1246 declare i32 @llvm.experimental.vector.reduce.xor.i32.v2i32(<2 x i32>)
1247 declare i32 @llvm.experimental.vector.reduce.xor.i32.v4i32(<4 x i32>)
1248 declare i32 @llvm.experimental.vector.reduce.xor.i32.v8i32(<8 x i32>)
1249 declare i32 @llvm.experimental.vector.reduce.xor.i32.v16i32(<16 x i32>)
1250 declare i32 @llvm.experimental.vector.reduce.xor.i32.v32i32(<32 x i32>)
1252 declare i16 @llvm.experimental.vector.reduce.xor.i16.v2i16(<2 x i16>)
1253 declare i16 @llvm.experimental.vector.reduce.xor.i16.v4i16(<4 x i16>)
1254 declare i16 @llvm.experimental.vector.reduce.xor.i16.v8i16(<8 x i16>)
1255 declare i16 @llvm.experimental.vector.reduce.xor.i16.v16i16(<16 x i16>)
1256 declare i16 @llvm.experimental.vector.reduce.xor.i16.v32i16(<32 x i16>)
1257 declare i16 @llvm.experimental.vector.reduce.xor.i16.v64i16(<64 x i16>)
1259 declare i8 @llvm.experimental.vector.reduce.xor.i8.v2i8(<2 x i8>)
1260 declare i8 @llvm.experimental.vector.reduce.xor.i8.v4i8(<4 x i8>)
1261 declare i8 @llvm.experimental.vector.reduce.xor.i8.v8i8(<8 x i8>)
1262 declare i8 @llvm.experimental.vector.reduce.xor.i8.v16i8(<16 x i8>)
1263 declare i8 @llvm.experimental.vector.reduce.xor.i8.v32i8(<32 x i8>)
1264 declare i8 @llvm.experimental.vector.reduce.xor.i8.v64i8(<64 x i8>)
1265 declare i8 @llvm.experimental.vector.reduce.xor.i8.v128i8(<128 x i8>)