| blob | 870fed03e265651def0bd2d3c779357651c9f947 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512VL
9 ;
10 ; vXi64
11 ;
13 define i64 @test_v2i64(<2 x i64> %a0) {
14 ; SSE-LABEL: test_v2i64:
15 ; SSE: # %bb.0:
16 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
17 ; SSE-NEXT: pxor %xmm0, %xmm1
18 ; SSE-NEXT: movq %xmm1, %rax
19 ; SSE-NEXT: retq
20 ;
21 ; AVX-LABEL: test_v2i64:
22 ; AVX: # %bb.0:
23 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
24 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
25 ; AVX-NEXT: vmovq %xmm0, %rax
26 ; AVX-NEXT: retq
27 ;
28 ; AVX512-LABEL: test_v2i64:
29 ; AVX512: # %bb.0:
30 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
31 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
32 ; AVX512-NEXT: vmovq %xmm0, %rax
33 ; AVX512-NEXT: retq
34 %1 = call i64 @llvm.experimental.vector.reduce.xor.i64.v2i64(<2 x i64> %a0)
35 ret i64 %1
36 }
38 define i64 @test_v4i64(<4 x i64> %a0) {
39 ; SSE-LABEL: test_v4i64:
40 ; SSE: # %bb.0:
41 ; SSE-NEXT: pxor %xmm1, %xmm0
42 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
43 ; SSE-NEXT: pxor %xmm0, %xmm1
44 ; SSE-NEXT: movq %xmm1, %rax
45 ; SSE-NEXT: retq
46 ;
47 ; AVX1-LABEL: test_v4i64:
48 ; AVX1: # %bb.0:
49 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
50 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
51 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
52 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
53 ; AVX1-NEXT: vmovq %xmm0, %rax
54 ; AVX1-NEXT: vzeroupper
55 ; AVX1-NEXT: retq
56 ;
57 ; AVX2-LABEL: test_v4i64:
58 ; AVX2: # %bb.0:
59 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
60 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
61 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
62 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
63 ; AVX2-NEXT: vmovq %xmm0, %rax
64 ; AVX2-NEXT: vzeroupper
65 ; AVX2-NEXT: retq
66 ;
67 ; AVX512-LABEL: test_v4i64:
68 ; AVX512: # %bb.0:
69 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
70 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
71 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
72 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
73 ; AVX512-NEXT: vmovq %xmm0, %rax
74 ; AVX512-NEXT: vzeroupper
75 ; AVX512-NEXT: retq
76 %1 = call i64 @llvm.experimental.vector.reduce.xor.i64.v4i64(<4 x i64> %a0)
77 ret i64 %1
78 }
80 define i64 @test_v8i64(<8 x i64> %a0) {
81 ; SSE-LABEL: test_v8i64:
82 ; SSE: # %bb.0:
83 ; SSE-NEXT: pxor %xmm3, %xmm1
84 ; SSE-NEXT: pxor %xmm2, %xmm1
85 ; SSE-NEXT: pxor %xmm0, %xmm1
86 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
87 ; SSE-NEXT: pxor %xmm1, %xmm0
88 ; SSE-NEXT: movq %xmm0, %rax
89 ; SSE-NEXT: retq
90 ;
91 ; AVX1-LABEL: test_v8i64:
92 ; AVX1: # %bb.0:
93 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
94 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
95 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
96 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
97 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
98 ; AVX1-NEXT: vmovq %xmm0, %rax
99 ; AVX1-NEXT: vzeroupper
100 ; AVX1-NEXT: retq
101 ;
102 ; AVX2-LABEL: test_v8i64:
103 ; AVX2: # %bb.0:
104 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
105 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
106 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
107 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
108 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
109 ; AVX2-NEXT: vmovq %xmm0, %rax
110 ; AVX2-NEXT: vzeroupper
111 ; AVX2-NEXT: retq
112 ;
113 ; AVX512-LABEL: test_v8i64:
114 ; AVX512: # %bb.0:
115 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
116 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
117 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
118 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
119 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
120 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
121 ; AVX512-NEXT: vmovq %xmm0, %rax
122 ; AVX512-NEXT: vzeroupper
123 ; AVX512-NEXT: retq
124 %1 = call i64 @llvm.experimental.vector.reduce.xor.i64.v8i64(<8 x i64> %a0)
125 ret i64 %1
126 }
128 define i64 @test_v16i64(<16 x i64> %a0) {
129 ; SSE-LABEL: test_v16i64:
130 ; SSE: # %bb.0:
131 ; SSE-NEXT: pxor %xmm6, %xmm2
132 ; SSE-NEXT: pxor %xmm7, %xmm3
133 ; SSE-NEXT: pxor %xmm5, %xmm3
134 ; SSE-NEXT: pxor %xmm1, %xmm3
135 ; SSE-NEXT: pxor %xmm4, %xmm2
136 ; SSE-NEXT: pxor %xmm3, %xmm2
137 ; SSE-NEXT: pxor %xmm0, %xmm2
138 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
139 ; SSE-NEXT: pxor %xmm2, %xmm0
140 ; SSE-NEXT: movq %xmm0, %rax
141 ; SSE-NEXT: retq
142 ;
143 ; AVX1-LABEL: test_v16i64:
144 ; AVX1: # %bb.0:
145 ; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1
146 ; AVX1-NEXT: vxorps %ymm1, %ymm2, %ymm1
147 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
148 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
149 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
150 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
151 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
152 ; AVX1-NEXT: vmovq %xmm0, %rax
153 ; AVX1-NEXT: vzeroupper
154 ; AVX1-NEXT: retq
155 ;
156 ; AVX2-LABEL: test_v16i64:
157 ; AVX2: # %bb.0:
158 ; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1
159 ; AVX2-NEXT: vpxor %ymm1, %ymm2, %ymm1
160 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
161 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
162 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
163 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
164 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
165 ; AVX2-NEXT: vmovq %xmm0, %rax
166 ; AVX2-NEXT: vzeroupper
167 ; AVX2-NEXT: retq
168 ;
169 ; AVX512-LABEL: test_v16i64:
170 ; AVX512: # %bb.0:
171 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
172 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
173 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
174 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
175 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
176 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
177 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
178 ; AVX512-NEXT: vmovq %xmm0, %rax
179 ; AVX512-NEXT: vzeroupper
180 ; AVX512-NEXT: retq
181 %1 = call i64 @llvm.experimental.vector.reduce.xor.i64.v16i64(<16 x i64> %a0)
182 ret i64 %1
183 }
185 ;
186 ; vXi32
187 ;
189 define i32 @test_v2i32(<2 x i32> %a0) {
190 ; SSE-LABEL: test_v2i32:
191 ; SSE: # %bb.0:
192 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
193 ; SSE-NEXT: pxor %xmm0, %xmm1
194 ; SSE-NEXT: movd %xmm1, %eax
195 ; SSE-NEXT: retq
196 ;
197 ; AVX-LABEL: test_v2i32:
198 ; AVX: # %bb.0:
199 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
200 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
201 ; AVX-NEXT: vmovd %xmm0, %eax
202 ; AVX-NEXT: retq
203 ;
204 ; AVX512-LABEL: test_v2i32:
205 ; AVX512: # %bb.0:
206 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
207 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
208 ; AVX512-NEXT: vmovd %xmm0, %eax
209 ; AVX512-NEXT: retq
210 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v2i32(<2 x i32> %a0)
211 ret i32 %1
212 }
214 define i32 @test_v4i32(<4 x i32> %a0) {
215 ; SSE-LABEL: test_v4i32:
216 ; SSE: # %bb.0:
217 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
218 ; SSE-NEXT: pxor %xmm0, %xmm1
219 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
220 ; SSE-NEXT: pxor %xmm1, %xmm0
221 ; SSE-NEXT: movd %xmm0, %eax
222 ; SSE-NEXT: retq
223 ;
224 ; AVX-LABEL: test_v4i32:
225 ; AVX: # %bb.0:
226 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
227 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
228 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
229 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
230 ; AVX-NEXT: vmovd %xmm0, %eax
231 ; AVX-NEXT: retq
232 ;
233 ; AVX512-LABEL: test_v4i32:
234 ; AVX512: # %bb.0:
235 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
236 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
237 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
238 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
239 ; AVX512-NEXT: vmovd %xmm0, %eax
240 ; AVX512-NEXT: retq
241 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v4i32(<4 x i32> %a0)
242 ret i32 %1
243 }
245 define i32 @test_v8i32(<8 x i32> %a0) {
246 ; SSE-LABEL: test_v8i32:
247 ; SSE: # %bb.0:
248 ; SSE-NEXT: pxor %xmm1, %xmm0
249 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
250 ; SSE-NEXT: pxor %xmm0, %xmm1
251 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
252 ; SSE-NEXT: pxor %xmm1, %xmm0
253 ; SSE-NEXT: movd %xmm0, %eax
254 ; SSE-NEXT: retq
255 ;
256 ; AVX1-LABEL: test_v8i32:
257 ; AVX1: # %bb.0:
258 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
259 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
260 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
261 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
262 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
263 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
264 ; AVX1-NEXT: vmovd %xmm0, %eax
265 ; AVX1-NEXT: vzeroupper
266 ; AVX1-NEXT: retq
267 ;
268 ; AVX2-LABEL: test_v8i32:
269 ; AVX2: # %bb.0:
270 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
271 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
272 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
273 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
274 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
275 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
276 ; AVX2-NEXT: vmovd %xmm0, %eax
277 ; AVX2-NEXT: vzeroupper
278 ; AVX2-NEXT: retq
279 ;
280 ; AVX512-LABEL: test_v8i32:
281 ; AVX512: # %bb.0:
282 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
283 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
284 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
285 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
286 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
287 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
288 ; AVX512-NEXT: vmovd %xmm0, %eax
289 ; AVX512-NEXT: vzeroupper
290 ; AVX512-NEXT: retq
291 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v8i32(<8 x i32> %a0)
292 ret i32 %1
293 }
295 define i32 @test_v16i32(<16 x i32> %a0) {
296 ; SSE-LABEL: test_v16i32:
297 ; SSE: # %bb.0:
298 ; SSE-NEXT: pxor %xmm3, %xmm1
299 ; SSE-NEXT: pxor %xmm2, %xmm1
300 ; SSE-NEXT: pxor %xmm0, %xmm1
301 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
302 ; SSE-NEXT: pxor %xmm1, %xmm0
303 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
304 ; SSE-NEXT: pxor %xmm0, %xmm1
305 ; SSE-NEXT: movd %xmm1, %eax
306 ; SSE-NEXT: retq
307 ;
308 ; AVX1-LABEL: test_v16i32:
309 ; AVX1: # %bb.0:
310 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
311 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
312 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
313 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
314 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
315 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
316 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
317 ; AVX1-NEXT: vmovd %xmm0, %eax
318 ; AVX1-NEXT: vzeroupper
319 ; AVX1-NEXT: retq
320 ;
321 ; AVX2-LABEL: test_v16i32:
322 ; AVX2: # %bb.0:
323 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
324 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
325 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
326 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
327 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
328 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
329 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
330 ; AVX2-NEXT: vmovd %xmm0, %eax
331 ; AVX2-NEXT: vzeroupper
332 ; AVX2-NEXT: retq
333 ;
334 ; AVX512-LABEL: test_v16i32:
335 ; AVX512: # %bb.0:
336 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
337 ; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm0
338 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
339 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
340 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
341 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
342 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
343 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
344 ; AVX512-NEXT: vmovd %xmm0, %eax
345 ; AVX512-NEXT: vzeroupper
346 ; AVX512-NEXT: retq
347 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v16i32(<16 x i32> %a0)
348 ret i32 %1
349 }
351 define i32 @test_v32i32(<32 x i32> %a0) {
352 ; SSE-LABEL: test_v32i32:
353 ; SSE: # %bb.0:
354 ; SSE-NEXT: pxor %xmm6, %xmm2
355 ; SSE-NEXT: pxor %xmm7, %xmm3
356 ; SSE-NEXT: pxor %xmm5, %xmm3
357 ; SSE-NEXT: pxor %xmm1, %xmm3
358 ; SSE-NEXT: pxor %xmm4, %xmm2
359 ; SSE-NEXT: pxor %xmm3, %xmm2
360 ; SSE-NEXT: pxor %xmm0, %xmm2
361 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
362 ; SSE-NEXT: pxor %xmm2, %xmm0
363 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
364 ; SSE-NEXT: pxor %xmm0, %xmm1
365 ; SSE-NEXT: movd %xmm1, %eax
366 ; SSE-NEXT: retq
367 ;
368 ; AVX1-LABEL: test_v32i32:
369 ; AVX1: # %bb.0:
370 ; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1
371 ; AVX1-NEXT: vxorps %ymm1, %ymm2, %ymm1
372 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
373 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
374 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
375 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
376 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
377 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
378 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
379 ; AVX1-NEXT: vmovd %xmm0, %eax
380 ; AVX1-NEXT: vzeroupper
381 ; AVX1-NEXT: retq
382 ;
383 ; AVX2-LABEL: test_v32i32:
384 ; AVX2: # %bb.0:
385 ; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1
386 ; AVX2-NEXT: vpxor %ymm1, %ymm2, %ymm1
387 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
388 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
389 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
390 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
391 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
392 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
393 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
394 ; AVX2-NEXT: vmovd %xmm0, %eax
395 ; AVX2-NEXT: vzeroupper
396 ; AVX2-NEXT: retq
397 ;
398 ; AVX512-LABEL: test_v32i32:
399 ; AVX512: # %bb.0:
400 ; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm0
401 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
402 ; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm0
403 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
404 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
405 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
406 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
407 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
408 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
409 ; AVX512-NEXT: vmovd %xmm0, %eax
410 ; AVX512-NEXT: vzeroupper
411 ; AVX512-NEXT: retq
412 %1 = call i32 @llvm.experimental.vector.reduce.xor.i32.v32i32(<32 x i32> %a0)
413 ret i32 %1
414 }
416 ;
417 ; vXi16
418 ;
420 define i16 @test_v2i16(<2 x i16> %a0) {
421 ; SSE-LABEL: test_v2i16:
422 ; SSE: # %bb.0:
423 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
424 ; SSE-NEXT: pxor %xmm0, %xmm1
425 ; SSE-NEXT: movd %xmm1, %eax
426 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
427 ; SSE-NEXT: retq
428 ;
429 ; AVX-LABEL: test_v2i16:
430 ; AVX: # %bb.0:
431 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
432 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
433 ; AVX-NEXT: vmovd %xmm0, %eax
434 ; AVX-NEXT: # kill: def $ax killed $ax killed $eax
435 ; AVX-NEXT: retq
436 ;
437 ; AVX512-LABEL: test_v2i16:
438 ; AVX512: # %bb.0:
439 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
440 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
441 ; AVX512-NEXT: vmovd %xmm0, %eax
442 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
443 ; AVX512-NEXT: retq
444 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v2i16(<2 x i16> %a0)
445 ret i16 %1
446 }
448 define i16 @test_v4i16(<4 x i16> %a0) {
449 ; SSE-LABEL: test_v4i16:
450 ; SSE: # %bb.0:
451 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
452 ; SSE-NEXT: pxor %xmm0, %xmm1
453 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
454 ; SSE-NEXT: pxor %xmm1, %xmm0
455 ; SSE-NEXT: movd %xmm0, %eax
456 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
457 ; SSE-NEXT: retq
458 ;
459 ; AVX-LABEL: test_v4i16:
460 ; AVX: # %bb.0:
461 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
462 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
463 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
464 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
465 ; AVX-NEXT: vmovd %xmm0, %eax
466 ; AVX-NEXT: # kill: def $ax killed $ax killed $eax
467 ; AVX-NEXT: retq
468 ;
469 ; AVX512-LABEL: test_v4i16:
470 ; AVX512: # %bb.0:
471 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
472 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
473 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
474 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
475 ; AVX512-NEXT: vmovd %xmm0, %eax
476 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
477 ; AVX512-NEXT: retq
478 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v4i16(<4 x i16> %a0)
479 ret i16 %1
480 }
482 define i16 @test_v8i16(<8 x i16> %a0) {
483 ; SSE-LABEL: test_v8i16:
484 ; SSE: # %bb.0:
485 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
486 ; SSE-NEXT: pxor %xmm0, %xmm1
487 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
488 ; SSE-NEXT: pxor %xmm1, %xmm0
489 ; SSE-NEXT: movdqa %xmm0, %xmm1
490 ; SSE-NEXT: psrld $16, %xmm1
491 ; SSE-NEXT: pxor %xmm0, %xmm1
492 ; SSE-NEXT: movd %xmm1, %eax
493 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
494 ; SSE-NEXT: retq
495 ;
496 ; AVX-LABEL: test_v8i16:
497 ; AVX: # %bb.0:
498 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
499 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
500 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
501 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
502 ; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
503 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
504 ; AVX-NEXT: vmovd %xmm0, %eax
505 ; AVX-NEXT: # kill: def $ax killed $ax killed $eax
506 ; AVX-NEXT: retq
507 ;
508 ; AVX512-LABEL: test_v8i16:
509 ; AVX512: # %bb.0:
510 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
511 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
512 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
513 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
514 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
515 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
516 ; AVX512-NEXT: vmovd %xmm0, %eax
517 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
518 ; AVX512-NEXT: retq
519 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v8i16(<8 x i16> %a0)
520 ret i16 %1
521 }
523 define i16 @test_v16i16(<16 x i16> %a0) {
524 ; SSE-LABEL: test_v16i16:
525 ; SSE: # %bb.0:
526 ; SSE-NEXT: pxor %xmm1, %xmm0
527 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
528 ; SSE-NEXT: pxor %xmm0, %xmm1
529 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
530 ; SSE-NEXT: pxor %xmm1, %xmm0
531 ; SSE-NEXT: movdqa %xmm0, %xmm1
532 ; SSE-NEXT: psrld $16, %xmm1
533 ; SSE-NEXT: pxor %xmm0, %xmm1
534 ; SSE-NEXT: movd %xmm1, %eax
535 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
536 ; SSE-NEXT: retq
537 ;
538 ; AVX1-LABEL: test_v16i16:
539 ; AVX1: # %bb.0:
540 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
541 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
542 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
543 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
544 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
545 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
546 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
547 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
548 ; AVX1-NEXT: vmovd %xmm0, %eax
549 ; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
550 ; AVX1-NEXT: vzeroupper
551 ; AVX1-NEXT: retq
552 ;
553 ; AVX2-LABEL: test_v16i16:
554 ; AVX2: # %bb.0:
555 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
556 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
557 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
558 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
559 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
560 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
561 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
562 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
563 ; AVX2-NEXT: vmovd %xmm0, %eax
564 ; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
565 ; AVX2-NEXT: vzeroupper
566 ; AVX2-NEXT: retq
567 ;
568 ; AVX512-LABEL: test_v16i16:
569 ; AVX512: # %bb.0:
570 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
571 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
572 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
573 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
574 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
575 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
576 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
577 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
578 ; AVX512-NEXT: vmovd %xmm0, %eax
579 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
580 ; AVX512-NEXT: vzeroupper
581 ; AVX512-NEXT: retq
582 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v16i16(<16 x i16> %a0)
583 ret i16 %1
584 }
586 define i16 @test_v32i16(<32 x i16> %a0) {
587 ; SSE-LABEL: test_v32i16:
588 ; SSE: # %bb.0:
589 ; SSE-NEXT: pxor %xmm3, %xmm1
590 ; SSE-NEXT: pxor %xmm2, %xmm1
591 ; SSE-NEXT: pxor %xmm0, %xmm1
592 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
593 ; SSE-NEXT: pxor %xmm1, %xmm0
594 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
595 ; SSE-NEXT: pxor %xmm0, %xmm1
596 ; SSE-NEXT: movdqa %xmm1, %xmm0
597 ; SSE-NEXT: psrld $16, %xmm0
598 ; SSE-NEXT: pxor %xmm1, %xmm0
599 ; SSE-NEXT: movd %xmm0, %eax
600 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
601 ; SSE-NEXT: retq
602 ;
603 ; AVX1-LABEL: test_v32i16:
604 ; AVX1: # %bb.0:
605 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
606 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
607 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
608 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
609 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
610 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
611 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
612 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
613 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
614 ; AVX1-NEXT: vmovd %xmm0, %eax
615 ; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
616 ; AVX1-NEXT: vzeroupper
617 ; AVX1-NEXT: retq
618 ;
619 ; AVX2-LABEL: test_v32i16:
620 ; AVX2: # %bb.0:
621 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
622 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
623 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
624 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
625 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
626 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
627 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
628 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
629 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
630 ; AVX2-NEXT: vmovd %xmm0, %eax
631 ; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
632 ; AVX2-NEXT: vzeroupper
633 ; AVX2-NEXT: retq
634 ;
635 ; AVX512-LABEL: test_v32i16:
636 ; AVX512: # %bb.0:
637 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
638 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
639 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
640 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
641 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
642 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
643 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
644 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
645 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
646 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
647 ; AVX512-NEXT: vmovd %xmm0, %eax
648 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
649 ; AVX512-NEXT: vzeroupper
650 ; AVX512-NEXT: retq
651 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v32i16(<32 x i16> %a0)
652 ret i16 %1
653 }
655 define i16 @test_v64i16(<64 x i16> %a0) {
656 ; SSE-LABEL: test_v64i16:
657 ; SSE: # %bb.0:
658 ; SSE-NEXT: pxor %xmm6, %xmm2
659 ; SSE-NEXT: pxor %xmm7, %xmm3
660 ; SSE-NEXT: pxor %xmm5, %xmm3
661 ; SSE-NEXT: pxor %xmm1, %xmm3
662 ; SSE-NEXT: pxor %xmm4, %xmm2
663 ; SSE-NEXT: pxor %xmm3, %xmm2
664 ; SSE-NEXT: pxor %xmm0, %xmm2
665 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
666 ; SSE-NEXT: pxor %xmm2, %xmm0
667 ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
668 ; SSE-NEXT: pxor %xmm0, %xmm1
669 ; SSE-NEXT: movdqa %xmm1, %xmm0
670 ; SSE-NEXT: psrld $16, %xmm0
671 ; SSE-NEXT: pxor %xmm1, %xmm0
672 ; SSE-NEXT: movd %xmm0, %eax
673 ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
674 ; SSE-NEXT: retq
675 ;
676 ; AVX1-LABEL: test_v64i16:
677 ; AVX1: # %bb.0:
678 ; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1
679 ; AVX1-NEXT: vxorps %ymm1, %ymm2, %ymm1
680 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
681 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
682 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
683 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
684 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
685 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
686 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
687 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
688 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
689 ; AVX1-NEXT: vmovd %xmm0, %eax
690 ; AVX1-NEXT: # kill: def $ax killed $ax killed $eax
691 ; AVX1-NEXT: vzeroupper
692 ; AVX1-NEXT: retq
693 ;
694 ; AVX2-LABEL: test_v64i16:
695 ; AVX2: # %bb.0:
696 ; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1
697 ; AVX2-NEXT: vpxor %ymm1, %ymm2, %ymm1
698 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
699 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
700 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
701 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
702 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
703 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
704 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
705 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
706 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
707 ; AVX2-NEXT: vmovd %xmm0, %eax
708 ; AVX2-NEXT: # kill: def $ax killed $ax killed $eax
709 ; AVX2-NEXT: vzeroupper
710 ; AVX2-NEXT: retq
711 ;
712 ; AVX512-LABEL: test_v64i16:
713 ; AVX512: # %bb.0:
714 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
715 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
716 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
717 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
718 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
719 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
720 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
721 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
722 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
723 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
724 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
725 ; AVX512-NEXT: vmovd %xmm0, %eax
726 ; AVX512-NEXT: # kill: def $ax killed $ax killed $eax
727 ; AVX512-NEXT: vzeroupper
728 ; AVX512-NEXT: retq
729 %1 = call i16 @llvm.experimental.vector.reduce.xor.i16.v64i16(<64 x i16> %a0)
730 ret i16 %1
731 }
733 ;
734 ; vXi8
735 ;
737 define i8 @test_v2i8(<2 x i8> %a0) {
738 ; SSE2-LABEL: test_v2i8:
739 ; SSE2: # %bb.0:
740 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
741 ; SSE2-NEXT: pxor %xmm0, %xmm1
742 ; SSE2-NEXT: movd %xmm1, %eax
743 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
744 ; SSE2-NEXT: retq
745 ;
746 ; SSE41-LABEL: test_v2i8:
747 ; SSE41: # %bb.0:
748 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
749 ; SSE41-NEXT: pxor %xmm0, %xmm1
750 ; SSE41-NEXT: pextrb $0, %xmm1, %eax
751 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
752 ; SSE41-NEXT: retq
753 ;
754 ; AVX-LABEL: test_v2i8:
755 ; AVX: # %bb.0:
756 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
757 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
758 ; AVX-NEXT: vpextrb $0, %xmm0, %eax
759 ; AVX-NEXT: # kill: def $al killed $al killed $eax
760 ; AVX-NEXT: retq
761 ;
762 ; AVX512-LABEL: test_v2i8:
763 ; AVX512: # %bb.0:
764 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
765 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
766 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
767 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
768 ; AVX512-NEXT: retq
769 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v2i8(<2 x i8> %a0)
770 ret i8 %1
771 }
773 define i8 @test_v4i8(<4 x i8> %a0) {
774 ; SSE2-LABEL: test_v4i8:
775 ; SSE2: # %bb.0:
776 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
777 ; SSE2-NEXT: pxor %xmm0, %xmm1
778 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
779 ; SSE2-NEXT: pxor %xmm1, %xmm0
780 ; SSE2-NEXT: movd %xmm0, %eax
781 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
782 ; SSE2-NEXT: retq
783 ;
784 ; SSE41-LABEL: test_v4i8:
785 ; SSE41: # %bb.0:
786 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
787 ; SSE41-NEXT: pxor %xmm0, %xmm1
788 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
789 ; SSE41-NEXT: pxor %xmm1, %xmm0
790 ; SSE41-NEXT: pextrb $0, %xmm0, %eax
791 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
792 ; SSE41-NEXT: retq
793 ;
794 ; AVX-LABEL: test_v4i8:
795 ; AVX: # %bb.0:
796 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
797 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
798 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
799 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
800 ; AVX-NEXT: vpextrb $0, %xmm0, %eax
801 ; AVX-NEXT: # kill: def $al killed $al killed $eax
802 ; AVX-NEXT: retq
803 ;
804 ; AVX512-LABEL: test_v4i8:
805 ; AVX512: # %bb.0:
806 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
807 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
808 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
809 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
810 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
811 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
812 ; AVX512-NEXT: retq
813 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v4i8(<4 x i8> %a0)
814 ret i8 %1
815 }
817 define i8 @test_v8i8(<8 x i8> %a0) {
818 ; SSE2-LABEL: test_v8i8:
819 ; SSE2: # %bb.0:
820 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
821 ; SSE2-NEXT: pxor %xmm0, %xmm1
822 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
823 ; SSE2-NEXT: pxor %xmm1, %xmm0
824 ; SSE2-NEXT: movdqa %xmm0, %xmm1
825 ; SSE2-NEXT: psrld $16, %xmm1
826 ; SSE2-NEXT: pxor %xmm0, %xmm1
827 ; SSE2-NEXT: movd %xmm1, %eax
828 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
829 ; SSE2-NEXT: retq
830 ;
831 ; SSE41-LABEL: test_v8i8:
832 ; SSE41: # %bb.0:
833 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
834 ; SSE41-NEXT: pxor %xmm0, %xmm1
835 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
836 ; SSE41-NEXT: pxor %xmm1, %xmm0
837 ; SSE41-NEXT: movdqa %xmm0, %xmm1
838 ; SSE41-NEXT: psrld $16, %xmm1
839 ; SSE41-NEXT: pxor %xmm0, %xmm1
840 ; SSE41-NEXT: pextrb $0, %xmm1, %eax
841 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
842 ; SSE41-NEXT: retq
843 ;
844 ; AVX-LABEL: test_v8i8:
845 ; AVX: # %bb.0:
846 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
847 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
848 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
849 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
850 ; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
851 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
852 ; AVX-NEXT: vpextrb $0, %xmm0, %eax
853 ; AVX-NEXT: # kill: def $al killed $al killed $eax
854 ; AVX-NEXT: retq
855 ;
856 ; AVX512-LABEL: test_v8i8:
857 ; AVX512: # %bb.0:
858 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
859 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
860 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
861 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
862 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
863 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
864 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
865 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
866 ; AVX512-NEXT: retq
867 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v8i8(<8 x i8> %a0)
868 ret i8 %1
869 }
871 define i8 @test_v16i8(<16 x i8> %a0) {
872 ; SSE2-LABEL: test_v16i8:
873 ; SSE2: # %bb.0:
874 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
875 ; SSE2-NEXT: pxor %xmm0, %xmm1
876 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
877 ; SSE2-NEXT: pxor %xmm1, %xmm0
878 ; SSE2-NEXT: movdqa %xmm0, %xmm1
879 ; SSE2-NEXT: psrld $16, %xmm1
880 ; SSE2-NEXT: pxor %xmm0, %xmm1
881 ; SSE2-NEXT: movdqa %xmm1, %xmm0
882 ; SSE2-NEXT: psrlw $8, %xmm0
883 ; SSE2-NEXT: pxor %xmm1, %xmm0
884 ; SSE2-NEXT: movd %xmm0, %eax
885 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
886 ; SSE2-NEXT: retq
887 ;
888 ; SSE41-LABEL: test_v16i8:
889 ; SSE41: # %bb.0:
890 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
891 ; SSE41-NEXT: pxor %xmm0, %xmm1
892 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
893 ; SSE41-NEXT: pxor %xmm1, %xmm0
894 ; SSE41-NEXT: movdqa %xmm0, %xmm1
895 ; SSE41-NEXT: psrld $16, %xmm1
896 ; SSE41-NEXT: pxor %xmm0, %xmm1
897 ; SSE41-NEXT: movdqa %xmm1, %xmm0
898 ; SSE41-NEXT: psrlw $8, %xmm0
899 ; SSE41-NEXT: pxor %xmm1, %xmm0
900 ; SSE41-NEXT: pextrb $0, %xmm0, %eax
901 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
902 ; SSE41-NEXT: retq
903 ;
904 ; AVX-LABEL: test_v16i8:
905 ; AVX: # %bb.0:
906 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
907 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
908 ; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
909 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
910 ; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
911 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
912 ; AVX-NEXT: vpsrlw $8, %xmm0, %xmm1
913 ; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0
914 ; AVX-NEXT: vpextrb $0, %xmm0, %eax
915 ; AVX-NEXT: # kill: def $al killed $al killed $eax
916 ; AVX-NEXT: retq
917 ;
918 ; AVX512-LABEL: test_v16i8:
919 ; AVX512: # %bb.0:
920 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
921 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
922 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
923 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
924 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
925 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
926 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
927 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
928 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
929 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
930 ; AVX512-NEXT: retq
931 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v16i8(<16 x i8> %a0)
932 ret i8 %1
933 }
935 define i8 @test_v32i8(<32 x i8> %a0) {
936 ; SSE2-LABEL: test_v32i8:
937 ; SSE2: # %bb.0:
938 ; SSE2-NEXT: pxor %xmm1, %xmm0
939 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
940 ; SSE2-NEXT: pxor %xmm0, %xmm1
941 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
942 ; SSE2-NEXT: pxor %xmm1, %xmm0
943 ; SSE2-NEXT: movdqa %xmm0, %xmm1
944 ; SSE2-NEXT: psrld $16, %xmm1
945 ; SSE2-NEXT: pxor %xmm0, %xmm1
946 ; SSE2-NEXT: movdqa %xmm1, %xmm0
947 ; SSE2-NEXT: psrlw $8, %xmm0
948 ; SSE2-NEXT: pxor %xmm1, %xmm0
949 ; SSE2-NEXT: movd %xmm0, %eax
950 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
951 ; SSE2-NEXT: retq
952 ;
953 ; SSE41-LABEL: test_v32i8:
954 ; SSE41: # %bb.0:
955 ; SSE41-NEXT: pxor %xmm1, %xmm0
956 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
957 ; SSE41-NEXT: pxor %xmm0, %xmm1
958 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
959 ; SSE41-NEXT: pxor %xmm1, %xmm0
960 ; SSE41-NEXT: movdqa %xmm0, %xmm1
961 ; SSE41-NEXT: psrld $16, %xmm1
962 ; SSE41-NEXT: pxor %xmm0, %xmm1
963 ; SSE41-NEXT: movdqa %xmm1, %xmm0
964 ; SSE41-NEXT: psrlw $8, %xmm0
965 ; SSE41-NEXT: pxor %xmm1, %xmm0
966 ; SSE41-NEXT: pextrb $0, %xmm0, %eax
967 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
968 ; SSE41-NEXT: retq
969 ;
970 ; AVX1-LABEL: test_v32i8:
971 ; AVX1: # %bb.0:
972 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
973 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
974 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
975 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
976 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
977 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
978 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
979 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
980 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
981 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
982 ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
983 ; AVX1-NEXT: # kill: def $al killed $al killed $eax
984 ; AVX1-NEXT: vzeroupper
985 ; AVX1-NEXT: retq
986 ;
987 ; AVX2-LABEL: test_v32i8:
988 ; AVX2: # %bb.0:
989 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
990 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
991 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
992 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
993 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
994 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
995 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
996 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
997 ; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
998 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
999 ; AVX2-NEXT: vpextrb $0, %xmm0, %eax
1000 ; AVX2-NEXT: # kill: def $al killed $al killed $eax
1001 ; AVX2-NEXT: vzeroupper
1002 ; AVX2-NEXT: retq
1003 ;
1004 ; AVX512-LABEL: test_v32i8:
1005 ; AVX512: # %bb.0:
1006 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
1007 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1008 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1009 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1010 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1011 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1012 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
1013 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1014 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
1015 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1016 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
1017 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
1018 ; AVX512-NEXT: vzeroupper
1019 ; AVX512-NEXT: retq
1020 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v32i8(<32 x i8> %a0)
1021 ret i8 %1
1022 }
1024 define i8 @test_v64i8(<64 x i8> %a0) {
1025 ; SSE2-LABEL: test_v64i8:
1026 ; SSE2: # %bb.0:
1027 ; SSE2-NEXT: pxor %xmm3, %xmm1
1028 ; SSE2-NEXT: pxor %xmm2, %xmm1
1029 ; SSE2-NEXT: pxor %xmm0, %xmm1
1030 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
1031 ; SSE2-NEXT: pxor %xmm1, %xmm0
1032 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1033 ; SSE2-NEXT: pxor %xmm0, %xmm1
1034 ; SSE2-NEXT: movdqa %xmm1, %xmm0
1035 ; SSE2-NEXT: psrld $16, %xmm0
1036 ; SSE2-NEXT: pxor %xmm1, %xmm0
1037 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1038 ; SSE2-NEXT: psrlw $8, %xmm1
1039 ; SSE2-NEXT: pxor %xmm0, %xmm1
1040 ; SSE2-NEXT: movd %xmm1, %eax
1041 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
1042 ; SSE2-NEXT: retq
1043 ;
1044 ; SSE41-LABEL: test_v64i8:
1045 ; SSE41: # %bb.0:
1046 ; SSE41-NEXT: pxor %xmm3, %xmm1
1047 ; SSE41-NEXT: pxor %xmm2, %xmm1
1048 ; SSE41-NEXT: pxor %xmm0, %xmm1
1049 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
1050 ; SSE41-NEXT: pxor %xmm1, %xmm0
1051 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1052 ; SSE41-NEXT: pxor %xmm0, %xmm1
1053 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1054 ; SSE41-NEXT: psrld $16, %xmm0
1055 ; SSE41-NEXT: pxor %xmm1, %xmm0
1056 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1057 ; SSE41-NEXT: psrlw $8, %xmm1
1058 ; SSE41-NEXT: pxor %xmm0, %xmm1
1059 ; SSE41-NEXT: pextrb $0, %xmm1, %eax
1060 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
1061 ; SSE41-NEXT: retq
1062 ;
1063 ; AVX1-LABEL: test_v64i8:
1064 ; AVX1: # %bb.0:
1065 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
1066 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1067 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1068 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
1069 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1070 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
1071 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1072 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
1073 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
1074 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
1075 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
1076 ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
1077 ; AVX1-NEXT: # kill: def $al killed $al killed $eax
1078 ; AVX1-NEXT: vzeroupper
1079 ; AVX1-NEXT: retq
1080 ;
1081 ; AVX2-LABEL: test_v64i8:
1082 ; AVX2: # %bb.0:
1083 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
1084 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1085 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1086 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1087 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1088 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1089 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1090 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
1091 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1092 ; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
1093 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1094 ; AVX2-NEXT: vpextrb $0, %xmm0, %eax
1095 ; AVX2-NEXT: # kill: def $al killed $al killed $eax
1096 ; AVX2-NEXT: vzeroupper
1097 ; AVX2-NEXT: retq
1098 ;
1099 ; AVX512-LABEL: test_v64i8:
1100 ; AVX512: # %bb.0:
1101 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
1102 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
1103 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
1104 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1105 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1106 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1107 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1108 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1109 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
1110 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1111 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
1112 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1113 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
1114 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
1115 ; AVX512-NEXT: vzeroupper
1116 ; AVX512-NEXT: retq
1117 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v64i8(<64 x i8> %a0)
1118 ret i8 %1
1119 }
1121 define i8 @test_v128i8(<128 x i8> %a0) {
1122 ; SSE2-LABEL: test_v128i8:
1123 ; SSE2: # %bb.0:
1124 ; SSE2-NEXT: pxor %xmm6, %xmm2
1125 ; SSE2-NEXT: pxor %xmm7, %xmm3
1126 ; SSE2-NEXT: pxor %xmm5, %xmm3
1127 ; SSE2-NEXT: pxor %xmm1, %xmm3
1128 ; SSE2-NEXT: pxor %xmm4, %xmm2
1129 ; SSE2-NEXT: pxor %xmm3, %xmm2
1130 ; SSE2-NEXT: pxor %xmm0, %xmm2
1131 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
1132 ; SSE2-NEXT: pxor %xmm2, %xmm0
1133 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1134 ; SSE2-NEXT: pxor %xmm0, %xmm1
1135 ; SSE2-NEXT: movdqa %xmm1, %xmm0
1136 ; SSE2-NEXT: psrld $16, %xmm0
1137 ; SSE2-NEXT: pxor %xmm1, %xmm0
1138 ; SSE2-NEXT: movdqa %xmm0, %xmm1
1139 ; SSE2-NEXT: psrlw $8, %xmm1
1140 ; SSE2-NEXT: pxor %xmm0, %xmm1
1141 ; SSE2-NEXT: movd %xmm1, %eax
1142 ; SSE2-NEXT: # kill: def $al killed $al killed $eax
1143 ; SSE2-NEXT: retq
1144 ;
1145 ; SSE41-LABEL: test_v128i8:
1146 ; SSE41: # %bb.0:
1147 ; SSE41-NEXT: pxor %xmm6, %xmm2
1148 ; SSE41-NEXT: pxor %xmm7, %xmm3
1149 ; SSE41-NEXT: pxor %xmm5, %xmm3
1150 ; SSE41-NEXT: pxor %xmm1, %xmm3
1151 ; SSE41-NEXT: pxor %xmm4, %xmm2
1152 ; SSE41-NEXT: pxor %xmm3, %xmm2
1153 ; SSE41-NEXT: pxor %xmm0, %xmm2
1154 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
1155 ; SSE41-NEXT: pxor %xmm2, %xmm0
1156 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1157 ; SSE41-NEXT: pxor %xmm0, %xmm1
1158 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1159 ; SSE41-NEXT: psrld $16, %xmm0
1160 ; SSE41-NEXT: pxor %xmm1, %xmm0
1161 ; SSE41-NEXT: movdqa %xmm0, %xmm1
1162 ; SSE41-NEXT: psrlw $8, %xmm1
1163 ; SSE41-NEXT: pxor %xmm0, %xmm1
1164 ; SSE41-NEXT: pextrb $0, %xmm1, %eax
1165 ; SSE41-NEXT: # kill: def $al killed $al killed $eax
1166 ; SSE41-NEXT: retq
1167 ;
1168 ; AVX1-LABEL: test_v128i8:
1169 ; AVX1: # %bb.0:
1170 ; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1
1171 ; AVX1-NEXT: vxorps %ymm1, %ymm2, %ymm1
1172 ; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0
1173 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1174 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1175 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
1176 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1177 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
1178 ; AVX1-NEXT: vxorps %xmm1, %xmm0, %xmm0
1179 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
1180 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
1181 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
1182 ; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0
1183 ; AVX1-NEXT: vpextrb $0, %xmm0, %eax
1184 ; AVX1-NEXT: # kill: def $al killed $al killed $eax
1185 ; AVX1-NEXT: vzeroupper
1186 ; AVX1-NEXT: retq
1187 ;
1188 ; AVX2-LABEL: test_v128i8:
1189 ; AVX2: # %bb.0:
1190 ; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1
1191 ; AVX2-NEXT: vpxor %ymm1, %ymm2, %ymm1
1192 ; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0
1193 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1194 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1195 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1196 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1197 ; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1198 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1199 ; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
1200 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1201 ; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
1202 ; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
1203 ; AVX2-NEXT: vpextrb $0, %xmm0, %eax
1204 ; AVX2-NEXT: # kill: def $al killed $al killed $eax
1205 ; AVX2-NEXT: vzeroupper
1206 ; AVX2-NEXT: retq
1207 ;
1208 ; AVX512-LABEL: test_v128i8:
1209 ; AVX512: # %bb.0:
1210 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
1211 ; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
1212 ; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0
1213 ; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
1214 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1215 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1216 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1217 ; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1218 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1219 ; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
1220 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1221 ; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
1222 ; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0
1223 ; AVX512-NEXT: vpextrb $0, %xmm0, %eax
1224 ; AVX512-NEXT: # kill: def $al killed $al killed $eax
1225 ; AVX512-NEXT: vzeroupper
1226 ; AVX512-NEXT: retq
1227 %1 = call i8 @llvm.experimental.vector.reduce.xor.i8.v128i8(<128 x i8> %a0)
1228 ret i8 %1
1229 }
1231 declare i64 @llvm.experimental.vector.reduce.xor.i64.v2i64(<2 x i64>)
1232 declare i64 @llvm.experimental.vector.reduce.xor.i64.v4i64(<4 x i64>)
1233 declare i64 @llvm.experimental.vector.reduce.xor.i64.v8i64(<8 x i64>)
1234 declare i64 @llvm.experimental.vector.reduce.xor.i64.v16i64(<16 x i64>)
1236 declare i32 @llvm.experimental.vector.reduce.xor.i32.v2i32(<2 x i32>)
1237 declare i32 @llvm.experimental.vector.reduce.xor.i32.v4i32(<4 x i32>)
1238 declare i32 @llvm.experimental.vector.reduce.xor.i32.v8i32(<8 x i32>)
1239 declare i32 @llvm.experimental.vector.reduce.xor.i32.v16i32(<16 x i32>)
1240 declare i32 @llvm.experimental.vector.reduce.xor.i32.v32i32(<32 x i32>)
1242 declare i16 @llvm.experimental.vector.reduce.xor.i16.v2i16(<2 x i16>)
1243 declare i16 @llvm.experimental.vector.reduce.xor.i16.v4i16(<4 x i16>)
1244 declare i16 @llvm.experimental.vector.reduce.xor.i16.v8i16(<8 x i16>)
1245 declare i16 @llvm.experimental.vector.reduce.xor.i16.v16i16(<16 x i16>)
1246 declare i16 @llvm.experimental.vector.reduce.xor.i16.v32i16(<32 x i16>)
1247 declare i16 @llvm.experimental.vector.reduce.xor.i16.v64i16(<64 x i16>)
1249 declare i8 @llvm.experimental.vector.reduce.xor.i8.v2i8(<2 x i8>)
1250 declare i8 @llvm.experimental.vector.reduce.xor.i8.v4i8(<4 x i8>)
1251 declare i8 @llvm.experimental.vector.reduce.xor.i8.v8i8(<8 x i8>)
1252 declare i8 @llvm.experimental.vector.reduce.xor.i8.v16i8(<16 x i8>)
1253 declare i8 @llvm.experimental.vector.reduce.xor.i8.v32i8(<32 x i8>)
1254 declare i8 @llvm.experimental.vector.reduce.xor.i8.v64i8(<64 x i8>)
1255 declare i8 @llvm.experimental.vector.reduce.xor.i8.v128i8(<128 x i8>)