| blob | 33c81886faf5d1f867e34e825727410d164c9e9c |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE2
3 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE42
4 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2
5 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE42
7 ; sign to float v2i16 to v2f32
9 define void @convert_v2i16_to_v2f32(<2 x float>* %dst.addr, <2 x i16> %src) nounwind {
10 ; X86-LABEL: convert_v2i16_to_v2f32:
11 ; X86: # %bb.0: # %entry
12 ; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X86-NEXT: psllq $48, %xmm0
14 ; X86-NEXT: psrad $16, %xmm0
15 ; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
16 ; X86-NEXT: cvtdq2ps %xmm0, %xmm0
17 ; X86-NEXT: movlps %xmm0, (%eax)
18 ; X86-NEXT: retl
19 ;
20 ; X64-LABEL: convert_v2i16_to_v2f32:
21 ; X64: # %bb.0: # %entry
22 ; X64-NEXT: psllq $48, %xmm0
23 ; X64-NEXT: psrad $16, %xmm0
24 ; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
25 ; X64-NEXT: cvtdq2ps %xmm0, %xmm0
26 ; X64-NEXT: movlps %xmm0, (%rdi)
27 ; X64-NEXT: retq
28 entry:
29 %val = sitofp <2 x i16> %src to <2 x float>
30 store <2 x float> %val, <2 x float>* %dst.addr, align 4
31 ret void
32 }
34 ; sign to float v3i8 to v3f32
36 define void @convert_v3i8_to_v3f32(<3 x float>* %dst.addr, <3 x i8>* %src.addr) nounwind {
37 ; X86-SSE2-LABEL: convert_v3i8_to_v3f32:
38 ; X86-SSE2: # %bb.0: # %entry
39 ; X86-SSE2-NEXT: pushl %ebp
40 ; X86-SSE2-NEXT: movl %esp, %ebp
41 ; X86-SSE2-NEXT: pushl %esi
42 ; X86-SSE2-NEXT: andl $-16, %esp
43 ; X86-SSE2-NEXT: subl $32, %esp
44 ; X86-SSE2-NEXT: movl 8(%ebp), %eax
45 ; X86-SSE2-NEXT: movl 12(%ebp), %ecx
46 ; X86-SSE2-NEXT: movzwl (%ecx), %edx
47 ; X86-SSE2-NEXT: movd %edx, %xmm0
48 ; X86-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
49 ; X86-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
50 ; X86-SSE2-NEXT: movdqa %xmm0, (%esp)
51 ; X86-SSE2-NEXT: movl (%esp), %edx
52 ; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %esi
53 ; X86-SSE2-NEXT: shll $8, %edx
54 ; X86-SSE2-NEXT: pinsrw $1, %edx, %xmm0
55 ; X86-SSE2-NEXT: shll $8, %esi
56 ; X86-SSE2-NEXT: pinsrw $3, %esi, %xmm0
57 ; X86-SSE2-NEXT: movzbl 2(%ecx), %ecx
58 ; X86-SSE2-NEXT: shll $8, %ecx
59 ; X86-SSE2-NEXT: pinsrw $5, %ecx, %xmm0
60 ; X86-SSE2-NEXT: psrad $24, %xmm0
61 ; X86-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
62 ; X86-SSE2-NEXT: movss %xmm0, (%eax)
63 ; X86-SSE2-NEXT: movaps %xmm0, %xmm1
64 ; X86-SSE2-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
65 ; X86-SSE2-NEXT: movss %xmm1, 8(%eax)
66 ; X86-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,2,3]
67 ; X86-SSE2-NEXT: movss %xmm0, 4(%eax)
68 ; X86-SSE2-NEXT: leal -4(%ebp), %esp
69 ; X86-SSE2-NEXT: popl %esi
70 ; X86-SSE2-NEXT: popl %ebp
71 ; X86-SSE2-NEXT: retl
72 ;
73 ; X86-SSE42-LABEL: convert_v3i8_to_v3f32:
74 ; X86-SSE42: # %bb.0: # %entry
75 ; X86-SSE42-NEXT: pushl %eax
76 ; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax
77 ; X86-SSE42-NEXT: movl {{[0-9]+}}(%esp), %ecx
78 ; X86-SSE42-NEXT: movzbl 2(%ecx), %edx
79 ; X86-SSE42-NEXT: movzwl (%ecx), %ecx
80 ; X86-SSE42-NEXT: movd %ecx, %xmm0
81 ; X86-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
82 ; X86-SSE42-NEXT: pinsrd $2, %edx, %xmm0
83 ; X86-SSE42-NEXT: pslld $24, %xmm0
84 ; X86-SSE42-NEXT: psrad $24, %xmm0
85 ; X86-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
86 ; X86-SSE42-NEXT: extractps $2, %xmm0, 8(%eax)
87 ; X86-SSE42-NEXT: extractps $1, %xmm0, 4(%eax)
88 ; X86-SSE42-NEXT: movss %xmm0, (%eax)
89 ; X86-SSE42-NEXT: popl %eax
90 ; X86-SSE42-NEXT: retl
91 ;
92 ; X64-SSE2-LABEL: convert_v3i8_to_v3f32:
93 ; X64-SSE2: # %bb.0: # %entry
94 ; X64-SSE2-NEXT: movzwl (%rsi), %eax
95 ; X64-SSE2-NEXT: movq %rax, %xmm0
96 ; X64-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
97 ; X64-SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
98 ; X64-SSE2-NEXT: movdqa %xmm0, -{{[0-9]+}}(%rsp)
99 ; X64-SSE2-NEXT: movl -{{[0-9]+}}(%rsp), %eax
100 ; X64-SSE2-NEXT: movl -{{[0-9]+}}(%rsp), %ecx
101 ; X64-SSE2-NEXT: shll $8, %eax
102 ; X64-SSE2-NEXT: pinsrw $1, %eax, %xmm0
103 ; X64-SSE2-NEXT: shll $8, %ecx
104 ; X64-SSE2-NEXT: pinsrw $3, %ecx, %xmm0
105 ; X64-SSE2-NEXT: movzbl 2(%rsi), %eax
106 ; X64-SSE2-NEXT: shll $8, %eax
107 ; X64-SSE2-NEXT: pinsrw $5, %eax, %xmm0
108 ; X64-SSE2-NEXT: psrad $24, %xmm0
109 ; X64-SSE2-NEXT: cvtdq2ps %xmm0, %xmm0
110 ; X64-SSE2-NEXT: movlps %xmm0, (%rdi)
111 ; X64-SSE2-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
112 ; X64-SSE2-NEXT: movss %xmm0, 8(%rdi)
113 ; X64-SSE2-NEXT: retq
114 ;
115 ; X64-SSE42-LABEL: convert_v3i8_to_v3f32:
116 ; X64-SSE42: # %bb.0: # %entry
117 ; X64-SSE42-NEXT: movzbl 2(%rsi), %eax
118 ; X64-SSE42-NEXT: movzwl (%rsi), %ecx
119 ; X64-SSE42-NEXT: movq %rcx, %xmm0
120 ; X64-SSE42-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
121 ; X64-SSE42-NEXT: pinsrd $2, %eax, %xmm0
122 ; X64-SSE42-NEXT: pslld $24, %xmm0
123 ; X64-SSE42-NEXT: psrad $24, %xmm0
124 ; X64-SSE42-NEXT: cvtdq2ps %xmm0, %xmm0
125 ; X64-SSE42-NEXT: extractps $2, %xmm0, 8(%rdi)
126 ; X64-SSE42-NEXT: movlps %xmm0, (%rdi)
127 ; X64-SSE42-NEXT: retq
128 entry:
129 %load = load <3 x i8>, <3 x i8>* %src.addr, align 1
130 %cvt = sitofp <3 x i8> %load to <3 x float>
131 store <3 x float> %cvt, <3 x float>* %dst.addr, align 4
132 ret void
133 }