test/MC/AArch64/SVE/faddv-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3 faddv b0, p7, z31.b
   4 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
   5 // CHECK-NEXT: faddv b0, p7, z31.b
   6 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
   7
   8 faddv h0, p8, z31.h
   9 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
  10 // CHECK-NEXT: faddv h0, p8, z31.h
  11 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  12
  13
  14 // ------------------------------------------------------------------------- //
  15 // Result must be a valid FP register.
  16
  17 faddv v0, p7, z31.h
  18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
  19 // CHECK-NEXT: faddv v0, p7, z31.h
  20 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  21
  22 // --------------------------------------------------------------------------//
  23 // Negative tests for instructions that are incompatible with movprfx
  24
  25 movprfx z31.d, p7/z, z6.d
  26 faddv d0, p7, z31.d
  27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  28 // CHECK-NEXT: faddv d0, p7, z31.d
  29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  30
  31 movprfx z31, z6
  32 faddv d0, p7, z31.d
  33 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
  34 // CHECK-NEXT: faddv d0, p7, z31.d
  35 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: