test/MC/AArch64/SVE/umulh-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3
   4 // ------------------------------------------------------------------------- //
   5 // Tied operands must match
   6
   7 umulh z0.b, p7/m, z1.b, z2.b
   8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
   9 // CHECK-NEXT: umulh z0.b, p7/m, z1.b, z2.b
  10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  11
  12
  13 // ------------------------------------------------------------------------- //
  14 // Invalid predicate
  15
  16 umulh z0.b, p8/m, z0.b, z1.b
  17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
  18 // CHECK-NEXT: umulh z0.b, p8/m, z0.b, z1.b
  19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: