test/MC/AMDGPU/sopc.s

   1 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=SICI %s
   2 // RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
   3 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSICI %s
   4
   5 //===----------------------------------------------------------------------===//
   6 // SOPC Instructions
   7 //===----------------------------------------------------------------------===//
   8
   9 s_cmp_eq_i32 s1, s2
  10 // GCN: s_cmp_eq_i32 s1, s2 ; encoding: [0x01,0x02,0x00,0xbf]
  11
  12 s_cmp_eq_i32 0xabcd1234, 0xabcd1234
  13 // GCN: s_cmp_eq_i32 0xabcd1234, 0xabcd1234 ; encoding: [0xff,0xff,0x00,0xbf,0x34,0x12,0xcd,0xab]
  14
  15 s_cmp_eq_i32 0xFFFF0000, -65536
  16 // GCN: s_cmp_eq_i32 0xffff0000, 0xffff0000 ; encoding: [0xff,0xff,0x00,0xbf,0x00,0x00,0xff,0xff]
  17
  18 s_cmp_lg_i32 s1, s2
  19 // GCN: s_cmp_lg_i32 s1, s2 ; encoding: [0x01,0x02,0x01,0xbf]
  20
  21 s_cmp_gt_i32 s1, s2
  22 // GCN: s_cmp_gt_i32 s1, s2 ; encoding: [0x01,0x02,0x02,0xbf]
  23
  24 s_cmp_ge_i32 s1, s2
  25 // GCN: s_cmp_ge_i32 s1, s2 ; encoding: [0x01,0x02,0x03,0xbf]
  26
  27 s_cmp_lt_i32 s1, s2
  28 // GCN: s_cmp_lt_i32 s1, s2 ; encoding: [0x01,0x02,0x04,0xbf]
  29
  30 s_cmp_le_i32 s1, s2
  31 // GCN: s_cmp_le_i32 s1, s2 ; encoding: [0x01,0x02,0x05,0xbf]
  32
  33 s_cmp_eq_u32 s1, s2
  34 // GCN: s_cmp_eq_u32 s1, s2 ; encoding: [0x01,0x02,0x06,0xbf]
  35
  36 s_cmp_lg_u32 s1, s2
  37 // GCN: s_cmp_lg_u32 s1, s2 ; encoding: [0x01,0x02,0x07,0xbf]
  38
  39 s_cmp_gt_u32 s1, s2
  40 // GCN: s_cmp_gt_u32 s1, s2 ; encoding: [0x01,0x02,0x08,0xbf]
  41
  42 s_cmp_ge_u32 s1, s2
  43 // GCN: s_cmp_ge_u32 s1, s2 ; encoding: [0x01,0x02,0x09,0xbf]
  44
  45 s_cmp_lt_u32 s1, s2
  46 // GCN: s_cmp_lt_u32 s1, s2 ; encoding: [0x01,0x02,0x0a,0xbf]
  47
  48 s_cmp_le_u32 s1, s2
  49 // GCN: s_cmp_le_u32 s1, s2 ; encoding: [0x01,0x02,0x0b,0xbf]
  50
  51 s_bitcmp0_b32 s1, s2
  52 // GCN: s_bitcmp0_b32 s1, s2 ; encoding: [0x01,0x02,0x0c,0xbf]
  53
  54 s_bitcmp1_b32 s1, s2
  55 // GCN: s_bitcmp1_b32 s1, s2 ; encoding: [0x01,0x02,0x0d,0xbf]
  56
  57 s_bitcmp0_b64 s[2:3], s4
  58 // GCN: s_bitcmp0_b64 s[2:3], s4 ; encoding: [0x02,0x04,0x0e,0xbf]
  59
  60 s_bitcmp1_b64 s[2:3], s4
  61 // GCN: s_bitcmp1_b64 s[2:3], s4 ; encoding: [0x02,0x04,0x0f,0xbf]
  62
  63 s_setvskip s3, s5
  64 // GCN: s_setvskip s3, s5 ; encoding: [0x03,0x05,0x10,0xbf]
  65
  66 s_cmp_eq_u64 s[0:1], s[2:3]
  67 // VI: s_cmp_eq_u64 s[0:1], s[2:3] ; encoding: [0x00,0x02,0x12,0xbf]
  68 // NOSICI: error: instruction not supported on this GPU
  69
  70 s_cmp_lg_u64 s[0:1], s[2:3]
  71 // VI: s_cmp_lg_u64 s[0:1], s[2:3] ; encoding: [0x00,0x02,0x13,0xbf]
  72 // NOSICI: error: instruction not supported on this GPU
  73
  74 s_set_gpr_idx_on s0, 0
  75 // VI: s_set_gpr_idx_on s0, 0 ; encoding: [0x00,0x00,0x11,0xbf]
  76 // NOSICI: error: instruction not supported on this GPU
  77
  78 s_set_gpr_idx_on s0, 1
  79 // VI: s_set_gpr_idx_on s0, src0 ; encoding: [0x00,0x01,0x11,0xbf]
  80 // NOSICI: error: instruction not supported on this GPU
  81
  82 s_set_gpr_idx_on s0, 3
  83 // VI: s_set_gpr_idx_on s0, src0 src1 ; encoding: [0x00,0x03,0x11,0xbf]
  84 // NOSICI: error: instruction not supported on this GPU
  85
  86 s_set_gpr_idx_on s0, 15
  87 // VI: s_set_gpr_idx_on s0, dst src0 src1 src2 ; encoding: [0x00,0x0f,0x11,0xbf]
  88 // NOSICI: error: instruction not supported on this GPU