Revert r354244 "[DAGCombiner] Eliminate dead stores to stack."
[llvm-complete.git] / test / MC / AMDGPU / vop2-err.s
blobaaf706eb2383993da8e63e4294d8ff0dcff0ba42
1 // RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
2 // RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s
4 //===----------------------------------------------------------------------===//
5 // Generic checks
6 //===----------------------------------------------------------------------===//
8 v_mul_i32_i24 v1, v2, 100
9 // CHECK: error: invalid operand for instruction
11 v_cndmask_b32 v1, v2, v3
12 // CHECK: error: too few operands for instruction
14 //===----------------------------------------------------------------------===//
15 // _e32 checks
16 //===----------------------------------------------------------------------===//
18 // Immediate src1
19 v_mul_i32_i24_e32 v1, v2, 100
20 // CHECK: error: invalid operand for instruction
22 // sgpr src1
23 v_mul_i32_i24_e32 v1, v2, s3
24 // CHECK: error: invalid operand for instruction
26 v_cndmask_b32_e32 v1, v2, v3, s[0:1]
27 // CHECK: error: invalid operand for instruction
29 //===----------------------------------------------------------------------===//
30 // _e64 checks
31 //===----------------------------------------------------------------------===//
33 // Immediate src0
34 v_mul_i32_i24_e64 v1, 100, v3
35 // CHECK: error: invalid operand for instruction
37 // Immediate src1
38 v_mul_i32_i24_e64 v1, v2, 100
39 // CHECK: error: invalid operand for instruction
41 v_add_i32_e32 v1, s[0:1], v2, v3
42 // CHECK: error: invalid operand for instruction
44 v_addc_u32_e32 v1, vcc, v2, v3, s[2:3]
45 // CHECK: error: invalid operand for instruction
47 v_addc_u32_e32 v1, s[0:1], v2, v3, s[2:3]
48 // CHECK: error: invalid operand for instruction
50 v_addc_u32_e32 v1, vcc, v2, v3, -1
51 // CHECK: error: invalid operand for instruction
53 v_addc_u32_e32 v1, vcc, v2, v3, 123
54 // CHECK: error: invalid operand for instruction
56 v_addc_u32_e32 v1, vcc, v2, v3, s0
57 // CHECK: error: invalid operand for instruction
59 v_addc_u32_e32 v1, -1, v2, v3, s0
60 // CHECK: error: invalid operand for instruction
62 v_addc_u32_e64 v1, s[0:1], v2, v3, 123
63 // CHECK: error: invalid operand for instruction
65 v_addc_u32 v1, s[0:1], v2, v3, 123
66 // CHECK: error: invalid operand for instruction
68 // TODO: Constant bus restrictions