test/MC/Disassembler/ARM/thumb-v8.1a.txt

   1 # RUN: llvm-mc -triple thumbv8 -mattr=+v8.1a  --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V81a
   2 # RUN: not llvm-mc -triple thumbv8 -mattr=+v8 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=CHECK-V8
   3
   4 [0x11,0xff,0x12,0x0b]
   5 # CHECK-V81a: vqrdmlah.s16  d0, d1, d2
   6 # CHECK-V8: warning: invalid instruction encoding
   7 # CHECK-V8: [0x11,0xff,0x12,0x0b]
   8 # CHECK-V8: ^
   9
  10 [0x21,0xff,0x12,0x0b]
  11 # CHECK-V81a: vqrdmlah.s32  d0, d1, d2
  12 # CHECK-V8: warning: invalid instruction encoding
  13 # CHECK-V8: [0x21,0xff,0x12,0x0b]
  14 # CHECK-V8: ^
  15
  16 [0x12,0xff,0x54,0x0b]
  17 # CHECK-V81a: vqrdmlah.s16  q0, q1, q2
  18 # CHECK-V8: warning: invalid instruction encoding
  19 # CHECK-V8: [0x12,0xff,0x54,0x0b]
  20 # CHECK-V8: ^
  21
  22 [0x26,0xff,0x50,0x4b]
  23 # CHECK-V81a: vqrdmlah.s32  q2, q3, q0
  24 # CHECK-V8: warning: invalid instruction encoding
  25 # CHECK-V8: [0x26,0xff,0x50,0x4b]
  26 # CHECK-V8: ^
  27
  28 [0x16,0xff,0x15,0x7c]
  29 # CHECK-V81a: vqrdmlsh.s16  d7, d6, d5
  30 # CHECK-V8: warning: invalid instruction encoding
  31 # CHECK-V8: [0x16,0xff,0x15,0x7c]
  32 # CHECK-V8: ^
  33
  34 [0x21,0xff,0x12,0x0c]
  35 # CHECK-V81a: vqrdmlsh.s32  d0, d1, d2
  36 # CHECK-V8: warning: invalid instruction encoding
  37 # CHECK-V8: [0x21,0xff,0x12,0x0c]
  38 # CHECK-V8: ^
  39
  40 [0x12,0xff,0x54,0x0c]
  41 # CHECK-V81a: vqrdmlsh.s16  q0, q1, q2
  42 # CHECK-V8: warning: invalid instruction encoding
  43 # CHECK-V8: [0x12,0xff,0x54,0x0c]
  44 # CHECK-V8: ^
  45
  46 [0x28,0xff,0x5a,0x6c]
  47 # CHECK-V81a: vqrdmlsh.s32  q3, q4, q5
  48 # CHECK-V8: warning: invalid instruction encoding
  49 # CHECK-V8: [0x28,0xff,0x5a,0x6c]
  50 # CHECK-V8: ^
  51
  52 [0x91,0xef,0x42,0x0e]
  53 # CHECK-V81a: vqrdmlah.s16  d0, d1, d2[0]
  54 # CHECK-V8: warning: invalid instruction encoding
  55 # CHECK-V8: [0x91,0xef,0x42,0x0e]
  56 # CHECK-V8: ^
  57
  58 [0xa1,0xef,0x42,0x0e]
  59 # CHECK-V81a: vqrdmlah.s32  d0, d1, d2[0]
  60 # CHECK-V8: warning: invalid instruction encoding
  61 # CHECK-V8: [0xa1,0xef,0x42,0x0e]
  62 # CHECK-V8: ^
  63
  64 [0x92,0xff,0x42,0x0e]
  65 # CHECK-V81a: vqrdmlah.s16  q0, q1, d2[0]
  66 # CHECK-V8: warning: invalid instruction encoding
  67 # CHECK-V8: [0x92,0xff,0x42,0x0e]
  68 # CHECK-V8: ^
  69
  70 [0xa2,0xff,0x42,0x0e]
  71 # CHECK-V81a: vqrdmlah.s32  q0, q1, d2[0]
  72 # CHECK-V8: warning: invalid instruction encoding
  73 # CHECK-V8: [0xa2,0xff,0x42,0x0e]
  74 # CHECK-V8: ^
  75
  76 [0x91,0xef,0x42,0x0f]
  77 # CHECK-V81a: vqrdmlsh.s16  d0, d1, d2[0]
  78 # CHECK-V8: warning: invalid instruction encoding
  79 # CHECK-V8: [0x91,0xef,0x42,0x0f]
  80 # CHECK-V8: ^
  81
  82 [0xa1,0xef,0x42,0x0f]
  83 # CHECK-V81a: vqrdmlsh.s32  d0, d1, d2[0]
  84 # CHECK-V8: warning: invalid instruction encoding
  85 # CHECK-V8: [0xa1,0xef,0x42,0x0f]
  86 # CHECK-V8: ^
  87
  88 [0x92,0xff,0x42,0x0f]
  89 # CHECK-V81a: vqrdmlsh.s16  q0, q1, d2[0]
  90 # CHECK-V8: warning: invalid instruction encoding
  91 # CHECK-V8: [0x92,0xff,0x42,0x0f]
  92 # CHECK-V8: ^
  93
  94 [0xa2,0xff,0x42,0x0f]
  95 # CHECK-V81a: vqrdmlsh.s32  q0, q1, d2[0]
  96 # CHECK-V8: warning: invalid instruction encoding
  97 # CHECK-V8: [0xa2,0xff,0x42,0x0f]
  98 # CHECK-V8: ^
  99
 100 [0x10,0xb6]
 101 # CHECK-V81a: setpan #0
 102 # CHECK-V8: warning: invalid instruction encoding
 103 # CHECK-V8: [0x10,0xb6]
 104 # CHECK-V8: ^
 105
 106 [0x18,0xb6]
 107 # CHECK-V81a: setpan #1
 108 # CHECK-V8: warning: invalid instruction encoding
 109 # CHECK-V8: [0x18,0xb6]
 110 # CHECK-V8: ^