1 # RUN: llc -mtriple=thumbv8.1m.main %s -run-pass=arm-low-overhead-loops -o -
2 # CHECK: bb.1.for.body.preheader:
6 # CHECK: $lr = t2LEUpdate renamable $lr, %bb.2
9 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
10 target triple = "thumbv8.1m.main-unknown-unknown"
12 ; Function Attrs: norecurse nounwind readonly
13 define dso_local arm_aapcscc i32 @search(i8* nocapture readonly %c, i32 %N) local_unnamed_addr #0 {
15 %cmp11 = icmp eq i32 %N, 0
16 br i1 %cmp11, label %for.cond.cleanup, label %for.body.preheader
19 call void @llvm.set.loop.iterations.i32(i32 %N)
23 %found.0.lcssa = phi i32 [ 0, %entry ], [ %found.1, %for.inc ]
24 %spaces.0.lcssa = phi i32 [ 0, %entry ], [ %spaces.1, %for.inc ]
25 %sub = sub nsw i32 %found.0.lcssa, %spaces.0.lcssa
29 %lsr.iv1 = phi i8* [ %c, %for.body.preheader ], [ %scevgep, %for.inc ]
30 %spaces.013 = phi i32 [ %spaces.1, %for.inc ], [ 0, %for.body.preheader ]
31 %found.012 = phi i32 [ %found.1, %for.inc ], [ 0, %for.body.preheader ]
32 %0 = phi i32 [ %N, %for.body.preheader ], [ %3, %for.inc ]
33 %1 = load i8, i8* %lsr.iv1, align 1
34 %2 = zext i8 %1 to i32
35 switch i32 %2, label %for.inc [
43 %inc = add nsw i32 %found.012, 1
47 %inc2 = add nsw i32 %spaces.013, 1
51 %found.1 = phi i32 [ %found.012, %for.body ], [ %found.012, %sw.bb1 ], [ %inc, %sw.bb ]
52 %spaces.1 = phi i32 [ %spaces.013, %for.body ], [ %inc2, %sw.bb1 ], [ %spaces.013, %sw.bb ]
53 %scevgep = getelementptr i8, i8* %lsr.iv1, i32 1
54 %3 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %0, i32 1)
55 %4 = icmp ne i32 %3, 0
56 br i1 %4, label %for.body, label %for.cond.cleanup
59 declare void @llvm.set.loop.iterations.i32(i32) #1
60 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #1
61 declare void @llvm.stackprotector(i8*, i8**) #2
63 attributes #0 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv8.1-m.main,+hwdiv,+ras,+soft-float,+strict-align,+thumb-mode,-crypto,-d32,-dotprod,-fp-armv8,-fp-armv8d16,-fp-armv8d16sp,-fp-armv8sp,-fp16,-fp16fml,-fp64,-fpregs,-fullfp16,-neon,-vfp2,-vfp2d16,-vfp2d16sp,-vfp2sp,-vfp3,-vfp3d16,-vfp3d16sp,-vfp3sp,-vfp4,-vfp4d16,-vfp4d16sp,-vfp4sp" "unsafe-fp-math"="false" "use-soft-float"="true" }
64 attributes #1 = { noduplicate nounwind }
65 attributes #2 = { nounwind }
71 exposesReturnsTwice: false
73 regBankSelected: false
76 tracksRegLiveness: true
80 - { reg: '$r0', virtual-reg: '' }
81 - { reg: '$r1', virtual-reg: '' }
83 isFrameAddressTaken: false
84 isReturnAddressTaken: false
94 cvBytesOfCalleeSavedRegisters: 0
95 hasOpaqueSPAdjustment: false
97 hasMustTailInVarArgFunc: false
103 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
104 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
105 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
106 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
107 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
108 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
109 - { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
110 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true,
111 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
112 - { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,
113 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
114 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
116 machineFunctionInfo: {}
119 successors: %bb.1(0x30000000), %bb.3(0x50000000)
120 liveins: $r0, $r1, $r4, $r6, $lr
122 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r6, $r7, killed $lr
123 frame-setup CFI_INSTRUCTION def_cfa_offset 16
124 frame-setup CFI_INSTRUCTION offset $lr, -4
125 frame-setup CFI_INSTRUCTION offset $r7, -8
126 frame-setup CFI_INSTRUCTION offset $r6, -12
127 frame-setup CFI_INSTRUCTION offset $r4, -16
128 $r7 = frame-setup t2ADDri $sp, 8, 14, $noreg, $noreg
129 frame-setup CFI_INSTRUCTION def_cfa $r7, 8
130 t2CMPri $r1, 0, 14, $noreg, implicit-def $cpsr
131 t2Bcc %bb.1, 0, killed $cpsr
133 bb.3.for.body.preheader:
134 successors: %bb.4(0x80000000)
137 $lr = tMOVr $r1, 14, $noreg
138 t2DoLoopStart killed $r1
139 renamable $r1 = t2MOVi 0, 14, $noreg, $noreg
140 renamable $r12 = t2MOVi 1, 14, $noreg, $noreg
141 renamable $r2 = t2MOVi 0, 14, $noreg, $noreg
144 successors: %bb.5(0x26666665), %bb.6(0x5999999b)
145 liveins: $lr, $r0, $r1, $r2, $r12
147 renamable $r3 = t2LDRBi12 renamable $r0, 0, 14, $noreg :: (load 1 from %ir.lsr.iv1)
148 renamable $r4 = t2SUBri renamable $r3, 108, 14, $noreg, $noreg
149 renamable $lr = t2LoopDec killed renamable $lr, 1
150 t2CMPri renamable $r4, 4, 14, $noreg, implicit-def $cpsr
151 t2Bcc %bb.5, 8, killed $cpsr
154 successors: %bb.7(0x6db6db6e), %bb.5(0x12492492)
155 liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r12
157 renamable $r4 = t2LSLrr renamable $r12, killed renamable $r4, 14, $noreg, $noreg
158 t2TSTri killed renamable $r4, 25, 14, $noreg, implicit-def $cpsr
159 t2Bcc %bb.5, 0, killed $cpsr
162 successors: %bb.8(0x80000000)
163 liveins: $lr, $r0, $r1, $r2, $r12
165 renamable $r2 = nsw t2ADDri killed renamable $r2, 1, 14, $noreg, $noreg
166 t2B %bb.8, 14, $noreg
169 successors: %bb.8(0x80000000)
170 liveins: $lr, $r0, $r1, $r2, $r3, $r12
172 t2CMPri killed renamable $r3, 32, 14, $noreg, implicit-def $cpsr
173 BUNDLE implicit-def dead $itstate, implicit-def $r1, implicit killed $r1, implicit killed $cpsr {
174 t2IT 0, 8, implicit-def $itstate
175 renamable $r1 = nsw t2ADDri killed renamable $r1, 1, 0, killed $cpsr, $noreg, implicit $r1, implicit internal killed $itstate
179 successors: %bb.4(0x7c000000), %bb.2(0x04000000)
180 liveins: $lr, $r0, $r1, $r2, $r12
182 renamable $r0 = t2ADDri killed renamable $r0, 1, 14, $noreg, $noreg
183 t2LoopEnd renamable $lr, %bb.4
184 t2B %bb.2, 14, $noreg
186 bb.2.for.cond.cleanup:
189 renamable $r0 = nsw t2SUBrr killed renamable $r2, killed renamable $r1, 14, $noreg, $noreg
190 $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r6, def $r7, def $pc, implicit killed $r0
193 renamable $r2 = t2MOVi 0, 14, $noreg, $noreg
194 renamable $r1 = t2MOVi 0, 14, $noreg, $noreg
195 renamable $r0 = nsw t2SUBrr killed renamable $r2, killed renamable $r1, 14, $noreg, $noreg
196 $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r6, def $r7, def $pc, implicit killed $r0