| blob | 7d6a2ee17a9c0a091781fa15e134e6cb24ea4217 |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -chr -instcombine -simplifycfg -S | FileCheck %s
3 ; RUN: opt < %s -passes='require<profile-summary>,function(chr,instcombine,simplify-cfg)' -S | FileCheck %s
5 declare void @foo()
6 declare void @bar()
8 ; Simple case.
9 ; Roughly,
10 ; t0 = *i
11 ; if ((t0 & 1) != 0) // Likely true
12 ; foo()
13 ; if ((t0 & 2) != 0) // Likely true
14 ; foo()
15 ; ->
16 ; t0 = *i
17 ; if ((t0 & 3) != 0) { // Likely true
18 ; foo()
19 ; foo()
20 ; } else {
21 ; if ((t0 & 1) != 0)
22 ; foo()
23 ; if ((t0 & 2) != 0)
24 ; foo()
25 ; }
26 define void @test_chr_1(i32* %i) !prof !14 {
27 ; CHECK-LABEL: @test_chr_1(
28 ; CHECK-NEXT: entry:
29 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
30 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
31 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
32 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
33 ; CHECK: bb0:
34 ; CHECK-NEXT: call void @foo()
35 ; CHECK-NEXT: call void @foo()
36 ; CHECK-NEXT: br label [[BB3:%.*]]
37 ; CHECK: entry.split.nonchr:
38 ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
39 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0
40 ; CHECK-NEXT: br i1 [[TMP4]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof !16
41 ; CHECK: bb0.nonchr:
42 ; CHECK-NEXT: call void @foo()
43 ; CHECK-NEXT: br label [[BB1_NONCHR]]
44 ; CHECK: bb1.nonchr:
45 ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 2
46 ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
47 ; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof !16
48 ; CHECK: bb2.nonchr:
49 ; CHECK-NEXT: call void @foo()
50 ; CHECK-NEXT: br label [[BB3]]
51 ; CHECK: bb3:
52 ; CHECK-NEXT: ret void
53 ;
54 entry:
55 %0 = load i32, i32* %i
56 %1 = and i32 %0, 1
57 %2 = icmp eq i32 %1, 0
58 br i1 %2, label %bb1, label %bb0, !prof !15
60 bb0:
61 call void @foo()
62 br label %bb1
64 bb1:
65 %3 = and i32 %0, 2
66 %4 = icmp eq i32 %3, 0
67 br i1 %4, label %bb3, label %bb2, !prof !15
69 bb2:
70 call void @foo()
71 br label %bb3
73 bb3:
74 ret void
75 }
77 ; Simple case with a cold block.
78 ; Roughly,
79 ; t0 = *i
80 ; if ((t0 & 1) != 0) // Likely true
81 ; foo()
82 ; if ((t0 & 2) == 0) // Likely false
83 ; bar()
84 ; if ((t0 & 4) != 0) // Likely true
85 ; foo()
86 ; ->
87 ; t0 = *i
88 ; if ((t0 & 7) == 7) { // Likely true
89 ; foo()
90 ; foo()
91 ; } else {
92 ; if ((t0 & 1) != 0)
93 ; foo()
94 ; if ((t0 & 2) == 0)
95 ; bar()
96 ; if ((t0 & 4) != 0)
97 ; foo()
98 ; }
99 define void @test_chr_1_1(i32* %i) !prof !14 {
100 ; CHECK-LABEL: @test_chr_1_1(
101 ; CHECK-NEXT: entry:
102 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
103 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 7
104 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 7
105 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
106 ; CHECK: bb0:
107 ; CHECK-NEXT: call void @foo()
108 ; CHECK-NEXT: call void @foo()
109 ; CHECK-NEXT: br label [[BB5:%.*]]
110 ; CHECK: entry.split.nonchr:
111 ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
112 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0
113 ; CHECK-NEXT: br i1 [[TMP4]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof !16
114 ; CHECK: bb0.nonchr:
115 ; CHECK-NEXT: call void @foo()
116 ; CHECK-NEXT: br label [[BB1_NONCHR]]
117 ; CHECK: bb1.nonchr:
118 ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 2
119 ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
120 ; CHECK-NEXT: br i1 [[TMP6]], label [[BB2_NONCHR:%.*]], label [[BB3_NONCHR:%.*]], !prof !16
121 ; CHECK: bb2.nonchr:
122 ; CHECK-NEXT: call void @bar()
123 ; CHECK-NEXT: br label [[BB3_NONCHR]]
124 ; CHECK: bb3.nonchr:
125 ; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 4
126 ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
127 ; CHECK-NEXT: br i1 [[TMP8]], label [[BB5]], label [[BB4_NONCHR:%.*]], !prof !16
128 ; CHECK: bb4.nonchr:
129 ; CHECK-NEXT: call void @foo()
130 ; CHECK-NEXT: br label [[BB5]]
131 ; CHECK: bb5:
132 ; CHECK-NEXT: ret void
133 ;
134 entry:
135 %0 = load i32, i32* %i
136 %1 = and i32 %0, 1
137 %2 = icmp eq i32 %1, 0
138 br i1 %2, label %bb1, label %bb0, !prof !15
140 bb0:
141 call void @foo()
142 br label %bb1
144 bb1:
145 %3 = and i32 %0, 2
146 %4 = icmp eq i32 %3, 0
147 br i1 %4, label %bb2, label %bb3, !prof !15
149 bb2:
150 call void @bar()
151 br label %bb3
153 bb3:
154 %5 = and i32 %0, 4
155 %6 = icmp eq i32 %5, 0
156 br i1 %6, label %bb5, label %bb4, !prof !15
158 bb4:
159 call void @foo()
160 br label %bb5
162 bb5:
163 ret void
164 }
166 ; With an aggregate bit check.
167 ; Roughly,
168 ; t0 = *i
169 ; if ((t0 & 255) != 0) // Likely true
170 ; if ((t0 & 1) != 0) // Likely true
171 ; foo()
172 ; if ((t0 & 2) != 0) // Likely true
173 ; foo()
174 ; ->
175 ; t0 = *i
176 ; if ((t0 & 3) != 0) { // Likely true
177 ; foo()
178 ; foo()
179 ; } else if ((t0 & 255) != 0)
180 ; if ((t0 & 1) != 0)
181 ; foo()
182 ; if ((t0 & 2) != 0)
183 ; foo()
184 ; }
185 define void @test_chr_2(i32* %i) !prof !14 {
186 ; CHECK-LABEL: @test_chr_2(
187 ; CHECK-NEXT: entry:
188 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
189 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
190 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
191 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
192 ; CHECK: bb1:
193 ; CHECK-NEXT: call void @foo()
194 ; CHECK-NEXT: call void @foo()
195 ; CHECK-NEXT: br label [[BB4:%.*]]
196 ; CHECK: entry.split.nonchr:
197 ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 255
198 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0
199 ; CHECK-NEXT: br i1 [[TMP4]], label [[BB4]], label [[BB0_NONCHR:%.*]], !prof !16
200 ; CHECK: bb0.nonchr:
201 ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 1
202 ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
203 ; CHECK-NEXT: br i1 [[TMP6]], label [[BB2_NONCHR:%.*]], label [[BB1_NONCHR:%.*]], !prof !16
204 ; CHECK: bb2.nonchr:
205 ; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 2
206 ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
207 ; CHECK-NEXT: br i1 [[TMP8]], label [[BB4]], label [[BB3_NONCHR:%.*]], !prof !16
208 ; CHECK: bb3.nonchr:
209 ; CHECK-NEXT: call void @foo()
210 ; CHECK-NEXT: br label [[BB4]]
211 ; CHECK: bb1.nonchr:
212 ; CHECK-NEXT: call void @foo()
213 ; CHECK-NEXT: br label [[BB2_NONCHR]]
214 ; CHECK: bb4:
215 ; CHECK-NEXT: ret void
216 ;
217 entry:
218 %0 = load i32, i32* %i
219 %1 = and i32 %0, 255
220 %2 = icmp eq i32 %1, 0
221 br i1 %2, label %bb4, label %bb0, !prof !15
223 bb0:
224 %3 = and i32 %0, 1
225 %4 = icmp eq i32 %3, 0
226 br i1 %4, label %bb2, label %bb1, !prof !15
228 bb1:
229 call void @foo()
230 br label %bb2
232 bb2:
233 %5 = and i32 %0, 2
234 %6 = icmp eq i32 %5, 0
235 br i1 %6, label %bb4, label %bb3, !prof !15
237 bb3:
238 call void @foo()
239 br label %bb4
241 bb4:
242 ret void
243 }
245 ; Split case.
246 ; Roughly,
247 ; t1 = *i
248 ; if ((t1 & 1) != 0) // Likely true
249 ; foo()
250 ; if ((t1 & 2) != 0) // Likely true
251 ; foo()
252 ; t2 = *i
253 ; if ((t2 & 4) != 0) // Likely true
254 ; foo()
255 ; if ((t2 & 8) != 0) // Likely true
256 ; foo()
257 ; ->
258 ; t1 = *i
259 ; if ((t1 & 3) != 0) { // Likely true
260 ; foo()
261 ; foo()
262 ; } else {
263 ; if ((t1 & 1) != 0)
264 ; foo()
265 ; if ((t1 & 2) != 0)
266 ; foo()
267 ; }
268 ; t2 = *i
269 ; if ((t2 & 12) != 0) { // Likely true
270 ; foo()
271 ; foo()
272 ; } else {
273 ; if ((t2 & 4) != 0)
274 ; foo()
275 ; if ((t2 & 8) != 0)
276 ; foo()
277 ; }
278 define void @test_chr_3(i32* %i) !prof !14 {
279 ; CHECK-LABEL: @test_chr_3(
280 ; CHECK-NEXT: entry:
281 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
282 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
283 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
284 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
285 ; CHECK: bb0:
286 ; CHECK-NEXT: call void @foo()
287 ; CHECK-NEXT: call void @foo()
288 ; CHECK-NEXT: br label [[BB3:%.*]]
289 ; CHECK: entry.split.nonchr:
290 ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
291 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0
292 ; CHECK-NEXT: br i1 [[TMP4]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof !16
293 ; CHECK: bb0.nonchr:
294 ; CHECK-NEXT: call void @foo()
295 ; CHECK-NEXT: br label [[BB1_NONCHR]]
296 ; CHECK: bb1.nonchr:
297 ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 2
298 ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
299 ; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof !16
300 ; CHECK: bb2.nonchr:
301 ; CHECK-NEXT: call void @foo()
302 ; CHECK-NEXT: br label [[BB3]]
303 ; CHECK: bb3:
304 ; CHECK-NEXT: [[TMP7:%.*]] = load i32, i32* [[I]], align 4
305 ; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[TMP7]], 12
306 ; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 12
307 ; CHECK-NEXT: br i1 [[TMP9]], label [[BB4:%.*]], label [[BB3_SPLIT_NONCHR:%.*]], !prof !15
308 ; CHECK: bb4:
309 ; CHECK-NEXT: call void @foo()
310 ; CHECK-NEXT: call void @foo()
311 ; CHECK-NEXT: br label [[BB7:%.*]]
312 ; CHECK: bb3.split.nonchr:
313 ; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP7]], 4
314 ; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
315 ; CHECK-NEXT: br i1 [[TMP11]], label [[BB5_NONCHR:%.*]], label [[BB4_NONCHR:%.*]], !prof !16
316 ; CHECK: bb4.nonchr:
317 ; CHECK-NEXT: call void @foo()
318 ; CHECK-NEXT: br label [[BB5_NONCHR]]
319 ; CHECK: bb5.nonchr:
320 ; CHECK-NEXT: [[TMP12:%.*]] = and i32 [[TMP7]], 8
321 ; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[TMP12]], 0
322 ; CHECK-NEXT: br i1 [[TMP13]], label [[BB7]], label [[BB6_NONCHR:%.*]], !prof !16
323 ; CHECK: bb6.nonchr:
324 ; CHECK-NEXT: call void @foo()
325 ; CHECK-NEXT: br label [[BB7]]
326 ; CHECK: bb7:
327 ; CHECK-NEXT: ret void
328 ;
329 entry:
330 %0 = load i32, i32* %i
331 %1 = and i32 %0, 1
332 %2 = icmp eq i32 %1, 0
333 br i1 %2, label %bb1, label %bb0, !prof !15
335 bb0:
336 call void @foo()
337 br label %bb1
339 bb1:
340 %3 = and i32 %0, 2
341 %4 = icmp eq i32 %3, 0
342 br i1 %4, label %bb3, label %bb2, !prof !15
344 bb2:
345 call void @foo()
346 br label %bb3
348 bb3:
349 %5 = load i32, i32* %i
350 %6 = and i32 %5, 4
351 %7 = icmp eq i32 %6, 0
352 br i1 %7, label %bb5, label %bb4, !prof !15
354 bb4:
355 call void @foo()
356 br label %bb5
358 bb5:
359 %8 = and i32 %5, 8
360 %9 = icmp eq i32 %8, 0
361 br i1 %9, label %bb7, label %bb6, !prof !15
363 bb6:
364 call void @foo()
365 br label %bb7
367 bb7:
368 ret void
369 }
371 ; Selects.
372 ; Roughly,
373 ; t0 = *i
374 ; sum1 = (t0 & 1) ? sum0 : (sum0 + 42) // Likely false
375 ; sum2 = (t0 & 2) ? sum1 : (sum1 + 43) // Likely false
376 ; return sum2
377 ; ->
378 ; t0 = *i
379 ; if ((t0 & 3) == 3)
380 ; return sum0 + 85
381 ; else {
382 ; sum1 = (t0 & 1) ? sum0 : (sum0 + 42)
383 ; sum2 = (t0 & 2) ? sum1 : (sum1 + 43)
384 ; return sum2
385 ; }
386 define i32 @test_chr_4(i32* %i, i32 %sum0) !prof !14 {
387 ; CHECK-LABEL: @test_chr_4(
388 ; CHECK-NEXT: entry:
389 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
390 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
391 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
392 ; CHECK-NEXT: br i1 [[TMP2]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
393 ; CHECK: entry.split:
394 ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 85
395 ; CHECK-NEXT: ret i32 [[TMP3]]
396 ; CHECK: entry.split.nonchr:
397 ; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 42
398 ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 1
399 ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
400 ; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP6]], i32 [[SUM0]], i32 [[TMP4]], !prof !16
401 ; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 2
402 ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
403 ; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[SUM1_NONCHR]], 43
404 ; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP8]], i32 [[SUM1_NONCHR]], i32 [[TMP9]], !prof !16
405 ; CHECK-NEXT: ret i32 [[SUM2_NONCHR]]
406 ;
407 entry:
408 %0 = load i32, i32* %i
409 %1 = and i32 %0, 1
410 %2 = icmp eq i32 %1, 0
411 %3 = add i32 %sum0, 42
412 %sum1 = select i1 %2, i32 %sum0, i32 %3, !prof !15
413 %4 = and i32 %0, 2
414 %5 = icmp eq i32 %4, 0
415 %6 = add i32 %sum1, 43
416 %sum2 = select i1 %5, i32 %sum1, i32 %6, !prof !15
417 ret i32 %sum2
418 }
420 ; Selects + Brs
421 ; Roughly,
422 ; t0 = *i
423 ; if ((t0 & 255) != 0) { // Likely true
424 ; sum = (t0 & 1) ? sum0 : (sum0 + 42) // Likely false
425 ; sum = (t0 & 2) ? sum : (sum + 43) // Likely false
426 ; if ((t0 & 4) != 0) { // Likely true
427 ; sum3 = sum + 44
428 ; sum = (t0 & 8) ? sum3 : (sum3 + 44) // Likely false
429 ; }
430 ; }
431 ; return sum
432 ; ->
433 ; t0 = *i
434 ; if ((t0 & 15) != 15) { // Likely true
435 ; sum = sum0 + 173
436 ; } else if ((t0 & 255) != 0) {
437 ; sum = (t0 & 1) ? sum0 : (sum0 + 42)
438 ; sum = (t0 & 2) ? sum : (sum + 43)
439 ; if ((t0 & 4) != 0) {
440 ; sum3 = sum + 44
441 ; sum = (t0 & 8) ? sum3 : (sum3 + 44)
442 ; }
443 ; }
444 ; return sum
445 define i32 @test_chr_5(i32* %i, i32 %sum0) !prof !14 {
446 ; CHECK-LABEL: @test_chr_5(
447 ; CHECK-NEXT: entry:
448 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
449 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 15
450 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 15
451 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
452 ; CHECK: bb0:
453 ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 85
454 ; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 173
455 ; CHECK-NEXT: br label [[BB3:%.*]]
456 ; CHECK: entry.split.nonchr:
457 ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 255
458 ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
459 ; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
460 ; CHECK: bb0.nonchr:
461 ; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 1
462 ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
463 ; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[SUM0]], 42
464 ; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP8]], i32 [[SUM0]], i32 [[TMP9]], !prof !16
465 ; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP0]], 2
466 ; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
467 ; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[SUM1_NONCHR]], 43
468 ; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP11]], i32 [[SUM1_NONCHR]], i32 [[TMP12]], !prof !16
469 ; CHECK-NEXT: [[TMP13:%.*]] = and i32 [[TMP0]], 4
470 ; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP13]], 0
471 ; CHECK-NEXT: br i1 [[TMP14]], label [[BB3]], label [[BB1_NONCHR:%.*]], !prof !16
472 ; CHECK: bb1.nonchr:
473 ; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[TMP0]], 8
474 ; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
475 ; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP16]], i32 44, i32 88, !prof !16
476 ; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
477 ; CHECK-NEXT: br label [[BB3]]
478 ; CHECK: bb3:
479 ; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP4]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM2_NONCHR]], [[BB0_NONCHR]] ], [ [[SUM4_NONCHR]], [[BB1_NONCHR]] ]
480 ; CHECK-NEXT: ret i32 [[SUM6]]
481 ;
482 entry:
483 %0 = load i32, i32* %i
484 %1 = and i32 %0, 255
485 %2 = icmp eq i32 %1, 0
486 br i1 %2, label %bb3, label %bb0, !prof !15
488 bb0:
489 %3 = and i32 %0, 1
490 %4 = icmp eq i32 %3, 0
491 %5 = add i32 %sum0, 42
492 %sum1 = select i1 %4, i32 %sum0, i32 %5, !prof !15
493 %6 = and i32 %0, 2
494 %7 = icmp eq i32 %6, 0
495 %8 = add i32 %sum1, 43
496 %sum2 = select i1 %7, i32 %sum1, i32 %8, !prof !15
497 %9 = and i32 %0, 4
498 %10 = icmp eq i32 %9, 0
499 br i1 %10, label %bb2, label %bb1, !prof !15
501 bb1:
502 %sum3 = add i32 %sum2, 44
503 %11 = and i32 %0, 8
504 %12 = icmp eq i32 %11, 0
505 %13 = add i32 %sum3, 44
506 %sum4 = select i1 %12, i32 %sum3, i32 %13, !prof !15
507 br label %bb2
509 bb2:
510 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]
511 br label %bb3
513 bb3:
514 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]
515 ret i32 %sum6
516 }
518 ; Selects + Brs with a scope split in the middle
519 ; Roughly,
520 ; t0 = *i
521 ; if ((t0 & 255) != 0) { // Likely true
522 ; sum = (t0 & 1) ? sum0 : (sum0 + 42) // Likely false
523 ; sum = (t0 & 2) ? sum : (sum + 43) // Likely false
524 ; if ((sum0 & 4) != 0) { // Likely true. The condition doesn't use v.
525 ; sum3 = sum + 44
526 ; sum = (t0 & 8) ? sum3 : (sum3 + 44) // Likely false
527 ; }
528 ; }
529 ; return sum
530 ; ->
531 ; t0 = *i
532 ; if ((sum0 & 4) != 0 & (t0 & 11) != 11) { // Likely true
533 ; sum = sum0 + 173
534 ; } else if ((t0 & 255) != 0) {
535 ; sum = (t0 & 1) ? sum0 : (sum0 + 42)
536 ; sum = (t0 & 2) ? sum : (sum + 43)
537 ; if ((sum0 & 4) != 0) {
538 ; sum3 = sum + 44
539 ; sum = (t0 & 8) ? sum3 : (sum3 + 44)
540 ; }
541 ; }
542 ; return sum
543 define i32 @test_chr_5_1(i32* %i, i32 %sum0) !prof !14 {
544 ; CHECK-LABEL: @test_chr_5_1(
545 ; CHECK-NEXT: entry:
546 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
547 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUM0:%.*]], 4
548 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
549 ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 11
550 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 11
551 ; CHECK-NEXT: [[TMP5:%.*]] = and i1 [[TMP4]], [[TMP2]]
552 ; CHECK-NEXT: br i1 [[TMP5]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
553 ; CHECK: bb0:
554 ; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[SUM0]], 85
555 ; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[SUM0]], 173
556 ; CHECK-NEXT: br label [[BB3:%.*]]
557 ; CHECK: entry.split.nonchr:
558 ; CHECK-NEXT: [[TMP8:%.*]] = and i32 [[TMP0]], 255
559 ; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 0
560 ; CHECK-NEXT: br i1 [[TMP9]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
561 ; CHECK: bb0.nonchr:
562 ; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP0]], 1
563 ; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
564 ; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[SUM0]], 42
565 ; CHECK-NEXT: [[SUM1_NONCHR:%.*]] = select i1 [[TMP11]], i32 [[SUM0]], i32 [[TMP12]], !prof !16
566 ; CHECK-NEXT: [[TMP13:%.*]] = and i32 [[TMP0]], 2
567 ; CHECK-NEXT: [[TMP14:%.*]] = icmp eq i32 [[TMP13]], 0
568 ; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[SUM1_NONCHR]], 43
569 ; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP14]], i32 [[SUM1_NONCHR]], i32 [[TMP15]], !prof !16
570 ; CHECK-NEXT: [[TMP16:%.*]] = and i32 [[SUM0]], 4
571 ; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[TMP16]], 0
572 ; CHECK-NEXT: br i1 [[TMP17]], label [[BB3]], label [[BB1_NONCHR:%.*]], !prof !16
573 ; CHECK: bb1.nonchr:
574 ; CHECK-NEXT: [[TMP18:%.*]] = and i32 [[TMP0]], 8
575 ; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i32 [[TMP18]], 0
576 ; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP19]], i32 44, i32 88, !prof !16
577 ; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
578 ; CHECK-NEXT: br label [[BB3]]
579 ; CHECK: bb3:
580 ; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP7]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM2_NONCHR]], [[BB0_NONCHR]] ], [ [[SUM4_NONCHR]], [[BB1_NONCHR]] ]
581 ; CHECK-NEXT: ret i32 [[SUM6]]
582 ;
583 entry:
584 %0 = load i32, i32* %i
585 %1 = and i32 %0, 255
586 %2 = icmp eq i32 %1, 0
587 br i1 %2, label %bb3, label %bb0, !prof !15
589 bb0:
590 %3 = and i32 %0, 1
591 %4 = icmp eq i32 %3, 0
592 %5 = add i32 %sum0, 42
593 %sum1 = select i1 %4, i32 %sum0, i32 %5, !prof !15
594 %6 = and i32 %0, 2
595 %7 = icmp eq i32 %6, 0
596 %8 = add i32 %sum1, 43
597 %sum2 = select i1 %7, i32 %sum1, i32 %8, !prof !15
598 %9 = and i32 %sum0, 4 ; Split
599 %10 = icmp eq i32 %9, 0
600 br i1 %10, label %bb2, label %bb1, !prof !15
602 bb1:
603 %sum3 = add i32 %sum2, 44
604 %11 = and i32 %0, 8
605 %12 = icmp eq i32 %11, 0
606 %13 = add i32 %sum3, 44
607 %sum4 = select i1 %12, i32 %sum3, i32 %13, !prof !15
608 br label %bb2
610 bb2:
611 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]
612 br label %bb3
614 bb3:
615 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]
616 ret i32 %sum6
617 }
619 ; Selects + Brs, non-matching bases
620 ; Roughly,
621 ; i0 = *i
622 ; j0 = *j
623 ; if ((i0 & 255) != 0) { // Likely true
624 ; sum = (i0 & 2) ? sum0 : (sum0 + 43) // Likely false
625 ; if ((j0 & 4) != 0) { // Likely true. The condition uses j0, not i0.
626 ; sum3 = sum + 44
627 ; sum = (i0 & 8) ? sum3 : (sum3 + 44) // Likely false
628 ; }
629 ; }
630 ; return sum
631 ; ->
632 ; i0 = *i
633 ; j0 = *j
634 ; if ((j0 & 4) != 0 & (i0 & 10) != 10) { // Likely true
635 ; sum = sum0 + 131
636 ; } else if ((i0 & 255) != 0) {
637 ; sum = (i0 & 2) ? sum0 : (sum0 + 43)
638 ; if ((j0 & 4) != 0) {
639 ; sum3 = sum + 44
640 ; sum = (i0 & 8) ? sum3 : (sum3 + 44)
641 ; }
642 ; }
643 ; return sum
644 define i32 @test_chr_6(i32* %i, i32* %j, i32 %sum0) !prof !14 {
645 ; CHECK-LABEL: @test_chr_6(
646 ; CHECK-NEXT: entry:
647 ; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[I:%.*]], align 4
648 ; CHECK-NEXT: [[J0:%.*]] = load i32, i32* [[J:%.*]], align 4
649 ; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0]], 4
650 ; CHECK-NEXT: [[V10:%.*]] = icmp ne i32 [[V9]], 0
651 ; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[I0]], 10
652 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 10
653 ; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[V10]]
654 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
655 ; CHECK: bb0:
656 ; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43
657 ; CHECK-NEXT: [[V13:%.*]] = add i32 [[SUM0]], 131
658 ; CHECK-NEXT: br label [[BB3:%.*]]
659 ; CHECK: entry.split.nonchr:
660 ; CHECK-NEXT: [[V1:%.*]] = and i32 [[I0]], 255
661 ; CHECK-NEXT: [[V2:%.*]] = icmp eq i32 [[V1]], 0
662 ; CHECK-NEXT: br i1 [[V2]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
663 ; CHECK: bb0.nonchr:
664 ; CHECK-NEXT: [[V3_NONCHR:%.*]] = and i32 [[I0]], 2
665 ; CHECK-NEXT: [[V4_NONCHR:%.*]] = icmp eq i32 [[V3_NONCHR]], 0
666 ; CHECK-NEXT: [[V8_NONCHR:%.*]] = add i32 [[SUM0]], 43
667 ; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[V4_NONCHR]], i32 [[SUM0]], i32 [[V8_NONCHR]], !prof !16
668 ; CHECK-NEXT: [[V9_NONCHR:%.*]] = and i32 [[J0]], 4
669 ; CHECK-NEXT: [[V10_NONCHR:%.*]] = icmp eq i32 [[V9_NONCHR]], 0
670 ; CHECK-NEXT: br i1 [[V10_NONCHR]], label [[BB3]], label [[BB1_NONCHR:%.*]], !prof !16
671 ; CHECK: bb1.nonchr:
672 ; CHECK-NEXT: [[V11_NONCHR:%.*]] = and i32 [[I0]], 8
673 ; CHECK-NEXT: [[V12_NONCHR:%.*]] = icmp eq i32 [[V11_NONCHR]], 0
674 ; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[V12_NONCHR]], i32 44, i32 88, !prof !16
675 ; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
676 ; CHECK-NEXT: br label [[BB3]]
677 ; CHECK: bb3:
678 ; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[V13]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM2_NONCHR]], [[BB0_NONCHR]] ], [ [[SUM4_NONCHR]], [[BB1_NONCHR]] ]
679 ; CHECK-NEXT: ret i32 [[SUM6]]
680 ;
681 entry:
682 %i0 = load i32, i32* %i
683 %j0 = load i32, i32* %j
684 %v1 = and i32 %i0, 255
685 %v2 = icmp eq i32 %v1, 0
686 br i1 %v2, label %bb3, label %bb0, !prof !15
688 bb0:
689 %v3 = and i32 %i0, 2
690 %v4 = icmp eq i32 %v3, 0
691 %v8 = add i32 %sum0, 43
692 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !15
693 %v9 = and i32 %j0, 4
694 %v10 = icmp eq i32 %v9, 0
695 br i1 %v10, label %bb2, label %bb1, !prof !15
697 bb1:
698 %sum3 = add i32 %sum2, 44
699 %v11 = and i32 %i0, 8
700 %v12 = icmp eq i32 %v11, 0
701 %v13 = add i32 %sum3, 44
702 %sum4 = select i1 %v12, i32 %sum3, i32 %v13, !prof !15
703 br label %bb2
705 bb2:
706 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]
707 br label %bb3
709 bb3:
710 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]
711 ret i32 %sum6
712 }
714 ; Selects + Brs, the branch condition can't be hoisted to be merged with a
715 ; select. No CHR happens.
716 ; Roughly,
717 ; i0 = *i
718 ; sum = ((i0 & 2) == 0) ? sum0 : (sum0 + 43) // Likely false
719 ; foo();
720 ; j0 = *j
721 ; if ((j0 & 4) != 0) { // Likely true
722 ; foo();
723 ; sum = sum + 44
724 ; }
725 ; return sum
726 ; ->
727 ; (no change)
728 define i32 @test_chr_7(i32* %i, i32* %j, i32 %sum0) !prof !14 {
729 ; CHECK-LABEL: @test_chr_7(
730 ; CHECK-NEXT: entry:
731 ; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[I:%.*]], align 4
732 ; CHECK-NEXT: [[V3:%.*]] = and i32 [[I0]], 2
733 ; CHECK-NEXT: [[V4:%.*]] = icmp eq i32 [[V3]], 0
734 ; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43
735 ; CHECK-NEXT: [[SUM2:%.*]] = select i1 [[V4]], i32 [[SUM0]], i32 [[V8]], !prof !16
736 ; CHECK-NEXT: call void @foo()
737 ; CHECK-NEXT: [[J0:%.*]] = load i32, i32* [[J:%.*]], align 4
738 ; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0]], 4
739 ; CHECK-NEXT: [[V10:%.*]] = icmp eq i32 [[V9]], 0
740 ; CHECK-NEXT: br i1 [[V10]], label [[BB2:%.*]], label [[BB1:%.*]], !prof !16
741 ; CHECK: bb1:
742 ; CHECK-NEXT: call void @foo()
743 ; CHECK-NEXT: [[SUM4:%.*]] = add i32 [[SUM2]], 44
744 ; CHECK-NEXT: br label [[BB2]]
745 ; CHECK: bb2:
746 ; CHECK-NEXT: [[SUM5:%.*]] = phi i32 [ [[SUM2]], [[ENTRY:%.*]] ], [ [[SUM4]], [[BB1]] ]
747 ; CHECK-NEXT: ret i32 [[SUM5]]
748 ;
749 entry:
750 %i0 = load i32, i32* %i
751 %v3 = and i32 %i0, 2
752 %v4 = icmp eq i32 %v3, 0
753 %v8 = add i32 %sum0, 43
754 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !15
755 call void @foo()
756 %j0 = load i32, i32* %j
757 %v9 = and i32 %j0, 4
758 %v10 = icmp eq i32 %v9, 0
759 br i1 %v10, label %bb2, label %bb1, !prof !15 ; %v10 can't be hoisted above the above select
761 bb1:
762 call void @foo()
763 %sum4 = add i32 %sum2, 44
764 br label %bb2
766 bb2:
767 %sum5 = phi i32 [ %sum2, %entry ], [ %sum4, %bb1 ]
768 ret i32 %sum5
769 }
771 ; Selects + Brs, the branch condition can't be hoisted to be merged with the
772 ; selects. Dropping the select.
773 ; Roughly,
774 ; i0 = *i
775 ; sum = ((i0 & 2) == 0) ? sum0 : (sum0 + 43) // Likely false
776 ; foo();
777 ; j0 = *j
778 ; if ((j0 & 4) != 0) // Likely true
779 ; foo()
780 ; if ((j0 & 8) != 0) // Likely true
781 ; foo()
782 ; return sum
783 ; ->
784 ; i0 = *i
785 ; sum = ((i0 & 2) == 0) ? sum0 : (sum0 + 43) // Likely false
786 ; foo();
787 ; j0 = *j
788 ; if ((j0 & 12) != 12) { // Likely true
789 ; foo()
790 ; foo()
791 ; } else {
792 ; if ((j0 & 4) != 0)
793 ; foo()
794 ; if ((j0 & 8) != 0)
795 ; foo()
796 ; }
797 ; return sum
798 define i32 @test_chr_7_1(i32* %i, i32* %j, i32 %sum0) !prof !14 {
799 ; CHECK-LABEL: @test_chr_7_1(
800 ; CHECK-NEXT: entry:
801 ; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[I:%.*]], align 4
802 ; CHECK-NEXT: [[V3:%.*]] = and i32 [[I0]], 2
803 ; CHECK-NEXT: [[V4:%.*]] = icmp eq i32 [[V3]], 0
804 ; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43
805 ; CHECK-NEXT: [[SUM2:%.*]] = select i1 [[V4]], i32 [[SUM0]], i32 [[V8]], !prof !16
806 ; CHECK-NEXT: call void @foo()
807 ; CHECK-NEXT: [[J0:%.*]] = load i32, i32* [[J:%.*]], align 4
808 ; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[J0]], 12
809 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 12
810 ; CHECK-NEXT: br i1 [[TMP1]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
811 ; CHECK: bb0:
812 ; CHECK-NEXT: call void @foo()
813 ; CHECK-NEXT: call void @foo()
814 ; CHECK-NEXT: br label [[BB3:%.*]]
815 ; CHECK: entry.split.nonchr:
816 ; CHECK-NEXT: [[V9:%.*]] = and i32 [[J0]], 4
817 ; CHECK-NEXT: [[V10:%.*]] = icmp eq i32 [[V9]], 0
818 ; CHECK-NEXT: br i1 [[V10]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof !16
819 ; CHECK: bb0.nonchr:
820 ; CHECK-NEXT: call void @foo()
821 ; CHECK-NEXT: br label [[BB1_NONCHR]]
822 ; CHECK: bb1.nonchr:
823 ; CHECK-NEXT: [[V11_NONCHR:%.*]] = and i32 [[J0]], 8
824 ; CHECK-NEXT: [[V12_NONCHR:%.*]] = icmp eq i32 [[V11_NONCHR]], 0
825 ; CHECK-NEXT: br i1 [[V12_NONCHR]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof !16
826 ; CHECK: bb2.nonchr:
827 ; CHECK-NEXT: call void @foo()
828 ; CHECK-NEXT: br label [[BB3]]
829 ; CHECK: bb3:
830 ; CHECK-NEXT: ret i32 [[SUM2]]
831 ;
832 entry:
833 %i0 = load i32, i32* %i
834 %v3 = and i32 %i0, 2
835 %v4 = icmp eq i32 %v3, 0
836 %v8 = add i32 %sum0, 43
837 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !15
838 call void @foo()
839 %j0 = load i32, i32* %j
840 %v9 = and i32 %j0, 4
841 %v10 = icmp eq i32 %v9, 0
842 br i1 %v10, label %bb1, label %bb0, !prof !15 ; %v10 can't be hoisted above the above select
844 bb0:
845 call void @foo()
846 br label %bb1
848 bb1:
849 %v11 = and i32 %j0, 8
850 %v12 = icmp eq i32 %v11, 0
851 br i1 %v12, label %bb3, label %bb2, !prof !15
853 bb2:
854 call void @foo()
855 br label %bb3
857 bb3:
858 ret i32 %sum2
859 }
861 ; Branches aren't biased enough. No CHR happens.
862 ; Roughly,
863 ; t0 = *i
864 ; if ((t0 & 1) != 0) // Not biased
865 ; foo()
866 ; if ((t0 & 2) != 0) // Not biased
867 ; foo()
868 ; ->
869 ; (no change)
870 define void @test_chr_8(i32* %i) !prof !14 {
871 ; CHECK-LABEL: @test_chr_8(
872 ; CHECK-NEXT: entry:
873 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
874 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 1
875 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
876 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB1:%.*]], label [[BB0:%.*]], !prof !17
877 ; CHECK: bb0:
878 ; CHECK-NEXT: call void @foo()
879 ; CHECK-NEXT: br label [[BB1]]
880 ; CHECK: bb1:
881 ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 2
882 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0
883 ; CHECK-NEXT: br i1 [[TMP4]], label [[BB3:%.*]], label [[BB2:%.*]], !prof !17
884 ; CHECK: bb2:
885 ; CHECK-NEXT: call void @foo()
886 ; CHECK-NEXT: br label [[BB3]]
887 ; CHECK: bb3:
888 ; CHECK-NEXT: ret void
889 ;
890 entry:
891 %0 = load i32, i32* %i
892 %1 = and i32 %0, 1
893 %2 = icmp eq i32 %1, 0
894 br i1 %2, label %bb1, label %bb0, !prof !16
896 bb0:
897 call void @foo()
898 br label %bb1
900 bb1:
901 %3 = and i32 %0, 2
902 %4 = icmp eq i32 %3, 0
903 br i1 %4, label %bb3, label %bb2, !prof !16
905 bb2:
906 call void @foo()
907 br label %bb3
909 bb3:
910 ret void
911 }
913 ; With an existing phi at the exit.
914 ; Roughly,
915 ; t = *i
916 ; if ((t0 & 1) != 0) // Likely true
917 ; foo()
918 ; if ((t0 & 2) != 0) { // Likely true
919 ; t = *j
920 ; foo()
921 ; }
922 ; // There's a phi for t here.
923 ; return t
924 ; ->
925 ; t = *i
926 ; if ((t & 3) == 3) { // Likely true
927 ; foo()
928 ; t = *j
929 ; foo()
930 ; } else {
931 ; if ((t & 1) != 0)
932 ; foo()
933 ; if ((t & 2) != 0) {
934 ; t = *j
935 ; foo()
936 ; }
937 ; }
938 ; // There's a phi for t here.
939 ; return t
940 define i32 @test_chr_9(i32* %i, i32* %j) !prof !14 {
941 ; CHECK-LABEL: @test_chr_9(
942 ; CHECK-NEXT: entry:
943 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
944 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
945 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
946 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
947 ; CHECK: bb0:
948 ; CHECK-NEXT: call void @foo()
949 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[J:%.*]], align 4
950 ; CHECK-NEXT: call void @foo()
951 ; CHECK-NEXT: br label [[BB3:%.*]]
952 ; CHECK: entry.split.nonchr:
953 ; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 1
954 ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
955 ; CHECK-NEXT: br i1 [[TMP5]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof !16
956 ; CHECK: bb0.nonchr:
957 ; CHECK-NEXT: call void @foo()
958 ; CHECK-NEXT: br label [[BB1_NONCHR]]
959 ; CHECK: bb1.nonchr:
960 ; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP0]], 2
961 ; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
962 ; CHECK-NEXT: br i1 [[TMP7]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof !16
963 ; CHECK: bb2.nonchr:
964 ; CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[J]], align 4
965 ; CHECK-NEXT: call void @foo()
966 ; CHECK-NEXT: br label [[BB3]]
967 ; CHECK: bb3:
968 ; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP3]], [[BB0]] ], [ [[TMP0]], [[BB1_NONCHR]] ], [ [[TMP8]], [[BB2_NONCHR]] ]
969 ; CHECK-NEXT: ret i32 [[TMP9]]
970 ;
971 entry:
972 %0 = load i32, i32* %i
973 %1 = and i32 %0, 1
974 %2 = icmp eq i32 %1, 0
975 br i1 %2, label %bb1, label %bb0, !prof !15
977 bb0:
978 call void @foo()
979 br label %bb1
981 bb1:
982 %3 = and i32 %0, 2
983 %4 = icmp eq i32 %3, 0
984 br i1 %4, label %bb3, label %bb2, !prof !15
986 bb2:
987 %5 = load i32, i32* %j
988 call void @foo()
989 br label %bb3
991 bb3:
992 %6 = phi i32 [ %0, %bb1 ], [ %5, %bb2 ]
993 ret i32 %6
994 }
996 ; With no phi at the exit, but the exit needs a phi inserted after CHR.
997 ; Roughly,
998 ; t0 = *i
999 ; if ((t0 & 1) != 0) // Likely true
1000 ; foo()
1001 ; t1 = *j
1002 ; if ((t1 & 2) != 0) // Likely true
1003 ; foo()
1004 ; return (t1 * 42) - (t1 - 99)
1005 ; ->
1006 ; t0 = *i
1007 ; if ((t0 & 3) == 3) { // Likely true
1008 ; foo()
1009 ; t1 = *j
1010 ; foo()
1011 ; } else {
1012 ; if ((t0 & 1) != 0)
1013 ; foo()
1014 ; if ((t0 & 2) != 0) {
1015 ; t1 = *j
1016 ; foo()
1017 ; }
1018 ; }
1019 ; // A new phi for t1 is inserted here.
1020 ; return (t1 * 42) - (t1 - 99)
1021 define i32 @test_chr_10(i32* %i, i32* %j) !prof !14 {
1022 ; CHECK-LABEL: @test_chr_10(
1023 ; CHECK-NEXT: entry:
1024 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
1025 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
1026 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
1027 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
1028 ; CHECK: bb0:
1029 ; CHECK-NEXT: call void @foo()
1030 ; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[J:%.*]], align 4
1031 ; CHECK-NEXT: call void @foo()
1032 ; CHECK-NEXT: br label [[BB3:%.*]]
1033 ; CHECK: entry.split.nonchr:
1034 ; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP0]], 1
1035 ; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0
1036 ; CHECK-NEXT: br i1 [[TMP5]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof !16
1037 ; CHECK: bb0.nonchr:
1038 ; CHECK-NEXT: call void @foo()
1039 ; CHECK-NEXT: br label [[BB1_NONCHR]]
1040 ; CHECK: bb1.nonchr:
1041 ; CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[J]], align 4
1042 ; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 2
1043 ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
1044 ; CHECK-NEXT: br i1 [[TMP8]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof !16
1045 ; CHECK: bb2.nonchr:
1046 ; CHECK-NEXT: call void @foo()
1047 ; CHECK-NEXT: br label [[BB3]]
1048 ; CHECK: bb3:
1049 ; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ [[TMP3]], [[BB0]] ], [ [[TMP6]], [[BB2_NONCHR]] ], [ [[TMP6]], [[BB1_NONCHR]] ]
1050 ; CHECK-NEXT: [[TMP10:%.*]] = mul i32 [[TMP9]], 42
1051 ; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP9]], -99
1052 ; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP10]], [[TMP11]]
1053 ; CHECK-NEXT: ret i32 [[TMP12]]
1054 ;
1055 entry:
1056 %0 = load i32, i32* %i
1057 %1 = and i32 %0, 1
1058 %2 = icmp eq i32 %1, 0
1059 br i1 %2, label %bb1, label %bb0, !prof !15
1061 bb0:
1062 call void @foo()
1063 br label %bb1
1065 bb1:
1066 %3 = load i32, i32* %j
1067 %4 = and i32 %0, 2
1068 %5 = icmp eq i32 %4, 0
1069 br i1 %5, label %bb3, label %bb2, !prof !15
1071 bb2:
1072 call void @foo()
1073 br label %bb3
1075 bb3:
1076 %6 = mul i32 %3, 42
1077 %7 = sub i32 %3, 99
1078 %8 = add i32 %6, %7
1079 ret i32 %8
1080 }
1082 ; Test a case where there are two use-def chain paths to the same value (t0)
1083 ; from the branch condition. This is a regression test for an old bug that
1084 ; caused a bad hoisting that moves (hoists) a value (%conv) twice to the end of
1085 ; the %entry block (once for %div and once for %mul16) and put a use ahead of
1086 ; its definition like:
1087 ; %entry:
1088 ; ...
1089 ; %div = fdiv double 1.000000e+00, %conv
1090 ; %conv = sitofp i32 %0 to double
1091 ; %mul16 = fmul double %div, %conv
1092 ;
1093 ; Roughly,
1094 ; t0 = *i
1095 ; if ((t0 & 1) != 0) // Likely true
1096 ; foo()
1097 ; // there are two use-def paths from the branch condition to t0.
1098 ; if ((1.0 / t0) * t0 < 1) // Likely true
1099 ; foo()
1100 ; ->
1101 ; t0 = *i
1102 ; if ((t0 & 1) != 0 & (1.0 / t0) * t0 > 0) { // Likely true
1103 ; foo()
1104 ; foo()
1105 ; } else {
1106 ; if ((t0 & 1) != 0)
1107 ; foo()
1108 ; if ((1.0 / t0) * t0 < 1) // Likely true
1109 ; foo()
1110 ; }
1111 define void @test_chr_11(i32* %i, i32 %x) !prof !14 {
1112 ; CHECK-LABEL: @test_chr_11(
1113 ; CHECK-NEXT: entry:
1114 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
1115 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 1
1116 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
1117 ; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP0]] to double
1118 ; CHECK-NEXT: [[DIV:%.*]] = fdiv double 1.000000e+00, [[CONV]]
1119 ; CHECK-NEXT: [[MUL16:%.*]] = fmul double [[DIV]], [[CONV]]
1120 ; CHECK-NEXT: [[CONV717:%.*]] = fptosi double [[MUL16]] to i32
1121 ; CHECK-NEXT: [[CMP18:%.*]] = icmp sgt i32 [[CONV717]], 0
1122 ; CHECK-NEXT: [[TMP3:%.*]] = and i1 [[TMP2]], [[CMP18]]
1123 ; CHECK-NEXT: br i1 [[TMP3]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
1124 ; CHECK: bb0:
1125 ; CHECK-NEXT: call void @foo()
1126 ; CHECK-NEXT: call void @foo()
1127 ; CHECK-NEXT: br label [[BB3:%.*]]
1128 ; CHECK: entry.split.nonchr:
1129 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0_NONCHR:%.*]], label [[BB1_NONCHR:%.*]], !prof !18
1130 ; CHECK: bb0.nonchr:
1131 ; CHECK-NEXT: call void @foo()
1132 ; CHECK-NEXT: br label [[BB1_NONCHR]]
1133 ; CHECK: bb1.nonchr:
1134 ; CHECK-NEXT: [[CONV_NONCHR:%.*]] = sitofp i32 [[TMP0]] to double
1135 ; CHECK-NEXT: [[DIV_NONCHR:%.*]] = fdiv double 1.000000e+00, [[CONV_NONCHR]]
1136 ; CHECK-NEXT: [[MUL16_NONCHR:%.*]] = fmul double [[DIV_NONCHR]], [[CONV_NONCHR]]
1137 ; CHECK-NEXT: [[CONV717_NONCHR:%.*]] = fptosi double [[MUL16_NONCHR]] to i32
1138 ; CHECK-NEXT: [[CMP18_NONCHR:%.*]] = icmp slt i32 [[CONV717_NONCHR]], 1
1139 ; CHECK-NEXT: br i1 [[CMP18_NONCHR]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof !16
1140 ; CHECK: bb2.nonchr:
1141 ; CHECK-NEXT: call void @foo()
1142 ; CHECK-NEXT: br label [[BB3]]
1143 ; CHECK: bb3:
1144 ; CHECK-NEXT: ret void
1145 ;
1146 entry:
1147 %0 = load i32, i32* %i
1148 %1 = and i32 %0, 1
1149 %2 = icmp eq i32 %1, 0
1150 br i1 %2, label %bb1, label %bb0, !prof !15
1152 bb0:
1153 call void @foo()
1154 br label %bb1
1156 bb1:
1157 %conv = sitofp i32 %0 to double
1158 %div = fdiv double 1.000000e+00, %conv
1159 %mul16 = fmul double %div, %conv
1160 %conv717 = fptosi double %mul16 to i32
1161 %cmp18 = icmp slt i32 %conv717, 1
1162 br i1 %cmp18, label %bb3, label %bb2, !prof !15
1164 bb2:
1165 call void @foo()
1166 br label %bb3
1168 bb3:
1169 ret void
1170 }
1172 ; Selects + unrelated br only
1173 define i32 @test_chr_12(i32* %i, i32 %sum0) !prof !14 {
1174 ; CHECK-LABEL: @test_chr_12(
1175 ; CHECK-NEXT: entry:
1176 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
1177 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 255
1178 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
1179 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB3:%.*]], label [[BB0:%.*]], !prof !16
1180 ; CHECK: bb0:
1181 ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
1182 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0
1183 ; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[SUM0:%.*]], 42
1184 ; CHECK-NEXT: [[SUM1:%.*]] = select i1 [[TMP4]], i32 [[SUM0]], i32 [[TMP5]], !prof !16
1185 ; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP0]], 2
1186 ; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[TMP6]], 0
1187 ; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[SUM1]], 43
1188 ; CHECK-NEXT: [[SUM2:%.*]] = select i1 [[TMP7]], i32 [[SUM1]], i32 [[TMP8]], !prof !16
1189 ; CHECK-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4
1190 ; CHECK-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1191 ; CHECK-NEXT: [[TMP11:%.*]] = and i32 [[TMP0]], 8
1192 ; CHECK-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1193 ; CHECK-NEXT: [[TMP13:%.*]] = and i1 [[TMP10]], [[TMP12]]
1194 ; CHECK-NEXT: br i1 [[TMP13]], label [[BB1:%.*]], label [[BB0_SPLIT_NONCHR:%.*]], !prof !15
1195 ; CHECK: bb1:
1196 ; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[SUM2]], 88
1197 ; CHECK-NEXT: br label [[BB3]]
1198 ; CHECK: bb0.split.nonchr:
1199 ; CHECK-NEXT: br i1 [[TMP10]], label [[BB1_NONCHR:%.*]], label [[BB3]], !prof !18
1200 ; CHECK: bb1.nonchr:
1201 ; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[TMP0]], 8
1202 ; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[TMP15]], 0
1203 ; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP16]], i32 44, i32 88, !prof !16
1204 ; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2]], [[SUM4_NONCHR_V]]
1205 ; CHECK-NEXT: br label [[BB3]]
1206 ; CHECK: bb3:
1207 ; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[SUM0]], [[ENTRY:%.*]] ], [ [[TMP14]], [[BB1]] ], [ [[SUM2]], [[BB0_SPLIT_NONCHR]] ], [ [[SUM4_NONCHR]], [[BB1_NONCHR]] ]
1208 ; CHECK-NEXT: ret i32 [[SUM6]]
1209 ;
1210 entry:
1211 %0 = load i32, i32* %i
1212 %1 = and i32 %0, 255
1213 %2 = icmp eq i32 %1, 0
1214 br i1 %2, label %bb3, label %bb0, !prof !15
1216 bb0:
1217 %3 = and i32 %0, 1
1218 %4 = icmp eq i32 %3, 0
1219 %5 = add i32 %sum0, 42
1220 %sum1 = select i1 %4, i32 %sum0, i32 %5, !prof !15
1221 %6 = and i32 %0, 2
1222 %7 = icmp eq i32 %6, 0
1223 %8 = add i32 %sum1, 43
1224 %sum2 = select i1 %7, i32 %sum1, i32 %8, !prof !15
1225 %9 = load i32, i32* %i
1226 %10 = icmp eq i32 %9, 0
1227 br i1 %10, label %bb2, label %bb1, !prof !15
1229 bb1:
1230 %sum3 = add i32 %sum2, 44
1231 %11 = and i32 %0, 8
1232 %12 = icmp eq i32 %11, 0
1233 %13 = add i32 %sum3, 44
1234 %sum4 = select i1 %12, i32 %sum3, i32 %13, !prof !15
1235 br label %bb2
1237 bb2:
1238 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]
1239 br label %bb3
1241 bb3:
1242 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]
1243 ret i32 %sum6
1244 }
1246 ; In the second CHR, a condition value depends on a trivial phi that's inserted
1247 ; by the first CHR.
1248 ; Roughly,
1249 ; i0 = *i
1250 ; v2 = (z != 1) ? pred : true // Likely false
1251 ; if (z == 0 & pred) // Likely false
1252 ; foo()
1253 ; j0 = *j
1254 ; sum2 = ((i0 & 2) == j0) ? sum0 : (sum0 + 43) // Likely false
1255 ; sum3 = ((i0 == j0) ? sum0 : (sum0 + 43) // Likely false
1256 ; foo()
1257 ; if ((i0 & 4) == 0) // Unbiased
1258 ; foo()
1259 ; return i0 + sum3
1260 ; ->
1261 ; i0 = *i
1262 ; if (z != 1 & (z == 0 & pred)) // First CHR
1263 ; foo()
1264 ; // A trivial phi for i0 is inserted here by the first CHR (which gets removed
1265 ; // later) and the subsequent branch condition (for the second CHR) uses it.
1266 ; j0 = *j
1267 ; if ((i0 & 2) != j0 & i0 != j0) { // Second CHR
1268 ; sum3 = sum0 + 43
1269 ; foo()
1270 ; if (i0 & 4) == 0)
1271 ; foo()
1272 ; } else {
1273 ; sum3 = (i0 == j0) ? sum0 : (sum0 + 43)
1274 ; foo()
1275 ; if (i0 & 4) == 0)
1276 ; foo()
1277 ; }
1278 ; return i0 + sum3
1279 define i32 @test_chr_14(i32* %i, i32* %j, i32 %sum0, i1 %pred, i32 %z) !prof !14 {
1280 ; CHECK-LABEL: @test_chr_14(
1281 ; CHECK-NEXT: entry:
1282 ; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[I:%.*]], align 4
1283 ; CHECK-NEXT: [[V1:%.*]] = icmp ne i32 [[Z:%.*]], 1
1284 ; CHECK-NEXT: [[V0:%.*]] = icmp eq i32 [[Z]], 0
1285 ; CHECK-NEXT: [[V3_NONCHR:%.*]] = and i1 [[V0]], [[PRED:%.*]]
1286 ; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[V1]], [[V3_NONCHR]]
1287 ; CHECK-NEXT: br i1 [[OR_COND]], label [[BB0_NONCHR:%.*]], label [[BB1:%.*]], !prof !19
1288 ; CHECK: bb0.nonchr:
1289 ; CHECK-NEXT: call void @foo()
1290 ; CHECK-NEXT: br label [[BB1]]
1291 ; CHECK: bb1:
1292 ; CHECK-NEXT: [[J0:%.*]] = load i32, i32* [[J:%.*]], align 4
1293 ; CHECK-NEXT: [[V6:%.*]] = and i32 [[I0]], 2
1294 ; CHECK-NEXT: [[V4:%.*]] = icmp ne i32 [[V6]], [[J0]]
1295 ; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43
1296 ; CHECK-NEXT: [[V5:%.*]] = icmp ne i32 [[I0]], [[J0]]
1297 ; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[V4]], [[V5]]
1298 ; CHECK-NEXT: br i1 [[TMP0]], label [[BB1_SPLIT:%.*]], label [[BB1_SPLIT_NONCHR:%.*]], !prof !15
1299 ; CHECK: bb1.split:
1300 ; CHECK-NEXT: call void @foo()
1301 ; CHECK-NEXT: [[V9:%.*]] = and i32 [[I0]], 4
1302 ; CHECK-NEXT: [[V10:%.*]] = icmp eq i32 [[V9]], 0
1303 ; CHECK-NEXT: br i1 [[V10]], label [[BB3:%.*]], label [[BB2:%.*]]
1304 ; CHECK: bb2:
1305 ; CHECK-NEXT: call void @foo()
1306 ; CHECK-NEXT: br label [[BB3]]
1307 ; CHECK: bb1.split.nonchr:
1308 ; CHECK-NEXT: [[V5_NONCHR:%.*]] = icmp eq i32 [[I0]], [[J0]]
1309 ; CHECK-NEXT: [[SUM3_NONCHR:%.*]] = select i1 [[V5_NONCHR]], i32 [[SUM0]], i32 [[V8]], !prof !16
1310 ; CHECK-NEXT: call void @foo()
1311 ; CHECK-NEXT: [[V9_NONCHR:%.*]] = and i32 [[I0]], 4
1312 ; CHECK-NEXT: [[V10_NONCHR:%.*]] = icmp eq i32 [[V9_NONCHR]], 0
1313 ; CHECK-NEXT: br i1 [[V10_NONCHR]], label [[BB3]], label [[BB2_NONCHR:%.*]]
1314 ; CHECK: bb2.nonchr:
1315 ; CHECK-NEXT: call void @foo()
1316 ; CHECK-NEXT: br label [[BB3]]
1317 ; CHECK: bb3:
1318 ; CHECK-NEXT: [[TMP1:%.*]] = phi i32 [ [[V8]], [[BB2]] ], [ [[V8]], [[BB1_SPLIT]] ], [ [[SUM3_NONCHR]], [[BB2_NONCHR]] ], [ [[SUM3_NONCHR]], [[BB1_SPLIT_NONCHR]] ]
1319 ; CHECK-NEXT: [[V11:%.*]] = add i32 [[I0]], [[TMP1]]
1320 ; CHECK-NEXT: ret i32 [[V11]]
1321 ;
1322 entry:
1323 %i0 = load i32, i32* %i
1324 %v0 = icmp eq i32 %z, 0
1325 %v1 = icmp ne i32 %z, 1
1326 %v2 = select i1 %v1, i1 %pred, i1 true, !prof !15
1327 %v3 = and i1 %v0, %pred
1328 br i1 %v3, label %bb0, label %bb1, !prof !15
1330 bb0:
1331 call void @foo()
1332 br label %bb1
1334 bb1:
1335 %j0 = load i32, i32* %j
1336 %v6 = and i32 %i0, 2
1337 %v4 = icmp eq i32 %v6, %j0
1338 %v8 = add i32 %sum0, 43
1339 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !15
1340 %v5 = icmp eq i32 %i0, %j0
1341 %sum3 = select i1 %v5, i32 %sum0, i32 %v8, !prof !15
1342 call void @foo()
1343 %v9 = and i32 %i0, 4
1344 %v10 = icmp eq i32 %v9, 0
1345 br i1 %v10, label %bb3, label %bb2
1347 bb2:
1348 call void @foo()
1349 br label %bb3
1351 bb3:
1352 %v11 = add i32 %i0, %sum3
1353 ret i32 %v11
1354 }
1356 ; Branch or selects depends on another select. No CHR happens.
1357 ; Roughly,
1358 ; i0 = *i
1359 ; if (z == 0 & ((z != 1) ? pred : true)) { // Likely false
1360 ; foo()
1361 ; j0 = *j
1362 ; sum2 = ((i0 & 2) == j0) ? sum0 : (sum0 + 43) // Likely false
1363 ; sum3 = (i0 == sum2) ? sum2 : (sum0 + 43) // Likely false. This depends on the
1364 ; // previous select.
1365 ; foo()
1366 ; if ((i0 & 4) == 0) // Unbiased
1367 ; foo()
1368 ; return i0 + sum3
1369 ; ->
1370 ; (no change)
1371 define i32 @test_chr_15(i32* %i, i32* %j, i32 %sum0, i1 %pred, i32 %z) !prof !14 {
1372 ; CHECK-LABEL: @test_chr_15(
1373 ; CHECK-NEXT: entry:
1374 ; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[I:%.*]], align 4
1375 ; CHECK-NEXT: [[V0:%.*]] = icmp eq i32 [[Z:%.*]], 0
1376 ; CHECK-NEXT: [[V3:%.*]] = and i1 [[V0]], [[PRED:%.*]]
1377 ; CHECK-NEXT: br i1 [[V3]], label [[BB0:%.*]], label [[BB1:%.*]], !prof !16
1378 ; CHECK: bb0:
1379 ; CHECK-NEXT: call void @foo()
1380 ; CHECK-NEXT: br label [[BB1]]
1381 ; CHECK: bb1:
1382 ; CHECK-NEXT: [[J0:%.*]] = load i32, i32* [[J:%.*]], align 4
1383 ; CHECK-NEXT: [[V6:%.*]] = and i32 [[I0]], 2
1384 ; CHECK-NEXT: [[V4:%.*]] = icmp eq i32 [[V6]], [[J0]]
1385 ; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0:%.*]], 43
1386 ; CHECK-NEXT: [[SUM2:%.*]] = select i1 [[V4]], i32 [[SUM0]], i32 [[V8]], !prof !16
1387 ; CHECK-NEXT: [[V5:%.*]] = icmp eq i32 [[I0]], [[SUM2]]
1388 ; CHECK-NEXT: [[SUM3:%.*]] = select i1 [[V5]], i32 [[SUM2]], i32 [[V8]], !prof !16
1389 ; CHECK-NEXT: call void @foo()
1390 ; CHECK-NEXT: [[V9:%.*]] = and i32 [[I0]], 4
1391 ; CHECK-NEXT: [[V10:%.*]] = icmp eq i32 [[V9]], 0
1392 ; CHECK-NEXT: br i1 [[V10]], label [[BB3:%.*]], label [[BB2:%.*]]
1393 ; CHECK: bb2:
1394 ; CHECK-NEXT: call void @foo()
1395 ; CHECK-NEXT: br label [[BB3]]
1396 ; CHECK: bb3:
1397 ; CHECK-NEXT: [[V11:%.*]] = add i32 [[I0]], [[SUM3]]
1398 ; CHECK-NEXT: ret i32 [[V11]]
1399 ;
1400 entry:
1401 %i0 = load i32, i32* %i
1402 %v0 = icmp eq i32 %z, 0
1403 %v1 = icmp ne i32 %z, 1
1404 %v2 = select i1 %v1, i1 %pred, i1 true, !prof !15
1405 %v3 = and i1 %v0, %v2
1406 br i1 %v3, label %bb0, label %bb1, !prof !15
1408 bb0:
1409 call void @foo()
1410 br label %bb1
1412 bb1:
1413 %j0 = load i32, i32* %j
1414 %v6 = and i32 %i0, 2
1415 %v4 = icmp eq i32 %v6, %j0
1416 %v8 = add i32 %sum0, 43
1417 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !15
1418 %v5 = icmp eq i32 %i0, %sum2
1419 %sum3 = select i1 %v5, i32 %sum2, i32 %v8, !prof !15
1420 call void @foo()
1421 %v9 = and i32 %i0, 4
1422 %v10 = icmp eq i32 %v9, 0
1423 br i1 %v10, label %bb3, label %bb2
1425 bb2:
1426 call void @foo()
1427 br label %bb3
1429 bb3:
1430 %v11 = add i32 %i0, %sum3
1431 ret i32 %v11
1432 }
1434 ; With an existing phi at the exit but a value (%v40) is both alive and is an
1435 ; operand to a phi at the exit block.
1436 ; Roughly,
1437 ; t0 = *i
1438 ; if ((t0 & 1) != 0) // Likely true
1439 ; foo()
1440 ; v40 = t0 + 44
1441 ; if ((t0 & 2) != 0) // Likely true
1442 ; v41 = t0 + 99
1443 ; foo()
1444 ; }
1445 ; v42 = phi v40, v41
1446 ; return v42 + v40
1447 ; ->
1448 ; t0 = *i
1449 ; if ((t0 & 3) == 3) // Likely true
1450 ; foo()
1451 ; v40 = t0 + 44
1452 ; v41 = t0 + 99
1453 ; foo()
1454 ; } else {
1455 ; if ((t0 & 1) != 0) // Likely true
1456 ; foo()
1457 ; v40_nc = t0 + 44
1458 ; if ((t0 & 2) != 0) // Likely true
1459 ; v41_nc = t0 + 99
1460 ; foo()
1461 ; }
1462 ; }
1463 ; t7 = phi v40, v40_nc
1464 ; v42 = phi v41, v41_nc
1465 ; v43 = v42 + t7
1466 ; return v43
1467 define i32 @test_chr_16(i32* %i) !prof !14 {
1468 ; CHECK-LABEL: @test_chr_16(
1469 ; CHECK-NEXT: entry:
1470 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
1471 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 3
1472 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
1473 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
1474 ; CHECK: bb0:
1475 ; CHECK-NEXT: call void @foo()
1476 ; CHECK-NEXT: [[V40:%.*]] = add i32 [[TMP0]], 44
1477 ; CHECK-NEXT: [[V41:%.*]] = add i32 [[TMP0]], 99
1478 ; CHECK-NEXT: call void @foo()
1479 ; CHECK-NEXT: br label [[BB3:%.*]]
1480 ; CHECK: entry.split.nonchr:
1481 ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP0]], 1
1482 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0
1483 ; CHECK-NEXT: br i1 [[TMP4]], label [[BB1_NONCHR:%.*]], label [[BB0_NONCHR:%.*]], !prof !16
1484 ; CHECK: bb0.nonchr:
1485 ; CHECK-NEXT: call void @foo()
1486 ; CHECK-NEXT: br label [[BB1_NONCHR]]
1487 ; CHECK: bb1.nonchr:
1488 ; CHECK-NEXT: [[V40_NONCHR:%.*]] = add i32 [[TMP0]], 44
1489 ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 2
1490 ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
1491 ; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB2_NONCHR:%.*]], !prof !16
1492 ; CHECK: bb2.nonchr:
1493 ; CHECK-NEXT: [[V41_NONCHR:%.*]] = add i32 [[TMP0]], 99
1494 ; CHECK-NEXT: call void @foo()
1495 ; CHECK-NEXT: br label [[BB3]]
1496 ; CHECK: bb3:
1497 ; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ [[V40]], [[BB0]] ], [ [[V40_NONCHR]], [[BB2_NONCHR]] ], [ [[V40_NONCHR]], [[BB1_NONCHR]] ]
1498 ; CHECK-NEXT: [[V42:%.*]] = phi i32 [ [[V41]], [[BB0]] ], [ [[V41_NONCHR]], [[BB2_NONCHR]] ], [ [[V40_NONCHR]], [[BB1_NONCHR]] ]
1499 ; CHECK-NEXT: [[V43:%.*]] = add i32 [[V42]], [[TMP7]]
1500 ; CHECK-NEXT: ret i32 [[V43]]
1501 ;
1502 entry:
1503 %0 = load i32, i32* %i
1504 %1 = and i32 %0, 1
1505 %2 = icmp eq i32 %1, 0
1506 br i1 %2, label %bb1, label %bb0, !prof !15
1508 bb0:
1509 call void @foo()
1510 br label %bb1
1512 bb1:
1513 %v40 = add i32 %0, 44
1514 %3 = and i32 %0, 2
1515 %4 = icmp eq i32 %3, 0
1516 br i1 %4, label %bb3, label %bb2, !prof !15
1518 bb2:
1519 %v41 = add i32 %0, 99
1520 call void @foo()
1521 br label %bb3
1523 bb3:
1524 %v42 = phi i32 [ %v41, %bb2 ], [ %v40, %bb1 ]
1525 %v43 = add i32 %v42, %v40
1526 ret i32 %v43
1527 }
1529 ; Two consecutive regions have an entry in the middle of them. No CHR happens.
1530 ; Roughly,
1531 ; if ((i & 4) == 0) {
1532 ; if (!j)
1533 ; goto bb1
1534 ; } else {
1535 ; t0 = (i & 1)
1536 ; if (t0 != 0) // Likely true
1537 ; foo()
1538 ; s = (i & 1) + i
1539 ; }
1540 ; bb1:
1541 ; p = phi i, t0, s
1542 ; if ((i & 2) != 0) // Likely true
1543 ; foo()
1544 ; q = p + 2
1545 ; }
1546 ; r = phi p, q, i
1547 ; return r
1548 ; ->
1549 ; (no change)
1550 define i32 @test_chr_17(i32 %i, i1 %j) !prof !14 {
1551 ; CHECK-LABEL: @test_chr_17(
1552 ; CHECK-NEXT: entry:
1553 ; CHECK-NEXT: [[V0:%.*]] = and i32 [[I:%.*]], 4
1554 ; CHECK-NEXT: [[V1:%.*]] = icmp eq i32 [[V0]], 0
1555 ; CHECK-NEXT: br i1 [[V1]], label [[BBE:%.*]], label [[BBQ:%.*]]
1556 ; CHECK: bbq:
1557 ; CHECK-NEXT: br i1 [[J:%.*]], label [[BB3:%.*]], label [[BB1:%.*]]
1558 ; CHECK: bbe:
1559 ; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[I]], 1
1560 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 0
1561 ; CHECK-NEXT: br i1 [[TMP1]], label [[BB1]], label [[BB0:%.*]], !prof !16
1562 ; CHECK: bb0:
1563 ; CHECK-NEXT: call void @foo()
1564 ; CHECK-NEXT: [[S:%.*]] = add i32 [[TMP0]], [[I]]
1565 ; CHECK-NEXT: br label [[BB1]]
1566 ; CHECK: bb1:
1567 ; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[I]], [[BBQ]] ], [ [[TMP0]], [[BBE]] ], [ [[S]], [[BB0]] ]
1568 ; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[I]], 2
1569 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
1570 ; CHECK-NEXT: br i1 [[TMP3]], label [[BB3]], label [[BB2:%.*]], !prof !16
1571 ; CHECK: bb2:
1572 ; CHECK-NEXT: call void @foo()
1573 ; CHECK-NEXT: [[Q:%.*]] = add i32 [[P]], [[TMP2]]
1574 ; CHECK-NEXT: br label [[BB3]]
1575 ; CHECK: bb3:
1576 ; CHECK-NEXT: [[R:%.*]] = phi i32 [ [[P]], [[BB1]] ], [ [[Q]], [[BB2]] ], [ [[I]], [[BBQ]] ]
1577 ; CHECK-NEXT: ret i32 [[R]]
1578 ;
1579 entry:
1580 %v0 = and i32 %i, 4
1581 %v1 = icmp eq i32 %v0, 0
1582 br i1 %v1, label %bbe, label %bbq
1584 bbq:
1585 br i1 %j, label %bb3, label %bb1
1587 bbe:
1588 %0 = and i32 %i, 1
1589 %1 = icmp eq i32 %0, 0
1590 br i1 %1, label %bb1, label %bb0, !prof !15
1592 bb0:
1593 call void @foo()
1594 %s = add i32 %0, %i
1595 br label %bb1
1597 bb1:
1598 %p = phi i32 [ %i, %bbq ], [ %0, %bbe ], [ %s, %bb0 ]
1599 %2 = and i32 %i, 2
1600 %3 = icmp eq i32 %2, 0
1601 br i1 %3, label %bb3, label %bb2, !prof !15
1603 bb2:
1604 call void @foo()
1605 %q = add i32 %p, %2
1606 br label %bb3
1608 bb3:
1609 %r = phi i32 [ %p, %bb1 ], [ %q, %bb2 ], [ %i, %bbq ]
1610 ret i32 %r
1611 }
1613 ; Select + br, there's a loop and we need to update the user of an inserted phi
1614 ; at the entry block. This is a regression test for a bug that's fixed.
1615 ; Roughly,
1616 ; do {
1617 ; inc1 = phi inc2, 0
1618 ; li = *i
1619 ; sum1 = sum0 + 42
1620 ; sum2 = ((li & 1) == 0) ? sum0 : sum1 // Likely false
1621 ; inc2 = inc1 + 1
1622 ; if ((li & 4) != 0) // Likely true
1623 ; sum3 = sum2 + 44
1624 ; sum4 = phi sum1, sum3
1625 ; } while (inc2 != 100) // Likely true (loop back)
1626 ; return sum4
1627 ; ->
1628 ; do {
1629 ; inc1 = phi tmp2, 0 // The first operand needed to be updated
1630 ; li = *i
1631 ; sum1 = sum0 + 42
1632 ; if ((li & 5) == 5) { // Likely true
1633 ; inc2 = inc1 + 1
1634 ; sum3 = sum0 + 86
1635 ; } else {
1636 ; inc2_nc = inc1 + 1
1637 ; if ((li & 4) == 0)
1638 ; sum2_nc = ((li & 1) == 0) ? sum0 : sum1
1639 ; sum3_nc = sum2_nc + 44
1640 ; }
1641 ; tmp2 = phi inc2, in2c_nc
1642 ; sum4 = phi sum3, sum3_nc, sum1
1643 ; } while (tmp2 != 100)
1644 ; return sum4
1645 define i32 @test_chr_18(i32* %i, i32 %sum0) !prof !14 {
1646 ; CHECK-LABEL: @test_chr_18(
1647 ; CHECK-NEXT: entry:
1648 ; CHECK-NEXT: br label [[BB0:%.*]]
1649 ; CHECK: bb0:
1650 ; CHECK-NEXT: [[INC1:%.*]] = phi i32 [ [[TMP2:%.*]], [[BB2:%.*]] ], [ 0, [[ENTRY:%.*]] ]
1651 ; CHECK-NEXT: [[LI:%.*]] = load i32, i32* [[I:%.*]], align 4
1652 ; CHECK-NEXT: [[SUM1:%.*]] = add i32 [[SUM0:%.*]], 42
1653 ; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[LI]], 5
1654 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 5
1655 ; CHECK-NEXT: br i1 [[TMP1]], label [[BB0_SPLIT:%.*]], label [[BB0_SPLIT_NONCHR:%.*]], !prof !15
1656 ; CHECK: bb0.split:
1657 ; CHECK-NEXT: [[INC2:%.*]] = add i32 [[INC1]], 1
1658 ; CHECK-NEXT: [[SUM3:%.*]] = add i32 [[SUM0]], 86
1659 ; CHECK-NEXT: br label [[BB2]]
1660 ; CHECK: bb0.split.nonchr:
1661 ; CHECK-NEXT: [[A4_NONCHR:%.*]] = and i32 [[LI]], 4
1662 ; CHECK-NEXT: [[CMP4_NONCHR:%.*]] = icmp eq i32 [[A4_NONCHR]], 0
1663 ; CHECK-NEXT: [[INC2_NONCHR:%.*]] = add i32 [[INC1]], 1
1664 ; CHECK-NEXT: br i1 [[CMP4_NONCHR]], label [[BB2]], label [[BB1_NONCHR:%.*]], !prof !16
1665 ; CHECK: bb1.nonchr:
1666 ; CHECK-NEXT: [[A1:%.*]] = and i32 [[LI]], 1
1667 ; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[A1]], 0
1668 ; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[CMP1]], i32 [[SUM0]], i32 [[SUM1]], !prof !16
1669 ; CHECK-NEXT: [[SUM3_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], 44
1670 ; CHECK-NEXT: br label [[BB2]]
1671 ; CHECK: bb2:
1672 ; CHECK-NEXT: [[TMP2]] = phi i32 [ [[INC2]], [[BB0_SPLIT]] ], [ [[INC2_NONCHR]], [[BB1_NONCHR]] ], [ [[INC2_NONCHR]], [[BB0_SPLIT_NONCHR]] ]
1673 ; CHECK-NEXT: [[SUM4:%.*]] = phi i32 [ [[SUM3]], [[BB0_SPLIT]] ], [ [[SUM3_NONCHR]], [[BB1_NONCHR]] ], [ [[SUM1]], [[BB0_SPLIT_NONCHR]] ]
1674 ; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP2]], 100
1675 ; CHECK-NEXT: br i1 [[CMP]], label [[BB3:%.*]], label [[BB0]], !prof !16
1676 ; CHECK: bb3:
1677 ; CHECK-NEXT: ret i32 [[SUM4]]
1678 ;
1679 entry:
1680 br label %bb0
1682 bb0:
1683 %inc1 = phi i32 [ %inc2, %bb2 ], [ 0, %entry ]
1684 %li = load i32, i32* %i
1685 %a1 = and i32 %li, 1
1686 %cmp1 = icmp eq i32 %a1, 0
1687 %sum1 = add i32 %sum0, 42
1688 %sum2 = select i1 %cmp1, i32 %sum0, i32 %sum1, !prof !15
1689 %a4 = and i32 %li, 4
1690 %cmp4 = icmp eq i32 %a4, 0
1691 %inc2 = add i32 %inc1, 1
1692 br i1 %cmp4, label %bb2, label %bb1, !prof !15
1694 bb1:
1695 %sum3 = add i32 %sum2, 44
1696 br label %bb2
1698 bb2:
1699 %sum4 = phi i32 [ %sum1, %bb0 ], [ %sum3, %bb1 ]
1700 %cmp = icmp eq i32 %inc2, 100
1701 br i1 %cmp, label %bb3, label %bb0, !prof !15
1703 bb3:
1704 ret i32 %sum4
1705 }
1708 ; Selects + Brs. Those share the condition value, which causes the
1709 ; targets/operands of the branch/select to be flipped.
1710 ; Roughly,
1711 ; t0 = *i
1712 ; if ((t0 & 255) != 0) { // Likely true
1713 ; sum1 = ((t0 & 1) == 0) ? sum0 : (sum0 + 42) // Likely false
1714 ; sum2 = ((t0 & 1) == 0) ? sum1 : (sum1 + 42) // Likely false
1715 ; if ((t0 & 1) != 0) { // Likely true
1716 ; sum3 = sum2 + 44
1717 ; sum4 = ((t0 & 8) == 0) ? sum3 : (sum3 + 44) // Likely false
1718 ; }
1719 ; sum5 = phi sum2, sum4
1720 ; }
1721 ; sum6 = phi sum0, sum5
1722 ; return sum6
1723 ; ->
1724 ; t0 = *i
1725 ; if ((t0 & 9) == 9) { // Likely true
1726 ; tmp3 = sum0 + 85 // Dead
1727 ; tmp4 = sum0 + 173
1728 ; } else {
1729 ; if ((t0 & 255) != 0) {
1730 ; sum2_nc = ((t0 & 1) == 0) ? sum0 : (sum0 + 85)
1731 ; sum4_nc_v = ((t0 & 8) == 0) ? 44 : 88
1732 ; sum4_nc = add sum2_nc + sum4_nc_v
1733 ; }
1734 ; }
1735 ; sum6 = phi tmp4, sum0, sum2_nc, sum4_nc
1736 ; return sum6
1737 define i32 @test_chr_19(i32* %i, i32 %sum0) !prof !14 {
1738 ; CHECK-LABEL: @test_chr_19(
1739 ; CHECK-NEXT: entry:
1740 ; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[I:%.*]], align 4
1741 ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 9
1742 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 9
1743 ; CHECK-NEXT: br i1 [[TMP2]], label [[BB0:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
1744 ; CHECK: bb0:
1745 ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[SUM0:%.*]], 85
1746 ; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[SUM0]], 173
1747 ; CHECK-NEXT: br label [[BB3:%.*]]
1748 ; CHECK: entry.split.nonchr:
1749 ; CHECK-NEXT: [[TMP5:%.*]] = and i32 [[TMP0]], 255
1750 ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i32 [[TMP5]], 0
1751 ; CHECK-NEXT: br i1 [[TMP6]], label [[BB3]], label [[BB0_NONCHR:%.*]], !prof !16
1752 ; CHECK: bb0.nonchr:
1753 ; CHECK-NEXT: [[TMP7:%.*]] = and i32 [[TMP0]], 1
1754 ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 0
1755 ; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[SUM0]], 85
1756 ; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[TMP8]], i32 [[SUM0]], i32 [[TMP9]], !prof !16
1757 ; CHECK-NEXT: br i1 [[TMP8]], label [[BB3]], label [[BB1_NONCHR:%.*]], !prof !16
1758 ; CHECK: bb1.nonchr:
1759 ; CHECK-NEXT: [[TMP10:%.*]] = and i32 [[TMP0]], 8
1760 ; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i32 [[TMP10]], 0
1761 ; CHECK-NEXT: [[SUM4_NONCHR_V:%.*]] = select i1 [[TMP11]], i32 44, i32 88, !prof !16
1762 ; CHECK-NEXT: [[SUM4_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], [[SUM4_NONCHR_V]]
1763 ; CHECK-NEXT: br label [[BB3]]
1764 ; CHECK: bb3:
1765 ; CHECK-NEXT: [[SUM6:%.*]] = phi i32 [ [[TMP4]], [[BB0]] ], [ [[SUM0]], [[ENTRY_SPLIT_NONCHR]] ], [ [[SUM2_NONCHR]], [[BB0_NONCHR]] ], [ [[SUM4_NONCHR]], [[BB1_NONCHR]] ]
1766 ; CHECK-NEXT: ret i32 [[SUM6]]
1767 ;
1768 entry:
1769 %0 = load i32, i32* %i
1770 %1 = and i32 %0, 255
1771 %2 = icmp eq i32 %1, 0
1772 br i1 %2, label %bb3, label %bb0, !prof !15
1774 bb0:
1775 %3 = and i32 %0, 1
1776 %4 = icmp eq i32 %3, 0
1777 %5 = add i32 %sum0, 42
1778 %sum1 = select i1 %4, i32 %sum0, i32 %5, !prof !15
1779 %6 = add i32 %sum1, 43
1780 %sum2 = select i1 %4, i32 %sum1, i32 %6, !prof !15
1781 br i1 %4, label %bb2, label %bb1, !prof !15
1783 bb1:
1784 %sum3 = add i32 %sum2, 44
1785 %7 = and i32 %0, 8
1786 %8 = icmp eq i32 %7, 0
1787 %9 = add i32 %sum3, 44
1788 %sum4 = select i1 %8, i32 %sum3, i32 %9, !prof !15
1789 br label %bb2
1791 bb2:
1792 %sum5 = phi i32 [ %sum2, %bb0 ], [ %sum4, %bb1 ]
1793 br label %bb3
1795 bb3:
1796 %sum6 = phi i32 [ %sum0, %entry ], [ %sum5, %bb2 ]
1797 ret i32 %sum6
1798 }
1800 ; Selects. The exit block, which belongs to the top-level region, has a select
1801 ; and causes the top-level region to be the outermost CHR scope with the
1802 ; subscope that includes the entry block with two selects. The outermost CHR
1803 ; scope doesn't see the selects in the entry block as the entry block is in the
1804 ; subscope and incorrectly sets the CHR hoist point to the branch rather than
1805 ; the first select in the entry block and causes the CHR'ed selects ("select i1
1806 ; false...") to incorrectly position above the CHR branch. This is testing
1807 ; against a quirk of how the region analysis handles the entry block.
1808 ; Roughly,
1809 ; i0 = *i
1810 ; sum2 = ((i0 & 2) == 0) ? sum0 : (sum0 + 43) // Likely false
1811 ; sum3 = ((i0 & 4) == 0) ? sum2 : (sum2 + 44) // Likely false
1812 ; if (j)
1813 ; foo()
1814 ; i5 = *i
1815 ; v13 = (i5 == 44) ? i5 : sum3
1816 ; return v13
1817 ; ->
1818 ; i0 = *i
1819 ; if ((i0 & 6) != 6) { // Likely true
1820 ; v9 = sum0 + 87
1821 ; if (j)
1822 ; foo()
1823 ; } else {
1824 ; sum2.nc = ((i0 & 2) == 0) ? sum0 : (sum0 + 43)
1825 ; sum3.nc = ((i0 & 4) == 0) ? sum2.nc : (sum2.nc + 44)
1826 ; if (j)
1827 ; foo()
1828 ; }
1829 ; t2 = phi v9, sum3.nc
1830 ; i5 = *i
1831 ; v13 = (i5 == 44) ? 44 : t2
1832 ; return v13
1833 define i32 @test_chr_20(i32* %i, i32 %sum0, i1 %j) !prof !14 {
1834 ; CHECK-LABEL: @test_chr_20(
1835 ; CHECK-NEXT: entry:
1836 ; CHECK-NEXT: [[I0:%.*]] = load i32, i32* [[I:%.*]], align 4
1837 ; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[I0]], 6
1838 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 6
1839 ; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
1840 ; CHECK: entry.split:
1841 ; CHECK-NEXT: [[V9:%.*]] = add i32 [[SUM0:%.*]], 87
1842 ; CHECK-NEXT: br i1 [[J:%.*]], label [[BB1:%.*]], label [[BB4:%.*]]
1843 ; CHECK: bb1:
1844 ; CHECK-NEXT: call void @foo()
1845 ; CHECK-NEXT: br label [[BB4]]
1846 ; CHECK: entry.split.nonchr:
1847 ; CHECK-NEXT: [[V8:%.*]] = add i32 [[SUM0]], 43
1848 ; CHECK-NEXT: [[V3:%.*]] = and i32 [[I0]], 2
1849 ; CHECK-NEXT: [[V4:%.*]] = icmp eq i32 [[V3]], 0
1850 ; CHECK-NEXT: [[SUM2_NONCHR:%.*]] = select i1 [[V4]], i32 [[SUM0]], i32 [[V8]], !prof !16
1851 ; CHECK-NEXT: [[V6_NONCHR:%.*]] = and i32 [[I0]], 4
1852 ; CHECK-NEXT: [[V5_NONCHR:%.*]] = icmp eq i32 [[V6_NONCHR]], 0
1853 ; CHECK-NEXT: [[V9_NONCHR:%.*]] = add i32 [[SUM2_NONCHR]], 44
1854 ; CHECK-NEXT: [[SUM3_NONCHR:%.*]] = select i1 [[V5_NONCHR]], i32 [[SUM2_NONCHR]], i32 [[V9_NONCHR]], !prof !16
1855 ; CHECK-NEXT: br i1 [[J]], label [[BB1_NONCHR:%.*]], label [[BB4]]
1856 ; CHECK: bb1.nonchr:
1857 ; CHECK-NEXT: call void @foo()
1858 ; CHECK-NEXT: br label [[BB4]]
1859 ; CHECK: bb4:
1860 ; CHECK-NEXT: [[TMP2:%.*]] = phi i32 [ [[V9]], [[BB1]] ], [ [[V9]], [[ENTRY_SPLIT]] ], [ [[SUM3_NONCHR]], [[BB1_NONCHR]] ], [ [[SUM3_NONCHR]], [[ENTRY_SPLIT_NONCHR]] ]
1861 ; CHECK-NEXT: [[I5:%.*]] = load i32, i32* [[I]], align 4
1862 ; CHECK-NEXT: [[V12:%.*]] = icmp eq i32 [[I5]], 44
1863 ; CHECK-NEXT: [[V13:%.*]] = select i1 [[V12]], i32 44, i32 [[TMP2]], !prof !16
1864 ; CHECK-NEXT: ret i32 [[V13]]
1865 ;
1866 entry:
1867 %i0 = load i32, i32* %i
1868 %v3 = and i32 %i0, 2
1869 %v4 = icmp eq i32 %v3, 0
1870 %v8 = add i32 %sum0, 43
1871 %sum2 = select i1 %v4, i32 %sum0, i32 %v8, !prof !15
1872 %v6 = and i32 %i0, 4
1873 %v5 = icmp eq i32 %v6, 0
1874 %v9 = add i32 %sum2, 44
1875 %sum3 = select i1 %v5, i32 %sum2, i32 %v9, !prof !15
1876 br i1 %j, label %bb1, label %bb4
1878 bb1:
1879 call void @foo()
1880 br label %bb4
1882 bb4:
1883 %i5 = load i32, i32* %i
1884 %v12 = icmp eq i32 %i5, 44
1885 %v13 = select i1 %v12, i32 %i5, i32 %sum3, !prof !15
1886 ret i32 %v13
1887 }
1889 ; Test the case where two scopes share a common instruction to hoist (%cmp.i).
1890 ; Two scopes would hoist it to their hoist points, but since the outer scope
1891 ; hoists (entry/bb6-9) it first to its hoist point, it'd be wrong (causing bad
1892 ; IR) for the inner scope (bb1-4) to hoist the same instruction to its hoist
1893 ; point.
1894 ; Roughly,
1895 ; if (j != k) {
1896 ; if (i != 2)
1897 ; foo();
1898 ; cmp.i = i == 86
1899 ; if (!cmp.i)
1900 ; foo();
1901 ; if (j != i)
1902 ; foo();
1903 ; if (!cmp.i)
1904 ; foo();
1905 ; }
1906 ; return 45;
1907 define i32 @test_chr_21(i64 %i, i64 %k, i64 %j) !prof !14 {
1908 ; CHECK-LABEL: @test_chr_21(
1909 ; CHECK-NEXT: entry:
1910 ; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i64 [[J:%.*]], [[K:%.*]]
1911 ; CHECK-NEXT: [[CMP3:%.*]] = icmp ne i64 [[J]], [[I:%.*]]
1912 ; CHECK-NEXT: [[CMP_I:%.*]] = icmp ne i64 [[I]], 86
1913 ; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[CMP0]], [[CMP3]]
1914 ; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[TMP0]], [[CMP_I]]
1915 ; CHECK-NEXT: br i1 [[TMP1]], label [[BB1:%.*]], label [[ENTRY_SPLIT_NONCHR:%.*]], !prof !15
1916 ; CHECK: bb1:
1917 ; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i64 [[I]], 2
1918 ; CHECK-NEXT: switch i64 [[I]], label [[BB2:%.*]] [
1919 ; CHECK-NEXT: i64 2, label [[BB3_NONCHR2:%.*]]
1920 ; CHECK-NEXT: i64 86, label [[BB2_NONCHR1:%.*]]
1921 ; CHECK-NEXT: ], !prof !20
1922 ; CHECK: bb2:
1923 ; CHECK-NEXT: call void @foo()
1924 ; CHECK-NEXT: call void @foo()
1925 ; CHECK-NEXT: br label [[BB7:%.*]]
1926 ; CHECK: bb2.nonchr1:
1927 ; CHECK-NEXT: call void @foo()
1928 ; CHECK-NEXT: br label [[BB3_NONCHR2]]
1929 ; CHECK: bb3.nonchr2:
1930 ; CHECK-NEXT: br i1 [[CMP_I]], label [[BB4_NONCHR3:%.*]], label [[BB7]], !prof !18
1931 ; CHECK: bb4.nonchr3:
1932 ; CHECK-NEXT: call void @foo()
1933 ; CHECK-NEXT: br label [[BB7]]
1934 ; CHECK: bb7:
1935 ; CHECK-NEXT: call void @foo()
1936 ; CHECK-NEXT: call void @foo()
1937 ; CHECK-NEXT: br label [[BB10:%.*]]
1938 ; CHECK: entry.split.nonchr:
1939 ; CHECK-NEXT: br i1 [[CMP0]], label [[BB1_NONCHR:%.*]], label [[BB10]], !prof !18
1940 ; CHECK: bb1.nonchr:
1941 ; CHECK-NEXT: [[CMP2_NONCHR:%.*]] = icmp eq i64 [[I]], 2
1942 ; CHECK-NEXT: br i1 [[CMP2_NONCHR]], label [[BB3_NONCHR:%.*]], label [[BB2_NONCHR:%.*]], !prof !16
1943 ; CHECK: bb3.nonchr:
1944 ; CHECK-NEXT: [[CMP_I_NONCHR:%.*]] = icmp eq i64 [[I]], 86
1945 ; CHECK-NEXT: br i1 [[CMP_I_NONCHR]], label [[BB6_NONCHR:%.*]], label [[BB4_NONCHR:%.*]], !prof !16
1946 ; CHECK: bb6.nonchr:
1947 ; CHECK-NEXT: [[CMP3_NONCHR:%.*]] = icmp eq i64 [[J]], [[I]]
1948 ; CHECK-NEXT: br i1 [[CMP3_NONCHR]], label [[BB8_NONCHR:%.*]], label [[BB7_NONCHR:%.*]], !prof !16
1949 ; CHECK: bb8.nonchr:
1950 ; CHECK-NEXT: br i1 [[CMP_I_NONCHR]], label [[BB10]], label [[BB9_NONCHR:%.*]], !prof !16
1951 ; CHECK: bb9.nonchr:
1952 ; CHECK-NEXT: call void @foo()
1953 ; CHECK-NEXT: br label [[BB10]]
1954 ; CHECK: bb7.nonchr:
1955 ; CHECK-NEXT: call void @foo()
1956 ; CHECK-NEXT: br label [[BB8_NONCHR]]
1957 ; CHECK: bb4.nonchr:
1958 ; CHECK-NEXT: call void @foo()
1959 ; CHECK-NEXT: br label [[BB6_NONCHR]]
1960 ; CHECK: bb2.nonchr:
1961 ; CHECK-NEXT: call void @foo()
1962 ; CHECK-NEXT: br label [[BB3_NONCHR]]
1963 ; CHECK: bb10:
1964 ; CHECK-NEXT: ret i32 45
1965 ;
1966 entry:
1967 %cmp0 = icmp eq i64 %j, %k
1968 br i1 %cmp0, label %bb10, label %bb1, !prof !15
1970 bb1:
1971 %cmp2 = icmp eq i64 %i, 2
1972 br i1 %cmp2, label %bb3, label %bb2, !prof !15
1974 bb2:
1975 call void @foo()
1976 br label %bb3
1978 bb3:
1979 %cmp.i = icmp eq i64 %i, 86
1980 br i1 %cmp.i, label %bb5, label %bb4, !prof !15
1982 bb4:
1983 call void @foo()
1984 br label %bb5
1986 bb5:
1987 br label %bb6
1989 bb6:
1990 %cmp3 = icmp eq i64 %j, %i
1991 br i1 %cmp3, label %bb8, label %bb7, !prof !15
1993 bb7:
1994 call void @foo()
1995 br label %bb8
1997 bb8:
1998 br i1 %cmp.i, label %bb10, label %bb9, !prof !15
2000 bb9:
2001 call void @foo()
2002 br label %bb10
2004 bb10:
2005 ret i32 45
2006 }
2008 ; Test a case with a really long use-def chains. This test checks that it's not
2009 ; really slow and doesn't appear to be hanging.
2010 define i64 @test_chr_22(i1 %i, i64* %j, i64 %v0) !prof !14 {
2011 bb0:
2012 %v1 = add i64 %v0, 3
2013 %v2 = add i64 %v1, %v0
2014 %c1 = icmp sgt i64 %v2, 99
2015 %v3 = select i1 %c1, i64 %v1, i64 %v2, !prof !15
2016 %v4 = add i64 %v2, %v2
2017 %v5 = add i64 %v4, %v2
2018 %v6 = add i64 %v5, %v4
2019 %v7 = add i64 %v6, %v5
2020 %v8 = add i64 %v7, %v6
2021 %v9 = add i64 %v8, %v7
2022 %v10 = add i64 %v9, %v8
2023 %v11 = add i64 %v10, %v9
2024 %v12 = add i64 %v11, %v10
2025 %v13 = add i64 %v12, %v11
2026 %v14 = add i64 %v13, %v12
2027 %v15 = add i64 %v14, %v13
2028 %v16 = add i64 %v15, %v14
2029 %v17 = add i64 %v16, %v15
2030 %v18 = add i64 %v17, %v16
2031 %v19 = add i64 %v18, %v17
2032 %v20 = add i64 %v19, %v18
2033 %v21 = add i64 %v20, %v19
2034 %v22 = add i64 %v21, %v20
2035 %v23 = add i64 %v22, %v21
2036 %v24 = add i64 %v23, %v22
2037 %v25 = add i64 %v24, %v23
2038 %v26 = add i64 %v25, %v24
2039 %v27 = add i64 %v26, %v25
2040 %v28 = add i64 %v27, %v26
2041 %v29 = add i64 %v28, %v27
2042 %v30 = add i64 %v29, %v28
2043 %v31 = add i64 %v30, %v29
2044 %v32 = add i64 %v31, %v30
2045 %v33 = add i64 %v32, %v31
2046 %v34 = add i64 %v33, %v32
2047 %v35 = add i64 %v34, %v33
2048 %v36 = add i64 %v35, %v34
2049 %v37 = add i64 %v36, %v35
2050 %v38 = add i64 %v37, %v36
2051 %v39 = add i64 %v38, %v37
2052 %v40 = add i64 %v39, %v38
2053 %v41 = add i64 %v40, %v39
2054 %v42 = add i64 %v41, %v40
2055 %v43 = add i64 %v42, %v41
2056 %v44 = add i64 %v43, %v42
2057 %v45 = add i64 %v44, %v43
2058 %v46 = add i64 %v45, %v44
2059 %v47 = add i64 %v46, %v45
2060 %v48 = add i64 %v47, %v46
2061 %v49 = add i64 %v48, %v47
2062 %v50 = add i64 %v49, %v48
2063 %v51 = add i64 %v50, %v49
2064 %v52 = add i64 %v51, %v50
2065 %v53 = add i64 %v52, %v51
2066 %v54 = add i64 %v53, %v52
2067 %v55 = add i64 %v54, %v53
2068 %v56 = add i64 %v55, %v54
2069 %v57 = add i64 %v56, %v55
2070 %v58 = add i64 %v57, %v56
2071 %v59 = add i64 %v58, %v57
2072 %v60 = add i64 %v59, %v58
2073 %v61 = add i64 %v60, %v59
2074 %v62 = add i64 %v61, %v60
2075 %v63 = add i64 %v62, %v61
2076 %v64 = add i64 %v63, %v62
2077 %v65 = add i64 %v64, %v63
2078 %v66 = add i64 %v65, %v64
2079 %v67 = add i64 %v66, %v65
2080 %v68 = add i64 %v67, %v66
2081 %v69 = add i64 %v68, %v67
2082 %v70 = add i64 %v69, %v68
2083 %v71 = add i64 %v70, %v69
2084 %v72 = add i64 %v71, %v70
2085 %v73 = add i64 %v72, %v71
2086 %v74 = add i64 %v73, %v72
2087 %v75 = add i64 %v74, %v73
2088 %v76 = add i64 %v75, %v74
2089 %v77 = add i64 %v76, %v75
2090 %v78 = add i64 %v77, %v76
2091 %v79 = add i64 %v78, %v77
2092 %v80 = add i64 %v79, %v78
2093 %v81 = add i64 %v80, %v79
2094 %v82 = add i64 %v81, %v80
2095 %v83 = add i64 %v82, %v81
2096 %v84 = add i64 %v83, %v82
2097 %v85 = add i64 %v84, %v83
2098 %v86 = add i64 %v85, %v84
2099 %v87 = add i64 %v86, %v85
2100 %v88 = add i64 %v87, %v86
2101 %v89 = add i64 %v88, %v87
2102 %v90 = add i64 %v89, %v88
2103 %v91 = add i64 %v90, %v89
2104 %v92 = add i64 %v91, %v90
2105 %v93 = add i64 %v92, %v91
2106 %v94 = add i64 %v93, %v92
2107 %v95 = add i64 %v94, %v93
2108 %v96 = add i64 %v95, %v94
2109 %v97 = add i64 %v96, %v95
2110 %v98 = add i64 %v97, %v96
2111 %v99 = add i64 %v98, %v97
2112 %v100 = add i64 %v99, %v98
2113 %v101 = add i64 %v100, %v99
2114 %v102 = add i64 %v101, %v100
2115 %v103 = add i64 %v102, %v101
2116 %v104 = add i64 %v103, %v102
2117 %v105 = add i64 %v104, %v103
2118 %v106 = add i64 %v105, %v104
2119 %v107 = add i64 %v106, %v105
2120 %v108 = add i64 %v107, %v106
2121 %v109 = add i64 %v108, %v107
2122 %v110 = add i64 %v109, %v108
2123 %v111 = add i64 %v110, %v109
2124 %v112 = add i64 %v111, %v110
2125 %v113 = add i64 %v112, %v111
2126 %v114 = add i64 %v113, %v112
2127 %v115 = add i64 %v114, %v113
2128 %v116 = add i64 %v115, %v114
2129 %v117 = add i64 %v116, %v115
2130 %v118 = add i64 %v117, %v116
2131 %v119 = add i64 %v118, %v117
2132 %v120 = add i64 %v119, %v118
2133 %v121 = add i64 %v120, %v119
2134 %v122 = add i64 %v121, %v120
2135 %v123 = add i64 %v122, %v121
2136 %v124 = add i64 %v123, %v122
2137 %v125 = add i64 %v124, %v123
2138 %v126 = add i64 %v125, %v124
2139 %v127 = add i64 %v126, %v125
2140 %v128 = add i64 %v127, %v126
2141 %v129 = add i64 %v128, %v127
2142 %v130 = add i64 %v129, %v128
2143 %v131 = add i64 %v130, %v129
2144 %v132 = add i64 %v131, %v130
2145 %v133 = add i64 %v132, %v131
2146 %v134 = add i64 %v133, %v132
2147 %v135 = add i64 %v134, %v133
2148 %v136 = add i64 %v135, %v134
2149 %v137 = add i64 %v136, %v135
2150 %v138 = add i64 %v137, %v136
2151 %v139 = add i64 %v138, %v137
2152 %v140 = add i64 %v139, %v138
2153 %v141 = add i64 %v140, %v139
2154 %v142 = add i64 %v141, %v140
2155 %v143 = add i64 %v142, %v141
2156 %v144 = add i64 %v143, %v142
2157 %v145 = add i64 %v144, %v143
2158 %v146 = add i64 %v145, %v144
2159 %v147 = add i64 %v146, %v145
2160 %v148 = add i64 %v147, %v146
2161 %v149 = add i64 %v148, %v147
2162 %v150 = add i64 %v149, %v148
2163 %v151 = add i64 %v150, %v149
2164 %v152 = add i64 %v151, %v150
2165 %v153 = add i64 %v152, %v151
2166 %v154 = add i64 %v153, %v152
2167 %v155 = add i64 %v154, %v153
2168 %v156 = add i64 %v155, %v154
2169 %v157 = add i64 %v156, %v155
2170 %v158 = add i64 %v157, %v156
2171 %v159 = add i64 %v158, %v157
2172 %v160 = add i64 %v159, %v158
2173 %v161 = add i64 %v160, %v159
2174 %v162 = add i64 %v161, %v160
2175 %v163 = add i64 %v162, %v161
2176 %v164 = add i64 %v163, %v162
2177 %v165 = add i64 %v164, %v163
2178 %v166 = add i64 %v165, %v164
2179 %v167 = add i64 %v166, %v165
2180 %v168 = add i64 %v167, %v166
2181 %v169 = add i64 %v168, %v167
2182 %v170 = add i64 %v169, %v168
2183 %v171 = add i64 %v170, %v169
2184 %v172 = add i64 %v171, %v170
2185 %v173 = add i64 %v172, %v171
2186 %v174 = add i64 %v173, %v172
2187 %v175 = add i64 %v174, %v173
2188 %v176 = add i64 %v175, %v174
2189 %v177 = add i64 %v176, %v175
2190 %v178 = add i64 %v177, %v176
2191 %v179 = add i64 %v178, %v177
2192 %v180 = add i64 %v179, %v178
2193 %v181 = add i64 %v180, %v179
2194 %v182 = add i64 %v181, %v180
2195 %v183 = add i64 %v182, %v181
2196 %v184 = add i64 %v183, %v182
2197 %v185 = add i64 %v184, %v183
2198 %v186 = add i64 %v185, %v184
2199 %v187 = add i64 %v186, %v185
2200 %v188 = add i64 %v187, %v186
2201 %v189 = add i64 %v188, %v187
2202 %v190 = add i64 %v189, %v188
2203 %v191 = add i64 %v190, %v189
2204 %v192 = add i64 %v191, %v190
2205 %v193 = add i64 %v192, %v191
2206 %v194 = add i64 %v193, %v192
2207 %v195 = add i64 %v194, %v193
2208 %v196 = add i64 %v195, %v194
2209 %v197 = add i64 %v196, %v195
2210 %v198 = add i64 %v197, %v196
2211 %v199 = add i64 %v198, %v197
2212 %v200 = add i64 %v199, %v198
2213 %v201 = add i64 %v200, %v199
2214 %v202 = add i64 %v201, %v200
2215 %v203 = add i64 %v202, %v201
2216 %v204 = add i64 %v203, %v202
2217 %v205 = add i64 %v204, %v203
2218 %v206 = add i64 %v205, %v204
2219 %v207 = add i64 %v206, %v205
2220 %v208 = add i64 %v207, %v206
2221 %v209 = add i64 %v208, %v207
2222 %v210 = add i64 %v209, %v208
2223 %v211 = add i64 %v210, %v209
2224 %v212 = add i64 %v211, %v210
2225 %v213 = add i64 %v212, %v211
2226 %v214 = add i64 %v213, %v212
2227 %v215 = add i64 %v214, %v213
2228 %v216 = add i64 %v215, %v214
2229 %v217 = add i64 %v216, %v215
2230 %v218 = add i64 %v217, %v216
2231 %v219 = add i64 %v218, %v217
2232 %v220 = add i64 %v219, %v218
2233 %v221 = add i64 %v220, %v219
2234 %v222 = add i64 %v221, %v220
2235 %v223 = add i64 %v222, %v221
2236 %v224 = add i64 %v223, %v222
2237 %v225 = add i64 %v224, %v223
2238 %v226 = add i64 %v225, %v224
2239 %v227 = add i64 %v226, %v225
2240 %v228 = add i64 %v227, %v226
2241 %v229 = add i64 %v228, %v227
2242 %v230 = add i64 %v229, %v228
2243 %v231 = add i64 %v230, %v229
2244 %v232 = add i64 %v231, %v230
2245 %v233 = add i64 %v232, %v231
2246 %v234 = add i64 %v233, %v232
2247 %v235 = add i64 %v234, %v233
2248 %v236 = add i64 %v235, %v234
2249 %v237 = add i64 %v236, %v235
2250 %v238 = add i64 %v237, %v236
2251 %v239 = add i64 %v238, %v237
2252 %v240 = add i64 %v239, %v238
2253 %v241 = add i64 %v240, %v239
2254 %v242 = add i64 %v241, %v240
2255 %v243 = add i64 %v242, %v241
2256 %v244 = add i64 %v243, %v242
2257 %v245 = add i64 %v244, %v243
2258 %v246 = add i64 %v245, %v244
2259 %v247 = add i64 %v246, %v245
2260 %v248 = add i64 %v247, %v246
2261 %v249 = add i64 %v248, %v247
2262 %v250 = add i64 %v249, %v248
2263 %v251 = add i64 %v250, %v249
2264 %v252 = add i64 %v251, %v250
2265 %v253 = add i64 %v252, %v251
2266 %v254 = add i64 %v253, %v252
2267 %v255 = add i64 %v254, %v253
2268 %v256 = add i64 %v255, %v254
2269 %v257 = add i64 %v256, %v255
2270 %v258 = add i64 %v257, %v256
2271 %v259 = add i64 %v258, %v257
2272 %v260 = add i64 %v259, %v258
2273 %v261 = add i64 %v260, %v259
2274 %v262 = add i64 %v261, %v260
2275 %v263 = add i64 %v262, %v261
2276 %v264 = add i64 %v263, %v262
2277 %v265 = add i64 %v264, %v263
2278 %v266 = add i64 %v265, %v264
2279 %v267 = add i64 %v266, %v265
2280 %v268 = add i64 %v267, %v266
2281 %v269 = add i64 %v268, %v267
2282 %v270 = add i64 %v269, %v268
2283 %v271 = add i64 %v270, %v269
2284 %v272 = add i64 %v271, %v270
2285 %v273 = add i64 %v272, %v271
2286 %v274 = add i64 %v273, %v272
2287 %v275 = add i64 %v274, %v273
2288 %v276 = add i64 %v275, %v274
2289 %v277 = add i64 %v276, %v275
2290 %v278 = add i64 %v277, %v276
2291 %v279 = add i64 %v278, %v277
2292 %v280 = add i64 %v279, %v278
2293 %v281 = add i64 %v280, %v279
2294 %v282 = add i64 %v281, %v280
2295 %v283 = add i64 %v282, %v281
2296 %v284 = add i64 %v283, %v282
2297 %v285 = add i64 %v284, %v283
2298 %v286 = add i64 %v285, %v284
2299 %v287 = add i64 %v286, %v285
2300 %v288 = add i64 %v287, %v286
2301 %v289 = add i64 %v288, %v287
2302 %v290 = add i64 %v289, %v288
2303 %v291 = add i64 %v290, %v289
2304 %v292 = add i64 %v291, %v290
2305 %v293 = add i64 %v292, %v291
2306 %v294 = add i64 %v293, %v292
2307 %v295 = add i64 %v294, %v293
2308 %v296 = add i64 %v295, %v294
2309 %v297 = add i64 %v296, %v295
2310 %v298 = add i64 %v297, %v296
2311 %v299 = add i64 %v298, %v297
2312 %v300 = add i64 %v299, %v298
2313 %v301 = icmp eq i64 %v300, 100
2314 %v302 = select i1 %v301, i64 %v298, i64 %v299, !prof !15
2315 store i64 %v302, i64* %j
2316 ret i64 99
2317 }
2319 !llvm.module.flags = !{!0}
2320 !0 = !{i32 1, !"ProfileSummary", !1}
2321 !1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
2322 !2 = !{!"ProfileFormat", !"InstrProf"}
2323 !3 = !{!"TotalCount", i64 10000}
2324 !4 = !{!"MaxCount", i64 10}
2325 !5 = !{!"MaxInternalCount", i64 1}
2326 !6 = !{!"MaxFunctionCount", i64 1000}
2327 !7 = !{!"NumCounts", i64 3}
2328 !8 = !{!"NumFunctions", i64 3}
2329 !9 = !{!"DetailedSummary", !10}
2330 !10 = !{!11, !12, !13}
2331 !11 = !{i32 10000, i64 100, i32 1}
2332 !12 = !{i32 999000, i64 100, i32 1}
2333 !13 = !{i32 999999, i64 1, i32 2}
2335 !14 = !{!"function_entry_count", i64 100}
2336 !15 = !{!"branch_weights", i32 0, i32 1}
2337 !16 = !{!"branch_weights", i32 1, i32 1}
2338 ; CHECK: !15 = !{!"branch_weights", i32 1000, i32 0}
2339 ; CHECK: !16 = !{!"branch_weights", i32 0, i32 1}
2340 ; CHECK: !17 = !{!"branch_weights", i32 1, i32 1}
2341 ; CHECK: !18 = !{!"branch_weights", i32 1, i32 0}
2342 ; CHECK: !19 = !{!"branch_weights", i32 0, i32 1000}