test/Transforms/PhaseOrdering/unsigned-multiply-overflow-check.ll

   1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
   2 ; RUN: opt -simplifycfg -S < %s | FileCheck %s --check-prefixes=ALL,SIMPLIFYCFG
   3 ; RUN: opt -instcombine -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINEONLY
   4 ; RUN: opt -instcombine -simplifycfg -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGDEFAULT,INSTCOMBINESIMPLIFYCFGONLY
   5 ; RUN: opt -instcombine -simplifycfg -instcombine -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGDEFAULT,INSTCOMBINESIMPLIFYCFGINSTCOMBINE
   6 ; RUN: opt -instcombine -simplifycfg -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGCOSTLY,INSTCOMBINESIMPLIFYCFGCOSTLYONLY
   7 ; RUN: opt -instcombine -simplifycfg -instcombine -phi-node-folding-threshold=3 -S < %s | FileCheck %s --check-prefixes=ALL,INSTCOMBINE,INSTCOMBINESIMPLIFYCFG,INSTCOMBINESIMPLIFYCFGCOSTLY,INSTCOMBINESIMPLIFYCFGCOSTLYINSTCOMBINE
   8
   9 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
  10 target triple = "x86_64-pc-linux-gnu"
  11
  12 ; #include <limits>
  13 ; #include <cstdint>
  14 ;
  15 ; using size_type = std::size_t;
  16 ; bool will_not_overflow(size_type size, size_type nmemb) {
  17 ;   return (size != 0 && (nmemb > std::numeric_limits<size_type>::max() / size));
  18 ; }
  19
  20 define i1 @will_not_overflow(i64 %arg, i64 %arg1) {
  21 ; ALL-LABEL: @will_not_overflow(
  22 ; ALL-NEXT:  bb:
  23 ; ALL-NEXT:    [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0
  24 ; ALL-NEXT:    br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]
  25 ; ALL:       bb2:
  26 ; ALL-NEXT:    [[T3:%.*]] = udiv i64 -1, [[ARG]]
  27 ; ALL-NEXT:    [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]]
  28 ; ALL-NEXT:    br label [[BB5]]
  29 ; ALL:       bb5:
  30 ; ALL-NEXT:    [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ]
  31 ; ALL-NEXT:    ret i1 [[T6]]
  32 ;
  33 bb:
  34   %t0 = icmp eq i64 %arg, 0
  35   br i1 %t0, label %bb5, label %bb2
  36
  37 bb2:                                              ; preds = %bb
  38   %t3 = udiv i64 -1, %arg
  39   %t4 = icmp ult i64 %t3, %arg1
  40   br label %bb5
  41
  42 bb5:                                              ; preds = %bb2, %bb
  43   %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ]
  44   ret i1 %t6
  45 }
  46
  47 ; Same as @will_not_overflow, but inverting return value.
  48
  49 define i1 @will_overflow(i64 %arg, i64 %arg1) {
  50 ; SIMPLIFYCFG-LABEL: @will_overflow(
  51 ; SIMPLIFYCFG-NEXT:  bb:
  52 ; SIMPLIFYCFG-NEXT:    [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0
  53 ; SIMPLIFYCFG-NEXT:    br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]
  54 ; SIMPLIFYCFG:       bb2:
  55 ; SIMPLIFYCFG-NEXT:    [[T3:%.*]] = udiv i64 -1, [[ARG]]
  56 ; SIMPLIFYCFG-NEXT:    [[T4:%.*]] = icmp ult i64 [[T3]], [[ARG1:%.*]]
  57 ; SIMPLIFYCFG-NEXT:    br label [[BB5]]
  58 ; SIMPLIFYCFG:       bb5:
  59 ; SIMPLIFYCFG-NEXT:    [[T6:%.*]] = phi i1 [ false, [[BB:%.*]] ], [ [[T4]], [[BB2]] ]
  60 ; SIMPLIFYCFG-NEXT:    [[T7:%.*]] = xor i1 [[T6]], true
  61 ; SIMPLIFYCFG-NEXT:    ret i1 [[T7]]
  62 ;
  63 ; INSTCOMBINE-LABEL: @will_overflow(
  64 ; INSTCOMBINE-NEXT:  bb:
  65 ; INSTCOMBINE-NEXT:    [[T0:%.*]] = icmp eq i64 [[ARG:%.*]], 0
  66 ; INSTCOMBINE-NEXT:    br i1 [[T0]], label [[BB5:%.*]], label [[BB2:%.*]]
  67 ; INSTCOMBINE:       bb2:
  68 ; INSTCOMBINE-NEXT:    [[T3:%.*]] = udiv i64 -1, [[ARG]]
  69 ; INSTCOMBINE-NEXT:    [[T4:%.*]] = icmp uge i64 [[T3]], [[ARG1:%.*]]
  70 ; INSTCOMBINE-NEXT:    br label [[BB5]]
  71 ; INSTCOMBINE:       bb5:
  72 ; INSTCOMBINE-NEXT:    [[T6:%.*]] = phi i1 [ true, [[BB:%.*]] ], [ [[T4]], [[BB2]] ]
  73 ; INSTCOMBINE-NEXT:    ret i1 [[T6]]
  74 ;
  75 bb:
  76   %t0 = icmp eq i64 %arg, 0
  77   br i1 %t0, label %bb5, label %bb2
  78
  79 bb2:                                              ; preds = %bb
  80   %t3 = udiv i64 -1, %arg
  81   %t4 = icmp ult i64 %t3, %arg1
  82   br label %bb5
  83
  84 bb5:                                              ; preds = %bb2, %bb
  85   %t6 = phi i1 [ false, %bb ], [ %t4, %bb2 ]
  86   %t7 = xor i1 %t6, true
  87   ret i1 %t7
  88 }