[MIPS GlobalISel] Register bank select for G_STORE. Select i64 store
[llvm-complete.git] / lib / Target / WebAssembly / WebAssemblyTargetMachine.cpp
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1 //===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file defines the WebAssembly-specific subclass of TargetMachine.
11 ///
12 //===----------------------------------------------------------------------===//
14 #include "WebAssemblyTargetMachine.h"
15 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
16 #include "TargetInfo/WebAssemblyTargetInfo.h"
17 #include "WebAssembly.h"
18 #include "WebAssemblyMachineFunctionInfo.h"
19 #include "WebAssemblyTargetObjectFile.h"
20 #include "WebAssemblyTargetTransformInfo.h"
21 #include "llvm/CodeGen/MIRParser/MIParser.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/CodeGen/RegAllocRegistry.h"
25 #include "llvm/CodeGen/TargetPassConfig.h"
26 #include "llvm/IR/Function.h"
27 #include "llvm/Support/TargetRegistry.h"
28 #include "llvm/Target/TargetOptions.h"
29 #include "llvm/Transforms/Scalar.h"
30 #include "llvm/Transforms/Scalar/LowerAtomic.h"
31 #include "llvm/Transforms/Utils.h"
32 using namespace llvm;
34 #define DEBUG_TYPE "wasm"
36 // Emscripten's asm.js-style exception handling
37 static cl::opt<bool> EnableEmException(
38 "enable-emscripten-cxx-exceptions",
39 cl::desc("WebAssembly Emscripten-style exception handling"),
40 cl::init(false));
42 // Emscripten's asm.js-style setjmp/longjmp handling
43 static cl::opt<bool> EnableEmSjLj(
44 "enable-emscripten-sjlj",
45 cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
46 cl::init(false));
48 extern "C" void LLVMInitializeWebAssemblyTarget() {
49 // Register the target.
50 RegisterTargetMachine<WebAssemblyTargetMachine> X(
51 getTheWebAssemblyTarget32());
52 RegisterTargetMachine<WebAssemblyTargetMachine> Y(
53 getTheWebAssemblyTarget64());
55 // Register backend passes
56 auto &PR = *PassRegistry::getPassRegistry();
57 initializeWebAssemblyAddMissingPrototypesPass(PR);
58 initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR);
59 initializeLowerGlobalDtorsPass(PR);
60 initializeFixFunctionBitcastsPass(PR);
61 initializeOptimizeReturnedPass(PR);
62 initializeWebAssemblyArgumentMovePass(PR);
63 initializeWebAssemblySetP2AlignOperandsPass(PR);
64 initializeWebAssemblyReplacePhysRegsPass(PR);
65 initializeWebAssemblyPrepareForLiveIntervalsPass(PR);
66 initializeWebAssemblyOptimizeLiveIntervalsPass(PR);
67 initializeWebAssemblyMemIntrinsicResultsPass(PR);
68 initializeWebAssemblyRegStackifyPass(PR);
69 initializeWebAssemblyRegColoringPass(PR);
70 initializeWebAssemblyFixIrreducibleControlFlowPass(PR);
71 initializeWebAssemblyLateEHPreparePass(PR);
72 initializeWebAssemblyExceptionInfoPass(PR);
73 initializeWebAssemblyCFGSortPass(PR);
74 initializeWebAssemblyCFGStackifyPass(PR);
75 initializeWebAssemblyExplicitLocalsPass(PR);
76 initializeWebAssemblyLowerBrUnlessPass(PR);
77 initializeWebAssemblyRegNumberingPass(PR);
78 initializeWebAssemblyPeepholePass(PR);
79 initializeWebAssemblyCallIndirectFixupPass(PR);
82 //===----------------------------------------------------------------------===//
83 // WebAssembly Lowering public interface.
84 //===----------------------------------------------------------------------===//
86 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM,
87 const Triple &TT) {
88 if (!RM.hasValue()) {
89 // Default to static relocation model. This should always be more optimial
90 // than PIC since the static linker can determine all global addresses and
91 // assume direct function calls.
92 return Reloc::Static;
95 if (!TT.isOSEmscripten()) {
96 // Relocation modes other than static are currently implemented in a way
97 // that only works for Emscripten, so disable them if we aren't targeting
98 // Emscripten.
99 return Reloc::Static;
102 return *RM;
105 /// Create an WebAssembly architecture model.
107 WebAssemblyTargetMachine::WebAssemblyTargetMachine(
108 const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
109 const TargetOptions &Options, Optional<Reloc::Model> RM,
110 Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT)
111 : LLVMTargetMachine(T,
112 TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128"
113 : "e-m:e-p:32:32-i64:64-n32:64-S128",
114 TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
115 getEffectiveCodeModel(CM, CodeModel::Large), OL),
116 TLOF(new WebAssemblyTargetObjectFile()) {
117 // WebAssembly type-checks instructions, but a noreturn function with a return
118 // type that doesn't match the context will cause a check failure. So we lower
119 // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
120 // 'unreachable' instructions which is meant for that case.
121 this->Options.TrapUnreachable = true;
123 // WebAssembly treats each function as an independent unit. Force
124 // -ffunction-sections, effectively, so that we can emit them independently.
125 this->Options.FunctionSections = true;
126 this->Options.DataSections = true;
127 this->Options.UniqueSectionNames = true;
129 initAsmInfo();
131 // Note that we don't use setRequiresStructuredCFG(true). It disables
132 // optimizations than we're ok with, and want, such as critical edge
133 // splitting and tail merging.
136 WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor.
138 const WebAssemblySubtarget *
139 WebAssemblyTargetMachine::getSubtargetImpl(std::string CPU,
140 std::string FS) const {
141 auto &I = SubtargetMap[CPU + FS];
142 if (!I) {
143 I = llvm::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
145 return I.get();
148 const WebAssemblySubtarget *
149 WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
150 Attribute CPUAttr = F.getFnAttribute("target-cpu");
151 Attribute FSAttr = F.getFnAttribute("target-features");
153 std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
154 ? CPUAttr.getValueAsString().str()
155 : TargetCPU;
156 std::string FS = !FSAttr.hasAttribute(Attribute::None)
157 ? FSAttr.getValueAsString().str()
158 : TargetFS;
160 // This needs to be done before we create a new subtarget since any
161 // creation will depend on the TM and the code generation flags on the
162 // function that reside in TargetOptions.
163 resetTargetOptions(F);
165 return getSubtargetImpl(CPU, FS);
168 namespace {
170 class CoalesceFeaturesAndStripAtomics final : public ModulePass {
171 // Take the union of all features used in the module and use it for each
172 // function individually, since having multiple feature sets in one module
173 // currently does not make sense for WebAssembly. If atomics are not enabled,
174 // also strip atomic operations and thread local storage.
175 static char ID;
176 WebAssemblyTargetMachine *WasmTM;
178 public:
179 CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
180 : ModulePass(ID), WasmTM(WasmTM) {}
182 bool runOnModule(Module &M) override {
183 FeatureBitset Features = coalesceFeatures(M);
185 std::string FeatureStr = getFeatureString(Features);
186 for (auto &F : M)
187 replaceFeatures(F, FeatureStr);
189 bool Stripped = false;
190 if (!Features[WebAssembly::FeatureAtomics]) {
191 Stripped |= stripAtomics(M);
192 Stripped |= stripThreadLocals(M);
195 recordFeatures(M, Features, Stripped);
197 // Conservatively assume we have made some change
198 return true;
201 private:
202 FeatureBitset coalesceFeatures(const Module &M) {
203 FeatureBitset Features =
204 WasmTM
205 ->getSubtargetImpl(WasmTM->getTargetCPU(),
206 WasmTM->getTargetFeatureString())
207 ->getFeatureBits();
208 for (auto &F : M)
209 Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
210 return Features;
213 std::string getFeatureString(const FeatureBitset &Features) {
214 std::string Ret;
215 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
216 if (Features[KV.Value])
217 Ret += (StringRef("+") + KV.Key + ",").str();
219 return Ret;
222 void replaceFeatures(Function &F, const std::string &Features) {
223 F.removeFnAttr("target-features");
224 F.removeFnAttr("target-cpu");
225 F.addFnAttr("target-features", Features);
228 bool stripAtomics(Module &M) {
229 // Detect whether any atomics will be lowered, since there is no way to tell
230 // whether the LowerAtomic pass lowers e.g. stores.
231 bool Stripped = false;
232 for (auto &F : M) {
233 for (auto &B : F) {
234 for (auto &I : B) {
235 if (I.isAtomic()) {
236 Stripped = true;
237 goto done;
243 done:
244 if (!Stripped)
245 return false;
247 LowerAtomicPass Lowerer;
248 FunctionAnalysisManager FAM;
249 for (auto &F : M)
250 Lowerer.run(F, FAM);
252 return true;
255 bool stripThreadLocals(Module &M) {
256 bool Stripped = false;
257 for (auto &GV : M.globals()) {
258 if (GV.getThreadLocalMode() !=
259 GlobalValue::ThreadLocalMode::NotThreadLocal) {
260 Stripped = true;
261 GV.setThreadLocalMode(GlobalValue::ThreadLocalMode::NotThreadLocal);
264 return Stripped;
267 void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
268 for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
269 std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
270 if (KV.Value == WebAssembly::FeatureAtomics && Stripped) {
271 // "atomics" is special: code compiled without atomics may have had its
272 // atomics lowered to nonatomic operations. In that case, atomics is
273 // disallowed to prevent unsafe linking with atomics-enabled objects.
274 assert(!Features[WebAssembly::FeatureAtomics]);
275 M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
276 wasm::WASM_FEATURE_PREFIX_DISALLOWED);
277 } else if (Features[KV.Value]) {
278 // Otherwise features are marked Used or not mentioned
279 M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
280 wasm::WASM_FEATURE_PREFIX_USED);
285 char CoalesceFeaturesAndStripAtomics::ID = 0;
287 /// WebAssembly Code Generator Pass Configuration Options.
288 class WebAssemblyPassConfig final : public TargetPassConfig {
289 public:
290 WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
291 : TargetPassConfig(TM, PM) {}
293 WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
294 return getTM<WebAssemblyTargetMachine>();
297 FunctionPass *createTargetRegisterAllocator(bool) override;
299 void addIRPasses() override;
300 bool addInstSelector() override;
301 void addPostRegAlloc() override;
302 bool addGCPasses() override { return false; }
303 void addPreEmitPass() override;
305 // No reg alloc
306 bool addRegAssignmentFast() override { return false; }
308 // No reg alloc
309 bool addRegAssignmentOptimized() override { return false; }
311 } // end anonymous namespace
313 TargetTransformInfo
314 WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) {
315 return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
318 TargetPassConfig *
319 WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
320 return new WebAssemblyPassConfig(*this, PM);
323 FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
324 return nullptr; // No reg alloc
327 //===----------------------------------------------------------------------===//
328 // The following functions are called from lib/CodeGen/Passes.cpp to modify
329 // the CodeGen pass sequence.
330 //===----------------------------------------------------------------------===//
332 void WebAssemblyPassConfig::addIRPasses() {
333 // Runs LowerAtomicPass if necessary
334 addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
336 // This is a no-op if atomics are not used in the module
337 addPass(createAtomicExpandPass());
339 // Add signatures to prototype-less function declarations
340 addPass(createWebAssemblyAddMissingPrototypes());
342 // Lower .llvm.global_dtors into .llvm_global_ctors with __cxa_atexit calls.
343 addPass(createWebAssemblyLowerGlobalDtors());
345 // Fix function bitcasts, as WebAssembly requires caller and callee signatures
346 // to match.
347 addPass(createWebAssemblyFixFunctionBitcasts());
349 // Optimize "returned" function attributes.
350 if (getOptLevel() != CodeGenOpt::None)
351 addPass(createWebAssemblyOptimizeReturned());
353 // If exception handling is not enabled and setjmp/longjmp handling is
354 // enabled, we lower invokes into calls and delete unreachable landingpad
355 // blocks. Lowering invokes when there is no EH support is done in
356 // TargetPassConfig::addPassesToHandleExceptions, but this runs after this
357 // function and SjLj handling expects all invokes to be lowered before.
358 if (!EnableEmException &&
359 TM->Options.ExceptionModel == ExceptionHandling::None) {
360 addPass(createLowerInvokePass());
361 // The lower invoke pass may create unreachable code. Remove it in order not
362 // to process dead blocks in setjmp/longjmp handling.
363 addPass(createUnreachableBlockEliminationPass());
366 // Handle exceptions and setjmp/longjmp if enabled.
367 if (EnableEmException || EnableEmSjLj)
368 addPass(createWebAssemblyLowerEmscriptenEHSjLj(EnableEmException,
369 EnableEmSjLj));
371 // Expand indirectbr instructions to switches.
372 addPass(createIndirectBrExpandPass());
374 TargetPassConfig::addIRPasses();
377 bool WebAssemblyPassConfig::addInstSelector() {
378 (void)TargetPassConfig::addInstSelector();
379 addPass(
380 createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
381 // Run the argument-move pass immediately after the ScheduleDAG scheduler
382 // so that we can fix up the ARGUMENT instructions before anything else
383 // sees them in the wrong place.
384 addPass(createWebAssemblyArgumentMove());
385 // Set the p2align operands. This information is present during ISel, however
386 // it's inconvenient to collect. Collect it now, and update the immediate
387 // operands.
388 addPass(createWebAssemblySetP2AlignOperands());
389 return false;
392 void WebAssemblyPassConfig::addPostRegAlloc() {
393 // TODO: The following CodeGen passes don't currently support code containing
394 // virtual registers. Consider removing their restrictions and re-enabling
395 // them.
397 // These functions all require the NoVRegs property.
398 disablePass(&MachineCopyPropagationID);
399 disablePass(&PostRAMachineSinkingID);
400 disablePass(&PostRASchedulerID);
401 disablePass(&FuncletLayoutID);
402 disablePass(&StackMapLivenessID);
403 disablePass(&LiveDebugValuesID);
404 disablePass(&PatchableFunctionID);
405 disablePass(&ShrinkWrapID);
407 // This pass hurts code size for wasm because it can generate irreducible
408 // control flow.
409 disablePass(&MachineBlockPlacementID);
411 TargetPassConfig::addPostRegAlloc();
414 void WebAssemblyPassConfig::addPreEmitPass() {
415 TargetPassConfig::addPreEmitPass();
417 // Rewrite pseudo call_indirect instructions as real instructions.
418 // This needs to run before register stackification, because we change the
419 // order of the arguments.
420 addPass(createWebAssemblyCallIndirectFixup());
422 // Eliminate multiple-entry loops.
423 addPass(createWebAssemblyFixIrreducibleControlFlow());
425 // Do various transformations for exception handling.
426 // Every CFG-changing optimizations should come before this.
427 addPass(createWebAssemblyLateEHPrepare());
429 // Now that we have a prologue and epilogue and all frame indices are
430 // rewritten, eliminate SP and FP. This allows them to be stackified,
431 // colored, and numbered with the rest of the registers.
432 addPass(createWebAssemblyReplacePhysRegs());
434 // Preparations and optimizations related to register stackification.
435 if (getOptLevel() != CodeGenOpt::None) {
436 // LiveIntervals isn't commonly run this late. Re-establish preconditions.
437 addPass(createWebAssemblyPrepareForLiveIntervals());
439 // Depend on LiveIntervals and perform some optimizations on it.
440 addPass(createWebAssemblyOptimizeLiveIntervals());
442 // Prepare memory intrinsic calls for register stackifying.
443 addPass(createWebAssemblyMemIntrinsicResults());
445 // Mark registers as representing wasm's value stack. This is a key
446 // code-compression technique in WebAssembly. We run this pass (and
447 // MemIntrinsicResults above) very late, so that it sees as much code as
448 // possible, including code emitted by PEI and expanded by late tail
449 // duplication.
450 addPass(createWebAssemblyRegStackify());
452 // Run the register coloring pass to reduce the total number of registers.
453 // This runs after stackification so that it doesn't consider registers
454 // that become stackified.
455 addPass(createWebAssemblyRegColoring());
458 // Sort the blocks of the CFG into topological order, a prerequisite for
459 // BLOCK and LOOP markers.
460 addPass(createWebAssemblyCFGSort());
462 // Insert BLOCK and LOOP markers.
463 addPass(createWebAssemblyCFGStackify());
465 // Insert explicit local.get and local.set operators.
466 addPass(createWebAssemblyExplicitLocals());
468 // Lower br_unless into br_if.
469 addPass(createWebAssemblyLowerBrUnless());
471 // Perform the very last peephole optimizations on the code.
472 if (getOptLevel() != CodeGenOpt::None)
473 addPass(createWebAssemblyPeephole());
475 // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
476 addPass(createWebAssemblyRegNumbering());
479 yaml::MachineFunctionInfo *
480 WebAssemblyTargetMachine::createDefaultFuncInfoYAML() const {
481 return new yaml::WebAssemblyFunctionInfo();
484 yaml::MachineFunctionInfo *WebAssemblyTargetMachine::convertFuncInfoToYAML(
485 const MachineFunction &MF) const {
486 const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
487 return new yaml::WebAssemblyFunctionInfo(*MFI);
490 bool WebAssemblyTargetMachine::parseMachineFunctionInfo(
491 const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
492 SMDiagnostic &Error, SMRange &SourceRange) const {
493 const auto &YamlMFI =
494 reinterpret_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
495 MachineFunction &MF = PFS.MF;
496 MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(YamlMFI);
497 return false;