[Alignment] Move OffsetToAlignment to Alignment.h
[llvm-complete.git] / lib / Target / Mips / TargetInfo / MipsTargetInfo.cpp
blob0082ca34cdbd6c45e50addc573433a4c8432e8c6
1 //===-- MipsTargetInfo.cpp - Mips Target Implementation -------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "TargetInfo/MipsTargetInfo.h"
10 #include "llvm/Support/TargetRegistry.h"
11 using namespace llvm;
13 Target &llvm::getTheMipsTarget() {
14 static Target TheMipsTarget;
15 return TheMipsTarget;
17 Target &llvm::getTheMipselTarget() {
18 static Target TheMipselTarget;
19 return TheMipselTarget;
21 Target &llvm::getTheMips64Target() {
22 static Target TheMips64Target;
23 return TheMips64Target;
25 Target &llvm::getTheMips64elTarget() {
26 static Target TheMips64elTarget;
27 return TheMips64elTarget;
30 extern "C" void LLVMInitializeMipsTargetInfo() {
31 RegisterTarget<Triple::mips,
32 /*HasJIT=*/true>
33 X(getTheMipsTarget(), "mips", "MIPS (32-bit big endian)", "Mips");
35 RegisterTarget<Triple::mipsel,
36 /*HasJIT=*/true>
37 Y(getTheMipselTarget(), "mipsel", "MIPS (32-bit little endian)", "Mips");
39 RegisterTarget<Triple::mips64,
40 /*HasJIT=*/true>
41 A(getTheMips64Target(), "mips64", "MIPS (64-bit big endian)", "Mips");
43 RegisterTarget<Triple::mips64el,
44 /*HasJIT=*/true>
45 B(getTheMips64elTarget(), "mips64el", "MIPS (64-bit little endian)",
46 "Mips");