1 ; RUN: opt -basicaa -print-memoryssa -verify-memoryssa -analyze < %s 2>&1 | FileCheck %s
2 ; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -disable-output < %s 2>&1 | FileCheck %s
4 ; This testcase is reduced from SingleSource/Benchmarks/Misc/fbench.c
5 ; It is testing to make sure that the MemorySSA use optimizer
6 ; comes up with right answers when dealing with multiple MemoryLocations
7 ; over different blocks. See PR28880 for more details.
8 @global = external hidden unnamed_addr global double, align 8
9 @global.1 = external hidden unnamed_addr global double, align 8
11 ; Function Attrs: nounwind ssp uwtable
12 define hidden fastcc void @hoge() unnamed_addr #0 {
14 br i1 undef, label %bb1, label %bb2
17 ; These accesses should not conflict.
18 ; CHECK: 1 = MemoryDef(liveOnEntry)
19 ; 1 = MemoryDef(liveOnEntry)
20 ; CHECK-NEXT: store double undef, double* @global, align 8
21 store double undef, double* @global, align 8
22 ; CHECK: MemoryUse(liveOnEntry)
23 ; MemoryUse(liveOnEntry)
24 ; CHECK-NEXT: %tmp = load double, double* @global.1, align 8
25 %tmp = load double, double* @global.1, align 8
32 br i1 undef, label %bb4, label %bb6
35 ; These accesses should conflict.
36 ; CHECK: 2 = MemoryDef(liveOnEntry)
37 ; 2 = MemoryDef(liveOnEntry)
38 ; CHECK-NEXT: store double 0.000000e+00, double* @global.1, align 8
39 store double 0.000000e+00, double* @global.1, align 8
42 ; CHECK-NEXT: %tmp5 = load double, double* @global.1, align 8
43 %tmp5 = load double, double* @global.1, align 8
50 attributes #0 = { nounwind ssp uwtable "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="core2" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+ssse3" "unsafe-fp-math"="false" "use-soft-float"="false" }