1 //===- MCSubtargetInfo.cpp - Subtarget Information ------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #include "llvm/MC/MCSubtargetInfo.h"
10 #include "llvm/ADT/ArrayRef.h"
11 #include "llvm/ADT/StringRef.h"
12 #include "llvm/MC/MCInstrItineraries.h"
13 #include "llvm/MC/MCSchedule.h"
14 #include "llvm/MC/SubtargetFeature.h"
15 #include "llvm/Support/Format.h"
16 #include "llvm/Support/raw_ostream.h"
23 /// Find KV in array using binary search.
25 static const T
*Find(StringRef S
, ArrayRef
<T
> A
) {
26 // Binary search the array
27 auto F
= llvm::lower_bound(A
, S
);
28 // If not found then return NULL
29 if (F
== A
.end() || StringRef(F
->Key
) != S
) return nullptr;
30 // Return the found array item
34 /// For each feature that is (transitively) implied by this feature, set it.
36 void SetImpliedBits(FeatureBitset
&Bits
, const FeatureBitset
&Implies
,
37 ArrayRef
<SubtargetFeatureKV
> FeatureTable
) {
38 // OR the Implies bits in outside the loop. This allows the Implies for CPUs
39 // which might imply features not in FeatureTable to use this.
41 for (const SubtargetFeatureKV
&FE
: FeatureTable
)
42 if (Implies
.test(FE
.Value
))
43 SetImpliedBits(Bits
, FE
.Implies
.getAsBitset(), FeatureTable
);
46 /// For each feature that (transitively) implies this feature, clear it.
48 void ClearImpliedBits(FeatureBitset
&Bits
, unsigned Value
,
49 ArrayRef
<SubtargetFeatureKV
> FeatureTable
) {
50 for (const SubtargetFeatureKV
&FE
: FeatureTable
) {
51 if (FE
.Implies
.getAsBitset().test(Value
)) {
53 ClearImpliedBits(Bits
, FE
.Value
, FeatureTable
);
58 static void ApplyFeatureFlag(FeatureBitset
&Bits
, StringRef Feature
,
59 ArrayRef
<SubtargetFeatureKV
> FeatureTable
) {
60 assert(SubtargetFeatures::hasFlag(Feature
) &&
61 "Feature flags should start with '+' or '-'");
63 // Find feature in table.
64 const SubtargetFeatureKV
*FeatureEntry
=
65 Find(SubtargetFeatures::StripFlag(Feature
), FeatureTable
);
66 // If there is a match
68 // Enable/disable feature in bits
69 if (SubtargetFeatures::isEnabled(Feature
)) {
70 Bits
.set(FeatureEntry
->Value
);
72 // For each feature that this implies, set it.
73 SetImpliedBits(Bits
, FeatureEntry
->Implies
.getAsBitset(), FeatureTable
);
75 Bits
.reset(FeatureEntry
->Value
);
77 // For each feature that implies this, clear it.
78 ClearImpliedBits(Bits
, FeatureEntry
->Value
, FeatureTable
);
81 errs() << "'" << Feature
<< "' is not a recognized feature for this target"
82 << " (ignoring feature)\n";
86 /// Return the length of the longest entry in the table.
88 static size_t getLongestEntryLength(ArrayRef
<T
> Table
) {
91 MaxLen
= std::max(MaxLen
, std::strlen(I
.Key
));
95 /// Display help for feature and mcpu choices.
96 static void Help(ArrayRef
<SubtargetSubTypeKV
> CPUTable
,
97 ArrayRef
<SubtargetFeatureKV
> FeatTable
) {
98 // the static variable ensures that the help information only gets
99 // printed once even though a target machine creates multiple subtargets
100 static bool PrintOnce
= false;
105 // Determine the length of the longest CPU and Feature entries.
106 unsigned MaxCPULen
= getLongestEntryLength(CPUTable
);
107 unsigned MaxFeatLen
= getLongestEntryLength(FeatTable
);
109 // Print the CPU table.
110 errs() << "Available CPUs for this target:\n\n";
111 for (auto &CPU
: CPUTable
)
112 errs() << format(" %-*s - Select the %s processor.\n", MaxCPULen
, CPU
.Key
,
116 // Print the Feature table.
117 errs() << "Available features for this target:\n\n";
118 for (auto &Feature
: FeatTable
)
119 errs() << format(" %-*s - %s.\n", MaxFeatLen
, Feature
.Key
, Feature
.Desc
);
122 errs() << "Use +feature to enable a feature, or -feature to disable it.\n"
123 "For example, llc -mcpu=mycpu -mattr=+feature1,-feature2\n";
128 /// Display help for mcpu choices only
129 static void cpuHelp(ArrayRef
<SubtargetSubTypeKV
> CPUTable
) {
130 // the static variable ensures that the help information only gets
131 // printed once even though a target machine creates multiple subtargets
132 static bool PrintOnce
= false;
137 // Print the CPU table.
138 errs() << "Available CPUs for this target:\n\n";
139 for (auto &CPU
: CPUTable
)
140 errs() << "\t" << CPU
.Key
<< "\n";
143 errs() << "Use -mcpu or -mtune to specify the target's processor.\n"
144 "For example, clang --target=aarch64-unknown-linux-gui "
145 "-mcpu=cortex-a35\n";
150 static FeatureBitset
getFeatures(StringRef CPU
, StringRef FS
,
151 ArrayRef
<SubtargetSubTypeKV
> ProcDesc
,
152 ArrayRef
<SubtargetFeatureKV
> ProcFeatures
) {
153 SubtargetFeatures
Features(FS
);
155 if (ProcDesc
.empty() || ProcFeatures
.empty())
156 return FeatureBitset();
158 assert(std::is_sorted(std::begin(ProcDesc
), std::end(ProcDesc
)) &&
159 "CPU table is not sorted");
160 assert(std::is_sorted(std::begin(ProcFeatures
), std::end(ProcFeatures
)) &&
161 "CPU features table is not sorted");
165 // Check if help is needed
167 Help(ProcDesc
, ProcFeatures
);
169 // Find CPU entry if CPU name is specified.
170 else if (!CPU
.empty()) {
171 const SubtargetSubTypeKV
*CPUEntry
= Find(CPU
, ProcDesc
);
173 // If there is a match
175 // Set the features implied by this CPU feature, if any.
176 SetImpliedBits(Bits
, CPUEntry
->Implies
.getAsBitset(), ProcFeatures
);
178 errs() << "'" << CPU
<< "' is not a recognized processor for this target"
179 << " (ignoring processor)\n";
183 // Iterate through each feature
184 for (const std::string
&Feature
: Features
.getFeatures()) {
186 if (Feature
== "+help")
187 Help(ProcDesc
, ProcFeatures
);
188 else if (Feature
== "+cpuHelp")
191 ApplyFeatureFlag(Bits
, Feature
, ProcFeatures
);
197 void MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU
, StringRef FS
) {
198 FeatureBits
= getFeatures(CPU
, FS
, ProcDesc
, ProcFeatures
);
200 CPUSchedModel
= &getSchedModelForCPU(CPU
);
202 CPUSchedModel
= &MCSchedModel::GetDefaultSchedModel();
205 void MCSubtargetInfo::setDefaultFeatures(StringRef CPU
, StringRef FS
) {
206 FeatureBits
= getFeatures(CPU
, FS
, ProcDesc
, ProcFeatures
);
209 MCSubtargetInfo::MCSubtargetInfo(
210 const Triple
&TT
, StringRef C
, StringRef FS
,
211 ArrayRef
<SubtargetFeatureKV
> PF
, ArrayRef
<SubtargetSubTypeKV
> PD
,
212 const MCWriteProcResEntry
*WPR
,
213 const MCWriteLatencyEntry
*WL
, const MCReadAdvanceEntry
*RA
,
214 const InstrStage
*IS
, const unsigned *OC
, const unsigned *FP
)
215 : TargetTriple(TT
), CPU(C
), ProcFeatures(PF
), ProcDesc(PD
),
216 WriteProcResTable(WPR
), WriteLatencyTable(WL
),
217 ReadAdvanceTable(RA
), Stages(IS
), OperandCycles(OC
), ForwardingPaths(FP
) {
218 InitMCProcessorInfo(CPU
, FS
);
221 FeatureBitset
MCSubtargetInfo::ToggleFeature(uint64_t FB
) {
222 FeatureBits
.flip(FB
);
226 FeatureBitset
MCSubtargetInfo::ToggleFeature(const FeatureBitset
&FB
) {
231 FeatureBitset
MCSubtargetInfo::SetFeatureBitsTransitively(
232 const FeatureBitset
&FB
) {
233 SetImpliedBits(FeatureBits
, FB
, ProcFeatures
);
237 FeatureBitset
MCSubtargetInfo::ClearFeatureBitsTransitively(
238 const FeatureBitset
&FB
) {
239 for (unsigned I
= 0, E
= FB
.size(); I
< E
; I
++) {
241 FeatureBits
.reset(I
);
242 ClearImpliedBits(FeatureBits
, I
, ProcFeatures
);
248 FeatureBitset
MCSubtargetInfo::ToggleFeature(StringRef Feature
) {
249 // Find feature in table.
250 const SubtargetFeatureKV
*FeatureEntry
=
251 Find(SubtargetFeatures::StripFlag(Feature
), ProcFeatures
);
252 // If there is a match
254 if (FeatureBits
.test(FeatureEntry
->Value
)) {
255 FeatureBits
.reset(FeatureEntry
->Value
);
256 // For each feature that implies this, clear it.
257 ClearImpliedBits(FeatureBits
, FeatureEntry
->Value
, ProcFeatures
);
259 FeatureBits
.set(FeatureEntry
->Value
);
261 // For each feature that this implies, set it.
262 SetImpliedBits(FeatureBits
, FeatureEntry
->Implies
.getAsBitset(),
266 errs() << "'" << Feature
<< "' is not a recognized feature for this target"
267 << " (ignoring feature)\n";
273 FeatureBitset
MCSubtargetInfo::ApplyFeatureFlag(StringRef FS
) {
274 ::ApplyFeatureFlag(FeatureBits
, FS
, ProcFeatures
);
278 bool MCSubtargetInfo::checkFeatures(StringRef FS
) const {
279 SubtargetFeatures
T(FS
);
280 FeatureBitset Set
, All
;
281 for (std::string F
: T
.getFeatures()) {
282 ::ApplyFeatureFlag(Set
, F
, ProcFeatures
);
285 ::ApplyFeatureFlag(All
, F
, ProcFeatures
);
287 return (FeatureBits
& All
) == Set
;
290 const MCSchedModel
&MCSubtargetInfo::getSchedModelForCPU(StringRef CPU
) const {
291 assert(std::is_sorted(ProcDesc
.begin(), ProcDesc
.end()) &&
292 "Processor machine model table is not sorted");
295 const SubtargetSubTypeKV
*CPUEntry
= Find(CPU
, ProcDesc
);
298 if (CPU
!= "help") // Don't error if the user asked for help.
300 << "' is not a recognized processor for this target"
301 << " (ignoring processor)\n";
302 return MCSchedModel::GetDefaultSchedModel();
304 assert(CPUEntry
->SchedModel
&& "Missing processor SchedModel value");
305 return *CPUEntry
->SchedModel
;
309 MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU
) const {
310 const MCSchedModel
&SchedModel
= getSchedModelForCPU(CPU
);
311 return InstrItineraryData(SchedModel
, Stages
, OperandCycles
, ForwardingPaths
);
314 void MCSubtargetInfo::initInstrItins(InstrItineraryData
&InstrItins
) const {
315 InstrItins
= InstrItineraryData(getSchedModel(), Stages
, OperandCycles
,
319 Optional
<unsigned> MCSubtargetInfo::getCacheSize(unsigned Level
) const {
320 return Optional
<unsigned>();
324 MCSubtargetInfo::getCacheAssociativity(unsigned Level
) const {
325 return Optional
<unsigned>();
328 Optional
<unsigned> MCSubtargetInfo::getCacheLineSize(unsigned Level
) const {
329 return Optional
<unsigned>();
332 unsigned MCSubtargetInfo::getPrefetchDistance() const {
336 unsigned MCSubtargetInfo::getMaxPrefetchIterationsAhead() const {
340 unsigned MCSubtargetInfo::getMinPrefetchStride() const {