lib/CodeGen/CallingConvLower.cpp

   1 //===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements the CCState class, used for lowering and implementing
  10 // calling conventions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/CodeGen/CallingConvLower.h"
  15 #include "llvm/CodeGen/MachineFrameInfo.h"
  16 #include "llvm/CodeGen/MachineRegisterInfo.h"
  17 #include "llvm/CodeGen/TargetLowering.h"
  18 #include "llvm/CodeGen/TargetRegisterInfo.h"
  19 #include "llvm/CodeGen/TargetSubtargetInfo.h"
  20 #include "llvm/IR/DataLayout.h"
  21 #include "llvm/Support/Debug.h"
  22 #include "llvm/Support/ErrorHandling.h"
  23 #include "llvm/Support/SaveAndRestore.h"
  24 #include "llvm/Support/raw_ostream.h"
  25 #include <algorithm>
  26
  27 using namespace llvm;
  28
  29 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
  30                  SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
  31     : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
  32       TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C) {
  33   // No stack is used.
  34   StackOffset = 0;
  35
  36   clearByValRegsInfo();
  37   UsedRegs.resize((TRI.getNumRegs()+31)/32);
  38 }
  39
  40 /// Allocate space on the stack large enough to pass an argument by value.
  41 /// The size and alignment information of the argument is encoded in
  42 /// its parameter attribute.
  43 void CCState::HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
  44                           CCValAssign::LocInfo LocInfo, int MinSize,
  45                           int MinAlignment, ISD::ArgFlagsTy ArgFlags) {
  46   Align MinAlign(MinAlignment);
  47   Align Alignment(ArgFlags.getByValAlign());
  48   unsigned Size  = ArgFlags.getByValSize();
  49   if (MinSize > (int)Size)
  50     Size = MinSize;
  51   if (MinAlign > Alignment)
  52     Alignment = MinAlign;
  53   ensureMaxAlignment(Alignment);
  54   MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size,
  55                                                      Alignment.value());
  56   Size = unsigned(alignTo(Size, MinAlign));
  57   unsigned Offset = AllocateStack(Size, Alignment.value());
  58   addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
  59 }
  60
  61 /// Mark a register and all of its aliases as allocated.
  62 void CCState::MarkAllocated(unsigned Reg) {
  63   for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
  64     UsedRegs[*AI/32] |= 1 << (*AI&31);
  65 }
  66
  67 bool CCState::IsShadowAllocatedReg(unsigned Reg) const {
  68   if (!isAllocated(Reg))
  69     return false;
  70
  71   for (auto const &ValAssign : Locs) {
  72     if (ValAssign.isRegLoc()) {
  73       for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true);
  74            AI.isValid(); ++AI) {
  75         if (*AI == Reg)
  76           return false;
  77       }
  78     }
  79   }
  80   return true;
  81 }
  82
  83 /// Analyze an array of argument values,
  84 /// incorporating info about the formals into this state.
  85 void
  86 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
  87                                 CCAssignFn Fn) {
  88   unsigned NumArgs = Ins.size();
  89
  90   for (unsigned i = 0; i != NumArgs; ++i) {
  91     MVT ArgVT = Ins[i].VT;
  92     ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
  93     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this))
  94       report_fatal_error("unable to allocate function argument #" + Twine(i));
  95   }
  96 }
  97
  98 /// Analyze the return values of a function, returning true if the return can
  99 /// be performed without sret-demotion and false otherwise.
 100 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
 101                           CCAssignFn Fn) {
 102   // Determine which register each value should be copied into.
 103   for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
 104     MVT VT = Outs[i].VT;
 105     ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
 106     if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
 107       return false;
 108   }
 109   return true;
 110 }
 111
 112 /// Analyze the returned values of a return,
 113 /// incorporating info about the result values into this state.
 114 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
 115                             CCAssignFn Fn) {
 116   // Determine which register each value should be copied into.
 117   for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
 118     MVT VT = Outs[i].VT;
 119     ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
 120     if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
 121       report_fatal_error("unable to allocate function return #" + Twine(i));
 122   }
 123 }
 124
 125 /// Analyze the outgoing arguments to a call,
 126 /// incorporating info about the passed values into this state.
 127 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
 128                                   CCAssignFn Fn) {
 129   unsigned NumOps = Outs.size();
 130   for (unsigned i = 0; i != NumOps; ++i) {
 131     MVT ArgVT = Outs[i].VT;
 132     ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
 133     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
 134 #ifndef NDEBUG
 135       dbgs() << "Call operand #" << i << " has unhandled type "
 136              << EVT(ArgVT).getEVTString() << '\n';
 137 #endif
 138       llvm_unreachable(nullptr);
 139     }
 140   }
 141 }
 142
 143 /// Same as above except it takes vectors of types and argument flags.
 144 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
 145                                   SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
 146                                   CCAssignFn Fn) {
 147   unsigned NumOps = ArgVTs.size();
 148   for (unsigned i = 0; i != NumOps; ++i) {
 149     MVT ArgVT = ArgVTs[i];
 150     ISD::ArgFlagsTy ArgFlags = Flags[i];
 151     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
 152 #ifndef NDEBUG
 153       dbgs() << "Call operand #" << i << " has unhandled type "
 154              << EVT(ArgVT).getEVTString() << '\n';
 155 #endif
 156       llvm_unreachable(nullptr);
 157     }
 158   }
 159 }
 160
 161 /// Analyze the return values of a call, incorporating info about the passed
 162 /// values into this state.
 163 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
 164                                 CCAssignFn Fn) {
 165   for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
 166     MVT VT = Ins[i].VT;
 167     ISD::ArgFlagsTy Flags = Ins[i].Flags;
 168     if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
 169 #ifndef NDEBUG
 170       dbgs() << "Call result #" << i << " has unhandled type "
 171              << EVT(VT).getEVTString() << '\n';
 172 #endif
 173       llvm_unreachable(nullptr);
 174     }
 175   }
 176 }
 177
 178 /// Same as above except it's specialized for calls that produce a single value.
 179 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) {
 180   if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
 181 #ifndef NDEBUG
 182     dbgs() << "Call result has unhandled type "
 183            << EVT(VT).getEVTString() << '\n';
 184 #endif
 185     llvm_unreachable(nullptr);
 186   }
 187 }
 188
 189 static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) {
 190   if (VT.isVector())
 191     return true; // Assume -msse-regparm might be in effect.
 192   if (!VT.isInteger())
 193     return false;
 194   if (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall)
 195     return true;
 196   return false;
 197 }
 198
 199 void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
 200                                           MVT VT, CCAssignFn Fn) {
 201   unsigned SavedStackOffset = StackOffset;
 202   Align SavedMaxStackArgAlign = MaxStackArgAlign;
 203   unsigned NumLocs = Locs.size();
 204
 205   // Set the 'inreg' flag if it is used for this calling convention.
 206   ISD::ArgFlagsTy Flags;
 207   if (isValueTypeInRegForCC(CallingConv, VT))
 208     Flags.setInReg();
 209
 210   // Allocate something of this value type repeatedly until we get assigned a
 211   // location in memory.
 212   bool HaveRegParm = true;
 213   while (HaveRegParm) {
 214     if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
 215 #ifndef NDEBUG
 216       dbgs() << "Call has unhandled type " << EVT(VT).getEVTString()
 217              << " while computing remaining regparms\n";
 218 #endif
 219       llvm_unreachable(nullptr);
 220     }
 221     HaveRegParm = Locs.back().isRegLoc();
 222   }
 223
 224   // Copy all the registers from the value locations we added.
 225   assert(NumLocs < Locs.size() && "CC assignment failed to add location");
 226   for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
 227     if (Locs[I].isRegLoc())
 228       Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
 229
 230   // Clear the assigned values and stack memory. We leave the registers marked
 231   // as allocated so that future queries don't return the same registers, i.e.
 232   // when i64 and f64 are both passed in GPRs.
 233   StackOffset = SavedStackOffset;
 234   MaxStackArgAlign = SavedMaxStackArgAlign;
 235   Locs.resize(NumLocs);
 236 }
 237
 238 void CCState::analyzeMustTailForwardedRegisters(
 239     SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
 240     CCAssignFn Fn) {
 241   // Oftentimes calling conventions will not user register parameters for
 242   // variadic functions, so we need to assume we're not variadic so that we get
 243   // all the registers that might be used in a non-variadic call.
 244   SaveAndRestore<bool> SavedVarArg(IsVarArg, false);
 245   SaveAndRestore<bool> SavedMustTail(AnalyzingMustTailForwardedRegs, true);
 246
 247   for (MVT RegVT : RegParmTypes) {
 248     SmallVector<MCPhysReg, 8> RemainingRegs;
 249     getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
 250     const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
 251     const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
 252     for (MCPhysReg PReg : RemainingRegs) {
 253       unsigned VReg = MF.addLiveIn(PReg, RC);
 254       Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
 255     }
 256   }
 257 }
 258
 259 bool CCState::resultsCompatible(CallingConv::ID CalleeCC,
 260                                 CallingConv::ID CallerCC, MachineFunction &MF,
 261                                 LLVMContext &C,
 262                                 const SmallVectorImpl<ISD::InputArg> &Ins,
 263                                 CCAssignFn CalleeFn, CCAssignFn CallerFn) {
 264   if (CalleeCC == CallerCC)
 265     return true;
 266   SmallVector<CCValAssign, 4> RVLocs1;
 267   CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
 268   CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
 269
 270   SmallVector<CCValAssign, 4> RVLocs2;
 271   CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
 272   CCInfo2.AnalyzeCallResult(Ins, CallerFn);
 273
 274   if (RVLocs1.size() != RVLocs2.size())
 275     return false;
 276   for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
 277     const CCValAssign &Loc1 = RVLocs1[I];
 278     const CCValAssign &Loc2 = RVLocs2[I];
 279     if (Loc1.getLocInfo() != Loc2.getLocInfo())
 280       return false;
 281     bool RegLoc1 = Loc1.isRegLoc();
 282     if (RegLoc1 != Loc2.isRegLoc())
 283       return false;
 284     if (RegLoc1) {
 285       if (Loc1.getLocReg() != Loc2.getLocReg())
 286         return false;
 287     } else {
 288       if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset())
 289         return false;
 290     }
 291   }
 292   return true;
 293 }